Patch Detail
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Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2225791/?format=api
{ "id": 2225791, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225791/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260421-wdt-v1-5-0bd01ec6a7c4@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260421-wdt-v1-5-0bd01ec6a7c4@nxp.com>", "date": "2026-04-21T14:01:31", "name": "[v2,5/5] imx: Remove hardcoded watchdog base address macros", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f62068d465b89806649e9734abfa9a4bb5b1a615", "submitter": { "id": 80695, "url": "http://patchwork.ozlabs.org/api/1.1/people/80695/?format=api", "name": "Alice Guo (OSS)", "email": "alice.guo@oss.nxp.com" }, "delegate": { "id": 151988, "url": "http://patchwork.ozlabs.org/api/1.1/users/151988/?format=api", "username": "festevam", "first_name": "Fabio", "last_name": "Estevam", "email": "festevam@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260421-wdt-v1-5-0bd01ec6a7c4@nxp.com/mbox/", "series": [ { "id": 500836, "url": "http://patchwork.ozlabs.org/api/1.1/series/500836/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=500836", "date": "2026-04-21T14:01:26", "name": "imx: Switch watchdog addressing from macros to devicetree", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500836/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225791/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225791/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com\n header.a=rsa-sha256 header.s=selector1-NXP1-onmicrosoft-com\n header.b=T+Vd0mYN;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Remove the hardcoded macro definitions as they are\nno longer needed.\n\nSigned-off-by: Alice Guo <alice.guo@nxp.com>\n---\n arch/arm/include/asm/arch-imx8ulp/imx-regs.h | 2 --\n arch/arm/include/asm/arch-imx9/imx-regs.h | 9 ---------\n include/configs/imx8ulp_evk.h | 2 --\n include/configs/imx91_evk.h | 2 --\n include/configs/imx91_frdm.h | 2 --\n include/configs/imx93_evk.h | 3 ---\n include/configs/imx93_frdm.h | 3 ---\n include/configs/imx93_qsb.h | 2 --\n include/configs/imx93_var_som.h | 3 ---\n include/configs/imx94_evk.h | 3 ---\n include/configs/imx95_evk.h | 2 --\n include/configs/kontron-osm-s-mx93.h | 2 --\n include/configs/mx7ulp_com.h | 3 ---\n include/configs/mx7ulp_evk.h | 3 ---\n include/configs/phycore_imx91_93.h | 3 ---\n include/configs/toradex-smarc-imx95.h | 2 --\n 16 files changed, 46 deletions(-)", "diff": "diff --git a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h\nindex a038cc1df33..f9c5e21c14f 100644\n--- a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h\n+++ b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h\n@@ -20,8 +20,6 @@\n \n #define SIM1_BASE_ADDR\t\t0x29290000\n \n-#define WDG3_RBASE\t\t0x292a0000UL\n-\n #define SIM_SEC_BASE_ADDR\t0x2802B000\n \n #define CGC1_SOSCDIV_ADDR\t0x292C0108\ndiff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h\nindex 2d084e5227a..fbf2e6a2b01 100644\n--- a/arch/arm/include/asm/arch-imx9/imx-regs.h\n+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h\n@@ -17,15 +17,6 @@\n \n #define ANATOP_BASE_ADDR 0x44480000UL\n \n-#ifdef CONFIG_IMX94\n-#define WDG3_BASE_ADDR 0x49220000UL\n-#define WDG4_BASE_ADDR 0x49230000UL\n-#else\n-#define WDG3_BASE_ADDR 0x42490000UL\n-#define WDG4_BASE_ADDR 0x424a0000UL\n-#endif\n-#define WDG5_BASE_ADDR 0x424b0000UL\n-\n #define GPIO2_BASE_ADDR\t 0x43810000UL\n #define GPIO3_BASE_ADDR\t 0x43820000UL\n #define GPIO4_BASE_ADDR\t 0x43840000UL\ndiff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h\nindex edfd6f70815..b4f80fb944b 100644\n--- a/include/configs/imx8ulp_evk.h\n+++ b/include/configs/imx8ulp_evk.h\n@@ -30,6 +30,4 @@\n #define PHYS_SDRAM\t\t\t0x80000000\n #define PHYS_SDRAM_SIZE\t\t\t0x80000000 /* 2GB DDR */\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR\t\t\tWDG3_RBASE\n #endif\ndiff --git a/include/configs/imx91_evk.h b/include/configs/imx91_evk.h\nindex 9c5014fd0a5..13918e2b873 100644\n--- a/include/configs/imx91_evk.h\n+++ b/include/configs/imx91_evk.h\n@@ -16,6 +16,4 @@\n #define PHYS_SDRAM\t\t0x80000000\n #define PHYS_SDRAM_SIZE\t\t0x80000000 /* 2GB DDR */\n \n-#define WDOG_BASE_ADDR\t\tWDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/imx91_frdm.h b/include/configs/imx91_frdm.h\nindex 6d051ed88a5..480b3fb477a 100644\n--- a/include/configs/imx91_frdm.h\n+++ b/include/configs/imx91_frdm.h\n@@ -20,6 +20,4 @@\n #define PHYS_SDRAM\t\t0x80000000\n #define PHYS_SDRAM_SIZE\t\tSZ_2G /* 2GB DDR */\n \n-#define WDOG_BASE_ADDR\t\tWDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h\nindex ffd72a38bcb..67774f54790 100644\n--- a/include/configs/imx93_evk.h\n+++ b/include/configs/imx93_evk.h\n@@ -26,7 +26,4 @@\n #define PHYS_SDRAM 0x80000000\n #define PHYS_SDRAM_SIZE\t\t\t0x80000000 /* 2GB DDR */\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR WDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/imx93_frdm.h b/include/configs/imx93_frdm.h\nindex c98c10774cb..bcea360b399 100644\n--- a/include/configs/imx93_frdm.h\n+++ b/include/configs/imx93_frdm.h\n@@ -20,7 +20,4 @@\n #define PHYS_SDRAM\t\t\t0x80000000\n #define PHYS_SDRAM_SIZE\t\t\t0x80000000 /* 2GB DDR */\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR\t\t\tWDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/imx93_qsb.h b/include/configs/imx93_qsb.h\nindex a7b94f7ab57..350f094c2a6 100644\n--- a/include/configs/imx93_qsb.h\n+++ b/include/configs/imx93_qsb.h\n@@ -16,6 +16,4 @@\n #define PHYS_SDRAM\t\t0x80000000\n #define PHYS_SDRAM_SIZE\t\t0x80000000 /* 2GB DDR */\n \n-#define WDOG_BASE_ADDR\t\tWDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/imx93_var_som.h b/include/configs/imx93_var_som.h\nindex 9dc10aea407..6a425e6d1ea 100644\n--- a/include/configs/imx93_var_som.h\n+++ b/include/configs/imx93_var_som.h\n@@ -38,7 +38,4 @@\n \n #define CFG_SYS_FSL_USDHC_NUM 2\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR WDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/imx94_evk.h b/include/configs/imx94_evk.h\nindex f93c3c4e4a8..2623c13db06 100644\n--- a/include/configs/imx94_evk.h\n+++ b/include/configs/imx94_evk.h\n@@ -18,7 +18,4 @@\n #define PHYS_SDRAM_SIZE\t\t\t 0x70000000UL /* 2GB - 256MB DDR */\n #define PHYS_SDRAM_2_SIZE\t 0x180000000 /* 8GB */\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR WDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/imx95_evk.h b/include/configs/imx95_evk.h\nindex 3d22740b3f4..1fdc9ce21ef 100644\n--- a/include/configs/imx95_evk.h\n+++ b/include/configs/imx95_evk.h\n@@ -23,6 +23,4 @@\n #define PHYS_SDRAM_2_SIZE\t\t0x380000000 /* 14GB (Totally 16GB) */\n #endif\n \n-#define WDOG_BASE_ADDR\t\t\tWDG3_BASE_ADDR\n-\n #endif\ndiff --git a/include/configs/kontron-osm-s-mx93.h b/include/configs/kontron-osm-s-mx93.h\nindex ab2b42298c8..fed75e6fa12 100644\n--- a/include/configs/kontron-osm-s-mx93.h\n+++ b/include/configs/kontron-osm-s-mx93.h\n@@ -25,6 +25,4 @@\n #define CFG_MXC_USB_FLAGS\t\t0\n #endif\n \n-#define WDOG_BASE_ADDR WDG3_BASE_ADDR\n-\n #endif /* __KONTRON_MX93_CONFIG_H */\ndiff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h\nindex d27e9d2eaa1..501c3059cc3 100644\n--- a/include/configs/mx7ulp_com.h\n+++ b/include/configs/mx7ulp_com.h\n@@ -15,9 +15,6 @@\n #include \"imx7ulp_spl.h\"\n #endif\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR\t\t\tWDG1_RBASE\n-\n #define CFG_SYS_HZ_CLOCK\t\t1000000 /* Fixed at 1MHz from TSTMR */\n \n /* UART */\ndiff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h\nindex ace1eee70cf..21dbec837f0 100644\n--- a/include/configs/mx7ulp_evk.h\n+++ b/include/configs/mx7ulp_evk.h\n@@ -11,9 +11,6 @@\n #include <linux/sizes.h>\n #include <asm/arch/imx-regs.h>\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR\t\t\tWDG1_RBASE\n-\n #define CFG_SYS_HZ_CLOCK\t\t1000000 /* Fixed at 1Mhz from TSTMR */\n \n /* UART */\ndiff --git a/include/configs/phycore_imx91_93.h b/include/configs/phycore_imx91_93.h\nindex 02fa1d9b274..d1bf086546f 100644\n--- a/include/configs/phycore_imx91_93.h\n+++ b/include/configs/phycore_imx91_93.h\n@@ -22,7 +22,4 @@\n #define PHYS_SDRAM 0x80000000\n #define PHYS_SDRAM_SIZE 0x80000000\n \n-/* Using ULP WDOG for reset */\n-#define WDOG_BASE_ADDR WDG3_BASE_ADDR\n-\n #endif /* __PHYCORE_IMX91_93_H */\ndiff --git a/include/configs/toradex-smarc-imx95.h b/include/configs/toradex-smarc-imx95.h\nindex e1aebd70af2..8a880b96503 100644\n--- a/include/configs/toradex-smarc-imx95.h\n+++ b/include/configs/toradex-smarc-imx95.h\n@@ -19,6 +19,4 @@\n #define PHYS_SDRAM_SIZE\t\t(SZ_2G - SZ_256M)\n #define PHYS_SDRAM_2_SIZE\tSZ_6G\n \n-#define WDOG_BASE_ADDR\tWDG3_BASE_ADDR\n-\n #endif\n", "prefixes": [ "v2", "5/5" ] }