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GET /api/1.1/patches/2225724/?format=api
{ "id": 2225724, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225724/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421140750.25178-1-mohamed@unpredictable.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260421140750.25178-1-mohamed@unpredictable.fr>", "date": "2026-04-21T14:07:50", "name": "whpx: i386, arm: do partition reset on boot CPU reset", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "86059585c0620d757ed616fbc566e27d4b5daf97", "submitter": { "id": 91318, "url": "http://patchwork.ozlabs.org/api/1.1/people/91318/?format=api", "name": "Mohamed Mediouni", "email": "mohamed@unpredictable.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421140750.25178-1-mohamed@unpredictable.fr/mbox/", "series": [ { "id": 500812, "url": "http://patchwork.ozlabs.org/api/1.1/series/500812/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500812", "date": "2026-04-21T14:07:50", "name": "whpx: i386, arm: do partition reset on boot CPU reset", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500812/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225724/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225724/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=WiAKoWyl;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0PNd1P3Lz1yGs\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 22 Apr 2026 00:09:03 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wFBlk-0002hw-Oz; Tue, 21 Apr 2026 10:08:04 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wFBlj-0002hU-5A\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 10:08:03 -0400", "from p-west3-cluster4-host7-snip4-10.eps.apple.com ([57.103.74.141]\n helo=outbound.ms.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wFBlh-0002eN-B5\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 10:08:02 -0400", "from outbound.ms.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-10 (Postfix) with ESMTPS id\n CB2BD180012B; Tue, 21 Apr 2026 14:07:55 +0000 (UTC)", "from localhost.localdomain (unknown [17.57.154.37])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-10 (Postfix) with ESMTPSA id\n 62E201800122; Tue, 21 Apr 2026 14:07:53 +0000 (UTC)" ], "X-ICL-Out-Info": "\n HUtFAUMHWwJACUgBTUQeDx5WFlZNRAJCTQFIHV8DWRxBAUkdXw9LVxQEFVwFVgZXFHkNXR1FDlYZWgxSD1sOHBZLWFUJCgZdGFgVVgl3HlwASx1XBFQfUxJVHR0LRUtAEwRAEwVSB11NVg1HD1geXBQXFUBDXgheH0wcHQ5YBhIATQoONgZZBV4JVgNDBTYSFF1FRgNHGVcUUBtHDFUHV15fChMAXg8PTAtIAVsHXwBBCEwDWgJbHEIMSQRVGlofHVYQUgBSD3IFVwhBCFMCUQRYGl8IGQ1AThkMSh1SVlEFSgxcAGgPXR1YEV0=", "Dkim-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1776780476; x=1779372476;\n bh=vnSSeCmJZe/BZsQhSbYkbvZgWtTe4iR3ULS++b3UMl4=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=WiAKoWylnL2Dgjqah6DRZwl7lqeSXuiE2rbvdEwTTjwfAiC6ZXg9vihurdBFp4BzPL8sRLE329R8XrQr8wCQkhH2cJPCinjL8iezxBlqYXeHvvI3IDpvNE3GwgOyCx4iqZU877nIF/BtFQ8WpMG19BDp3L8QRSZOpL/ZnMwkGloybYM8+Mq4KpvJwABa4axro/F4X9i3EOsl7zNE7kCekE90tf2eufln1w0MAg6r8y6/PcV3T9zjK5fCfNLEsI8Vbq5WyqARfxFMYyJmSnP5h1RbR4zAt9NRaEROHGzS1yEMJAEA8CcOaAxZ18y2Wjk6jxmjjYK/dQ/hv1PME1iiyg==", "mail-alias-created-date": "1752046281608", "From": "Mohamed Mediouni <mohamed@unpredictable.fr>", "To": "qemu-devel@nongnu.org", "Cc": "qemu-arm@nongnu.org, Pedro Barbuda <pbarbuda@microsoft.com>, =?utf-8?q?P?=\n\t=?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>,\n Paolo Bonzini <pbonzini@redhat.com>,\n Peter Maydell <peter.maydell@linaro.org>,\n Mohamed Mediouni <mohamed@unpredictable.fr>,\n Richard Henderson <richard.henderson@linaro.org>", "Subject": "[PATCH] whpx: i386, arm: do partition reset on boot CPU reset", "Date": "Tue, 21 Apr 2026 16:07:50 +0200", "Message-ID": "<20260421140750.25178-1-mohamed@unpredictable.fr>", "X-Mailer": "git-send-email 2.50.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Authority-Info-Out": "v=2.4 cv=daqNHHXe c=1 sm=1 tr=0 ts=69e784bc\n cx=c_apl:c_pps:t_out a=qkKslKyYc0ctBTeLUVfTFg==:117 a=A5OVakUREuEA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=KtJ61neEzk59qg8Kb1kA:9 a=O8hF6Hzn-FEA:10", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIxMDE0MSBTYWx0ZWRfX8PNcvIySkHU1\n I/p7uAOdl+l7UnFDd/hLmw7eTyi2mWM2CtZ8+/8UfUeILVd9RBJtV4pp5Y9p/A35zOPX99FZBDK\n NFHbJJ2KvF67sriupDUHeh/l7+dIdlSw392tYhtWQlnyJS2M3VX/LD2QRGcDnIBTXgPoTtxoJ5G\n YB7gueJi5GgED79s/+durT1/NzaMCmSGfa3p365tWLJAHDb8CjAWVLrOPEJ98b0tzj5yU0s57/I\n yW0zimeZ2uPGAKmt2Z8VjM6zOqzh4oJwBunMygIkgHesI2OYZKdbQW4BvOKcE6/DpcDYl4Dlzlo\n DKg+Z+VL+IGSVqGzVhOSt4jy4/KdduuX2E9I3qYr12IxDVZGT7Lbd/nENnUDuY=", "X-Proofpoint-ORIG-GUID": "QtaHeZRS7HrZh7wfn4_5BdcaatSAOgxD", "X-Proofpoint-GUID": "QtaHeZRS7HrZh7wfn4_5BdcaatSAOgxD", "Received-SPF": "pass client-ip=57.103.74.141;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.ms.icloud.com", "X-Spam_score_int": "-27", "X-Spam_score": "-2.8", "X-Spam_bar": "--", "X-Spam_report": "(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "WHvResetPartition resets partition state, and is not supported on Windows 10.\n\nOn Arm, it's supposed to be used for reboots.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n accel/whpx/whpx-accel-ops.c | 1 +\n accel/whpx/whpx-common.c | 12 ++++++++++++\n include/accel/accel-cpu-ops.h | 7 +++++++\n include/system/cpus.h | 3 +++\n include/system/whpx-accel-ops.h | 2 ++\n system/cpus.c | 7 +++++++\n system/runstate.c | 3 +++\n target/arm/whpx/whpx-all.c | 2 --\n 8 files changed, 35 insertions(+), 2 deletions(-)", "diff": "diff --git a/accel/whpx/whpx-accel-ops.c b/accel/whpx/whpx-accel-ops.c\nindex b8f41544cb..ddeef79e53 100644\n--- a/accel/whpx/whpx-accel-ops.c\n+++ b/accel/whpx/whpx-accel-ops.c\n@@ -98,6 +98,7 @@ static void whpx_accel_ops_class_init(ObjectClass *oc, const void *data)\n ops->handle_interrupt = generic_handle_interrupt;\n ops->supports_guest_debug = whpx_supports_guest_debug;\n \n+ ops->vm_reset = whpx_partition_reset;\n ops->synchronize_post_reset = whpx_cpu_synchronize_post_reset;\n ops->synchronize_post_init = whpx_cpu_synchronize_post_init;\n ops->synchronize_state = whpx_cpu_synchronize_state;\ndiff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c\nindex 6fe44d5910..daf59207c6 100644\n--- a/accel/whpx/whpx-common.c\n+++ b/accel/whpx/whpx-common.c\n@@ -205,6 +205,18 @@ static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu,\n cpu->vcpu_dirty = true;\n }\n \n+/*\n+ * Partition support\n+ */\n+\n+void whpx_partition_reset(void)\n+{\n+ struct whpx_state *whpx = &whpx_global;\n+ if (whp_dispatch.WHvResetPartition) {\n+ whp_dispatch.WHvResetPartition(whpx->partition);\n+ }\n+}\n+\n /*\n * CPU support.\n */\ndiff --git a/include/accel/accel-cpu-ops.h b/include/accel/accel-cpu-ops.h\nindex 9c07a903ea..32348d3470 100644\n--- a/include/accel/accel-cpu-ops.h\n+++ b/include/accel/accel-cpu-ops.h\n@@ -42,6 +42,13 @@ struct AccelOpsClass {\n void (*kick_vcpu_thread)(CPUState *cpu);\n bool (*cpu_thread_is_idle)(CPUState *cpu);\n \n+ /**\n+ * vm_reset\n+ *\n+ * Request to reset the VM to the hardware accelerator.\n+ */\n+ void (*vm_reset)(void);\n+\n /**\n * synchronize_post_reset:\n * synchronize_post_init:\ndiff --git a/include/system/cpus.h b/include/system/cpus.h\nindex 508444ccf1..5dcd7fff07 100644\n--- a/include/system/cpus.h\n+++ b/include/system/cpus.h\n@@ -40,4 +40,7 @@ void cpu_synchronize_all_post_reset(void);\n void cpu_synchronize_all_post_init(void);\n void cpu_synchronize_all_pre_loadvm(void);\n \n+/* VM wide reset */\n+void accel_vm_reset(void);\n+\n #endif\ndiff --git a/include/system/whpx-accel-ops.h b/include/system/whpx-accel-ops.h\nindex 4b2a732654..c809250485 100644\n--- a/include/system/whpx-accel-ops.h\n+++ b/include/system/whpx-accel-ops.h\n@@ -12,6 +12,8 @@\n \n #include \"system/cpus.h\"\n \n+void whpx_partition_reset(void);\n+\n int whpx_init_vcpu(CPUState *cpu);\n int whpx_vcpu_exec(CPUState *cpu);\n void whpx_destroy_vcpu(CPUState *cpu);\ndiff --git a/system/cpus.c b/system/cpus.c\nindex bded87feb1..6a321873f5 100644\n--- a/system/cpus.c\n+++ b/system/cpus.c\n@@ -203,6 +203,13 @@ bool cpus_are_resettable(void)\n return true;\n }\n \n+void accel_vm_reset(void)\n+{\n+ if (cpus_accel->vm_reset) {\n+ cpus_accel->vm_reset();\n+ }\n+}\n+\n void cpu_exec_reset_hold(CPUState *cpu)\n {\n if (cpus_accel->cpu_reset_hold) {\ndiff --git a/system/runstate.c b/system/runstate.c\nindex 2d4e95a216..135e2decba 100644\n--- a/system/runstate.c\n+++ b/system/runstate.c\n@@ -564,6 +564,9 @@ void qemu_system_reset(ShutdownCause reason)\n qapi_event_send_reset(shutdown_caused_by_guest(reason), reason);\n }\n \n+ /* Tell the accelerator that the VM is being reset. */\n+ accel_vm_reset();\n+\n /*\n * Some boards use the machine reset callback to point CPUs to the firmware\n * entry point. Assume that this is not the case for boards that support\ndiff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c\nindex 4019a513aa..f345fea4fe 100644\n--- a/target/arm/whpx/whpx-all.c\n+++ b/target/arm/whpx/whpx-all.c\n@@ -472,8 +472,6 @@ int whpx_vcpu_run(CPUState *cpu)\n if (arm_cpu->power_state != PSCI_OFF) {\n whpx_psci_cpu_off(arm_cpu);\n }\n- /* Partition-wide reset, to reset state for reboots to succeed. */\n- whp_dispatch.WHvResetPartition(whpx->partition);\n bql_unlock();\n break;\n case WHvRunVpExitReasonNone:\n", "prefixes": [] }