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GET /api/1.1/patches/2225608/?format=api
{ "id": 2225608, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225608/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260421092457.37649-2-cuiyunhui@bytedance.com/", "project": { "id": 70, "url": "http://patchwork.ozlabs.org/api/1.1/projects/70/?format=api", "name": "Linux KVM RISC-V", "link_name": "kvm-riscv", "list_id": "kvm-riscv.lists.infradead.org", "list_email": "kvm-riscv@lists.infradead.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260421092457.37649-2-cuiyunhui@bytedance.com>", "date": "2026-04-21T09:24:51", "name": "[1/7] riscv: mm: split raw and public PTE helpers", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3a117f488835027b4078d2fd189485183a191418", "submitter": { "id": 88211, "url": "http://patchwork.ozlabs.org/api/1.1/people/88211/?format=api", "name": "Yunhui Cui", "email": "cuiyunhui@bytedance.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260421092457.37649-2-cuiyunhui@bytedance.com/mbox/", "series": [ { "id": 500766, "url": "http://patchwork.ozlabs.org/api/1.1/series/500766/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=500766", "date": "2026-04-21T09:24:50", "name": "riscv: add Svnapot-based contiguous PTE support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500766/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225608/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225608/checks/", "tags": {}, "headers": { "Return-Path": "\n <kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=LpJf63Py;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=bytedance.com header.i=@bytedance.com\n header.a=rsa-sha256 header.s=google header.b=fefcjvdJ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: Introduce raw PTE helpers prefixed with double underscores\n for callers that need direct access to the underlying PTE encoding. These\n __* helpers form private low-level primitives, while the existing h [...] \n Content analysis details: (0.4 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:62d listed in]\n [list.dnswl.org]\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 2.5 SORTED_RECIPS Recipient list is sorted by address", "X-BeenThere": "kvm-riscv@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<kvm-riscv.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/kvm-riscv/>", "List-Post": "<mailto:kvm-riscv@lists.infradead.org>", "List-Help": "<mailto:kvm-riscv-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"kvm-riscv\" <kvm-riscv-bounces@lists.infradead.org>", "Errors-To": "kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "Introduce raw PTE helpers prefixed with double underscores for callers\nthat need direct access to the underlying PTE encoding. These __* helpers\nform private low-level primitives, while the existing helpers remain the\npublic core-MM-facing API that RISC-V can later wrap with additional\narchitecture-specific semantics without exposing those details to generic\ncallers.\n\nSwitch kernel internal page table users in early boot, KASAN, EFI,\nhibernate and pageattr to use the private raw helpers directly.\n\nNo functional change intended.\n\nSigned-off-by: Yunhui Cui <cuiyunhui@bytedance.com>\n---\n arch/riscv/include/asm/kfence.h | 4 +-\n arch/riscv/include/asm/pgtable.h | 87 ++++++++++++++++++++++++++++----\n arch/riscv/kernel/efi.c | 4 +-\n arch/riscv/kernel/hibernate.c | 2 +-\n arch/riscv/mm/fault.c | 4 +-\n arch/riscv/mm/init.c | 8 +--\n arch/riscv/mm/kasan_init.c | 14 ++---\n arch/riscv/mm/pageattr.c | 12 ++---\n arch/riscv/mm/pgtable.c | 19 ++++++-\n 9 files changed, 117 insertions(+), 37 deletions(-)", "diff": "diff --git a/arch/riscv/include/asm/kfence.h b/arch/riscv/include/asm/kfence.h\nindex d08bf7fb3aee6..2bcaeff1167c6 100644\n--- a/arch/riscv/include/asm/kfence.h\n+++ b/arch/riscv/include/asm/kfence.h\n@@ -18,9 +18,9 @@ static inline bool kfence_protect_page(unsigned long addr, bool protect)\n \tpte_t *pte = virt_to_kpte(addr);\n \n \tif (protect)\n-\t\tset_pte(pte, __pte(pte_val(ptep_get(pte)) & ~_PAGE_PRESENT));\n+\t\t__set_pte(pte, __pte(pte_val(__ptep_get(pte)) & ~_PAGE_PRESENT));\n \telse\n-\t\tset_pte(pte, __pte(pte_val(ptep_get(pte)) | _PAGE_PRESENT));\n+\t\t__set_pte(pte, __pte(pte_val(__ptep_get(pte)) | _PAGE_PRESENT));\n \n \tpreempt_disable();\n \tlocal_flush_tlb_kernel_range(addr, addr + PAGE_SIZE);\ndiff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h\nindex a1a7c6520a095..4de1f40fa77ea 100644\n--- a/arch/riscv/include/asm/pgtable.h\n+++ b/arch/riscv/include/asm/pgtable.h\n@@ -602,11 +602,18 @@ static inline int pte_same(pte_t pte_a, pte_t pte_b)\n * a page table are directly modified. Thus, the following hook is\n * made available.\n */\n-static inline void set_pte(pte_t *ptep, pte_t pteval)\n+static inline void __set_pte(pte_t *ptep, pte_t pteval)\n {\n \tWRITE_ONCE(*ptep, pteval);\n }\n \n+#define __set_pte __set_pte\n+\n+static inline void set_pte(pte_t *ptep, pte_t pteval)\n+{\n+\t__set_pte(ptep, pteval);\n+}\n+\n void flush_icache_pte(struct mm_struct *mm, pte_t pte);\n \n static inline void __set_pte_at(struct mm_struct *mm, pte_t *ptep, pte_t pteval)\n@@ -619,8 +626,8 @@ static inline void __set_pte_at(struct mm_struct *mm, pte_t *ptep, pte_t pteval)\n \n #define PFN_PTE_SHIFT\t\t_PAGE_PFN_SHIFT\n \n-static inline void set_ptes(struct mm_struct *mm, unsigned long addr,\n-\t\tpte_t *ptep, pte_t pteval, unsigned int nr)\n+static inline void __set_ptes(struct mm_struct *mm, unsigned long addr,\n+\t\t\t pte_t *ptep, pte_t pteval, unsigned int nr)\n {\n \tpage_table_check_ptes_set(mm, addr, ptep, pteval, nr);\n \n@@ -632,31 +639,61 @@ static inline void set_ptes(struct mm_struct *mm, unsigned long addr,\n \t\tpte_val(pteval) += 1 << _PAGE_PFN_SHIFT;\n \t}\n }\n-#define set_ptes set_ptes\n+\n+#define __set_ptes __set_ptes\n+\n+static inline void set_ptes(struct mm_struct *mm, unsigned long addr,\n+\t\t\t pte_t *ptep, pte_t pteval, unsigned int nr)\n+{\n+\t__set_ptes(mm, addr, ptep, pteval, nr);\n+}\n+\n+static inline void __pte_clear(struct mm_struct *mm,\n+\t\t\t unsigned long addr, pte_t *ptep)\n+{\n+\t__set_pte_at(mm, ptep, __pte(0));\n+}\n \n static inline void pte_clear(struct mm_struct *mm,\n \tunsigned long addr, pte_t *ptep)\n {\n-\t__set_pte_at(mm, ptep, __pte(0));\n+\t__pte_clear(mm, addr, ptep);\n+}\n+\n+#define __ptep_get __ptep_get\n+static inline pte_t __ptep_get(pte_t *ptep)\n+{\n+\treturn READ_ONCE(*ptep);\n+}\n+\n+#define __ptep_get_lockless __ptep_get_lockless\n+static inline pte_t __ptep_get_lockless(pte_t *ptep)\n+{\n+\treturn __ptep_get(ptep);\n }\n \n #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS\t/* defined in mm/pgtable.c */\n extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,\n \t\t\t\t pte_t *ptep, pte_t entry, int dirty);\n+int __ptep_set_access_flags(struct vm_area_struct *vma,\n+\t\t\t unsigned long address, pte_t *ptep,\n+\t\t\t pte_t entry, int dirty);\n #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG\t/* defined in mm/pgtable.c */\n bool ptep_test_and_clear_young(struct vm_area_struct *vma,\n \t\tunsigned long address, pte_t *ptep);\n+bool __ptep_test_and_clear_young(struct vm_area_struct *vma,\n+\t\t\t\t unsigned long address, pte_t *ptep);\n \n #define __HAVE_ARCH_PTEP_GET_AND_CLEAR\n-static inline pte_t ptep_get_and_clear(struct mm_struct *mm,\n-\t\t\t\t unsigned long address, pte_t *ptep)\n+static inline pte_t\n+__ptep_get_and_clear(struct mm_struct *mm, unsigned long address, pte_t *ptep)\n {\n #ifdef CONFIG_SMP\n \tpte_t pte = __pte(xchg(&ptep->pte, 0));\n #else\n \tpte_t pte = *ptep;\n \n-\tset_pte(ptep, __pte(0));\n+\t__set_pte(ptep, __pte(0));\n #endif\n \n \tpage_table_check_pte_clear(mm, address, pte);\n@@ -664,9 +701,16 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm,\n \treturn pte;\n }\n \n-#define __HAVE_ARCH_PTEP_SET_WRPROTECT\n-static inline void ptep_set_wrprotect(struct mm_struct *mm,\n-\t\t\t\t unsigned long address, pte_t *ptep)\n+#define __ptep_get_and_clear __ptep_get_and_clear\n+\n+static inline pte_t ptep_get_and_clear(struct mm_struct *mm,\n+\t\t\t\t unsigned long address, pte_t *ptep)\n+{\n+\treturn __ptep_get_and_clear(mm, address, ptep);\n+}\n+\n+static inline void\n+__ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)\n {\n \tpte_t read_pte = READ_ONCE(*ptep);\n \t/*\n@@ -679,6 +723,27 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm,\n \t\t\t((pte_val(read_pte) & ~(unsigned long)_PAGE_WRITE) | _PAGE_READ));\n }\n \n+#define __ptep_set_wrprotect __ptep_set_wrprotect\n+\n+#define __HAVE_ARCH_PTEP_SET_WRPROTECT\n+static inline void ptep_set_wrprotect(struct mm_struct *mm,\n+\t\t\t\t unsigned long address, pte_t *ptep)\n+{\n+\t__ptep_set_wrprotect(mm, address, ptep);\n+}\n+\n+static inline pte_t __ptep_clear_flush(struct vm_area_struct *vma,\n+\t\t\t\t unsigned long address,\n+\t\t\t\t pte_t *ptep)\n+{\n+\tpte_t pte = __ptep_get_and_clear(vma->vm_mm, address, ptep);\n+\n+\tif (pte_accessible(vma->vm_mm, pte))\n+\t\tflush_tlb_page(vma, address);\n+\n+\treturn pte;\n+}\n+\n #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH\n static inline bool ptep_clear_flush_young(struct vm_area_struct *vma,\n \t\tunsigned long address, pte_t *ptep)\ndiff --git a/arch/riscv/kernel/efi.c b/arch/riscv/kernel/efi.c\nindex b64bf1624a052..673eca7705ba5 100644\n--- a/arch/riscv/kernel/efi.c\n+++ b/arch/riscv/kernel/efi.c\n@@ -60,7 +60,7 @@ int __init efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md)\n static int __init set_permissions(pte_t *ptep, unsigned long addr, void *data)\n {\n \tefi_memory_desc_t *md = data;\n-\tpte_t pte = ptep_get(ptep);\n+\tpte_t pte = __ptep_get(ptep);\n \tunsigned long val;\n \n \tif (md->attribute & EFI_MEMORY_RO) {\n@@ -72,7 +72,7 @@ static int __init set_permissions(pte_t *ptep, unsigned long addr, void *data)\n \t\tval = pte_val(pte) & ~_PAGE_EXEC;\n \t\tpte = __pte(val);\n \t}\n-\tset_pte(ptep, pte);\n+\t__set_pte(ptep, pte);\n \n \treturn 0;\n }\ndiff --git a/arch/riscv/kernel/hibernate.c b/arch/riscv/kernel/hibernate.c\nindex 982843828adb7..0360a6f3e1bf2 100644\n--- a/arch/riscv/kernel/hibernate.c\n+++ b/arch/riscv/kernel/hibernate.c\n@@ -186,7 +186,7 @@ static int temp_pgtable_map_pte(pmd_t *dst_pmdp, pmd_t *src_pmdp, unsigned long\n \t\tpte_t pte = READ_ONCE(*src_ptep);\n \n \t\tif (pte_present(pte))\n-\t\t\tset_pte(dst_ptep, __pte(pte_val(pte) | pgprot_val(prot)));\n+\t\t\t__set_pte(dst_ptep, __pte(pte_val(pte) | pgprot_val(prot)));\n \t} while (dst_ptep++, src_ptep++, start += PAGE_SIZE, start < end);\n \n \treturn 0;\ndiff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c\nindex 04ed6f8acae4f..fe8b11a8ad143 100644\n--- a/arch/riscv/mm/fault.c\n+++ b/arch/riscv/mm/fault.c\n@@ -69,7 +69,7 @@ static void show_pte(unsigned long addr)\n \tif (!ptep)\n \t\tgoto out;\n \n-\tpte = ptep_get(ptep);\n+\tpte = READ_ONCE(*ptep);\n \tpr_cont(\", pte=%016lx\", pte_val(pte));\n \tpte_unmap(ptep);\n out:\n@@ -231,7 +231,7 @@ static inline void vmalloc_fault(struct pt_regs *regs, int code, unsigned long a\n \t * silently loop forever.\n \t */\n \tpte_k = pte_offset_kernel(pmd_k, addr);\n-\tif (!pte_present(ptep_get(pte_k))) {\n+\tif (!pte_present(__ptep_get(pte_k))) {\n \t\tno_context(regs, addr);\n \t\treturn;\n \t}\ndiff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c\nindex decd7df40fa42..86321b093d252 100644\n--- a/arch/riscv/mm/init.c\n+++ b/arch/riscv/mm/init.c\n@@ -376,9 +376,9 @@ void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)\n \tptep = &fixmap_pte[pte_index(addr)];\n \n \tif (pgprot_val(prot))\n-\t\tset_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));\n+\t\t__set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));\n \telse\n-\t\tpte_clear(&init_mm, addr, ptep);\n+\t\t__pte_clear(&init_mm, addr, ptep);\n \tlocal_flush_tlb_page(addr);\n }\n \n@@ -1558,11 +1558,11 @@ static void __meminit remove_pte_mapping(pte_t *pte_base, unsigned long addr, un\n \t\t\tnext = end;\n \n \t\tptep = pte_base + pte_index(addr);\n-\t\tpte = ptep_get(ptep);\n+\t\tpte = __ptep_get(ptep);\n \t\tif (!pte_present(*ptep))\n \t\t\tcontinue;\n \n-\t\tpte_clear(&init_mm, addr, ptep);\n+\t\t__pte_clear(&init_mm, addr, ptep);\n \t\tif (is_vmemmap)\n \t\t\tfree_vmemmap_storage(pte_page(pte), PAGE_SIZE, altmap);\n \t}\ndiff --git a/arch/riscv/mm/kasan_init.c b/arch/riscv/mm/kasan_init.c\nindex c4a2a9e5586e7..0c2f5e8e48063 100644\n--- a/arch/riscv/mm/kasan_init.c\n+++ b/arch/riscv/mm/kasan_init.c\n@@ -39,9 +39,9 @@ static void __init kasan_populate_pte(pmd_t *pmd, unsigned long vaddr, unsigned\n \tptep = pte_offset_kernel(pmd, vaddr);\n \n \tdo {\n-\t\tif (pte_none(ptep_get(ptep))) {\n+\t\tif (pte_none(__ptep_get(ptep))) {\n \t\t\tphys_addr = memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);\n-\t\t\tset_pte(ptep, pfn_pte(PFN_DOWN(phys_addr), PAGE_KERNEL));\n+\t\t\t__set_pte(ptep, pfn_pte(PFN_DOWN(phys_addr), PAGE_KERNEL));\n \t\t\tmemset(__va(phys_addr), KASAN_SHADOW_INIT, PAGE_SIZE);\n \t\t}\n \t} while (ptep++, vaddr += PAGE_SIZE, vaddr != end);\n@@ -327,8 +327,8 @@ asmlinkage void __init kasan_early_init(void)\n \t\tKASAN_SHADOW_END - (1UL << (64 - KASAN_SHADOW_SCALE_SHIFT)));\n \n \tfor (i = 0; i < PTRS_PER_PTE; ++i)\n-\t\tset_pte(kasan_early_shadow_pte + i,\n-\t\t\tpfn_pte(virt_to_pfn(kasan_early_shadow_page), PAGE_KERNEL));\n+\t\t__set_pte(kasan_early_shadow_pte + i,\n+\t\t\t pfn_pte(virt_to_pfn(kasan_early_shadow_page), PAGE_KERNEL));\n \n \tfor (i = 0; i < PTRS_PER_PMD; ++i)\n \t\tset_pmd(kasan_early_shadow_pmd + i,\n@@ -523,9 +523,9 @@ void __init kasan_init(void)\n \t\t kasan_mem_to_shadow((const void *)MODULES_VADDR + SZ_2G));\n \n \tfor (i = 0; i < PTRS_PER_PTE; i++)\n-\t\tset_pte(&kasan_early_shadow_pte[i],\n-\t\t\tmk_pte(virt_to_page(kasan_early_shadow_page),\n-\t\t\t __pgprot(_PAGE_PRESENT | _PAGE_READ |\n+\t\t__set_pte(&kasan_early_shadow_pte[i],\n+\t\t\t mk_pte(virt_to_page(kasan_early_shadow_page),\n+\t\t\t\t __pgprot(_PAGE_PRESENT | _PAGE_READ |\n \t\t\t\t\t_PAGE_ACCESSED)));\n \n \tmemset(kasan_early_shadow_page, KASAN_SHADOW_INIT, PAGE_SIZE);\ndiff --git a/arch/riscv/mm/pageattr.c b/arch/riscv/mm/pageattr.c\nindex 3f76db3d27699..e0271e2a0b295 100644\n--- a/arch/riscv/mm/pageattr.c\n+++ b/arch/riscv/mm/pageattr.c\n@@ -68,10 +68,10 @@ static int pageattr_pmd_entry(pmd_t *pmd, unsigned long addr,\n static int pageattr_pte_entry(pte_t *pte, unsigned long addr,\n \t\t\t unsigned long next, struct mm_walk *walk)\n {\n-\tpte_t val = ptep_get(pte);\n+\tpte_t val = __ptep_get(pte);\n \n \tval = __pte(set_pageattr_masks(pte_val(val), walk));\n-\tset_pte(pte, val);\n+\t__set_pte(pte, val);\n \n \treturn 0;\n }\n@@ -121,7 +121,7 @@ static int __split_linear_mapping_pmd(pud_t *pudp,\n \n \t\t\tptep_new = (pte_t *)page_address(pte_page);\n \t\t\tfor (i = 0; i < PTRS_PER_PTE; ++i, ++ptep_new)\n-\t\t\t\tset_pte(ptep_new, pfn_pte(pfn + i, prot));\n+\t\t\t\t__set_pte(ptep_new, pfn_pte(pfn + i, prot));\n \n \t\t\tsmp_wmb();\n \n@@ -406,14 +406,14 @@ static int debug_pagealloc_set_page(pte_t *pte, unsigned long addr, void *data)\n {\n \tint enable = *(int *)data;\n \n-\tunsigned long val = pte_val(ptep_get(pte));\n+\tunsigned long val = pte_val(__ptep_get(pte));\n \n \tif (enable)\n \t\tval |= _PAGE_PRESENT;\n \telse\n \t\tval &= ~_PAGE_PRESENT;\n \n-\tset_pte(pte, __pte(val));\n+\t__set_pte(pte, __pte(val));\n \n \treturn 0;\n }\n@@ -466,5 +466,5 @@ bool kernel_page_present(struct page *page)\n \t\treturn true;\n \n \tpte = pte_offset_kernel(pmd, addr);\n-\treturn pte_present(ptep_get(pte));\n+\treturn pte_present(__ptep_get(pte));\n }\ndiff --git a/arch/riscv/mm/pgtable.c b/arch/riscv/mm/pgtable.c\nindex 9c4427d0b1874..9131a78fe15c4 100644\n--- a/arch/riscv/mm/pgtable.c\n+++ b/arch/riscv/mm/pgtable.c\n@@ -8,6 +8,13 @@\n int ptep_set_access_flags(struct vm_area_struct *vma,\n \t\t\t unsigned long address, pte_t *ptep,\n \t\t\t pte_t entry, int dirty)\n+{\n+\treturn __ptep_set_access_flags(vma, address, ptep, entry, dirty);\n+}\n+\n+int __ptep_set_access_flags(struct vm_area_struct *vma,\n+\t\t\t unsigned long address, pte_t *ptep,\n+\t\t\t pte_t entry, int dirty)\n {\n \tif (riscv_has_extension_unlikely(RISCV_ISA_EXT_SVVPTC)) {\n \t\tif (!pte_same(ptep_get(ptep), entry)) {\n@@ -32,11 +39,19 @@ int ptep_set_access_flags(struct vm_area_struct *vma,\n bool ptep_test_and_clear_young(struct vm_area_struct *vma,\n \t\tunsigned long address, pte_t *ptep)\n {\n-\tif (!pte_young(ptep_get(ptep)))\n+\treturn __ptep_test_and_clear_young(vma, address, ptep);\n+}\n+EXPORT_SYMBOL_GPL(ptep_test_and_clear_young);\n+\n+bool __ptep_test_and_clear_young(struct vm_area_struct *vma,\n+\t\t\t\t unsigned long address, pte_t *ptep)\n+{\n+\tif (!pte_young(__ptep_get(ptep)))\n \t\treturn false;\n+\n \treturn test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep));\n }\n-EXPORT_SYMBOL_GPL(ptep_test_and_clear_young);\n+EXPORT_SYMBOL_GPL(__ptep_test_and_clear_young);\n \n #ifdef CONFIG_64BIT\n pud_t *pud_offset(p4d_t *p4d, unsigned long address)\n", "prefixes": [ "1/7" ] }