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{ "id": 2225419, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225419/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/aebidYEtg5ErpZym@cowardly-lion.the-meissners.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<aebidYEtg5ErpZym@cowardly-lion.the-meissners.org>", "date": "2026-04-21T02:35:33", "name": "GCC 17.0 PowerPC, V6 [2/5]: Add the -mdense-math option.", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "117108ff2cc731321d17449d0c840d73c65fc77e", "submitter": { "id": 73991, "url": "http://patchwork.ozlabs.org/api/1.1/people/73991/?format=api", "name": "Michael Meissner", "email": "meissner@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/aebidYEtg5ErpZym@cowardly-lion.the-meissners.org/mbox/", "series": [ { "id": 500711, "url": "http://patchwork.ozlabs.org/api/1.1/series/500711/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500711", "date": "2026-04-21T02:35:33", "name": "GCC 17.0 PowerPC, V6 [2/5]: Add the -mdense-math option.", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500711/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225419/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225419/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=HGTVEIbF;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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a=rsa-sha256; d=sourceware.org; s=key; t=1776738940; cv=none;\n b=PWcEo/uRAcTh/U0D5lXF0g1cL+F9qpMVfcbEN1ylsbmGj8In0XuFOoecw2UScutzRQMGulv2/6Ye+pW250DcJhffV1KcNA+puZ+s49If3nmkgHYWOSpaHIatZbjmJO7B42K+ZmLzy2NW0Ymi6k/xyAzrXGLkj6c0pHRQJcJ8Y7w=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776738940; c=relaxed/simple;\n bh=4GKG+aONtBtXyWqTgNDMmyMTh1He414ZMfkzMSllG+Q=;\n h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version;\n b=bXk0QwcHDE4tqNtawl1Zg9z7sanP4Zr2ZNridOjoJRoOD9a86OnYGGL8gSA2XmKP7Sh0m/pfswpGEDgIMq/cCnSjMrTCMXXVWMFhBpSNlxvU9DXb1H0rxoOQ3gfXeQ7dgsQYcOE8mxsq4M6JFhEBAdG3D9iqcc9cj1SDZjE8ZVA=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=\n content-type:date:from:in-reply-to:message-id:mime-version\n :references:subject:to; s=pp1; bh=zM/eI1SipUdYUmpBeTdOF8i1Xdi+CJ\n mpjeYNwmv6FTw=; b=HGTVEIbFxz5LTUs+EL9PWN7GInP8GpkMEUnuy9S55UoTQl\n gdIiZtpOTfSTdGd+8D6b6EOGZznxIV0fFxGOvvIVK68Vjqq820G8ZGGeyKmTf5wg\n NSuOqlvmy8DaAgMcS2WHfnMe3kwV4Fk1eqF98aLjqc0QuGFzELqyNPzXAjANlkGb\n BfTIlNczHIQD0Duloemrs7yM0PWQ/x21HRY9IfCByFxd4z1Sun9m7jliVHiUM5mn\n Jvn4mLekiBakklXnhOw49P7k5gCeVJg1xNVSFMZYd/S2mZay5yTg8rRI7UBYoHc4\n dNQnT9TXhoE/eDY17mKlH8E+07KFG8Koh5N8+vrg==", "Date": "Mon, 20 Apr 2026 22:35:33 -0400", "From": "Michael Meissner <meissner@linux.ibm.com>", "To": "Michael Meissner <meissner@linux.ibm.com>, gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "Subject": "GCC 17.0 PowerPC, V6 [2/5]: Add the -mdense-math option.", "Message-ID": "<aebidYEtg5ErpZym@cowardly-lion.the-meissners.org>", "Mail-Followup-To": "Michael Meissner <meissner@linux.ibm.com>,\n gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "References": "<aebT1QQbPenBOFeH@cowardly-lion.the-meissners.org>\n <aebfyZbqzSA9YblH@cowardly-lion.the-meissners.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=us-ascii", "Content-Disposition": "inline", "In-Reply-To": "<aebfyZbqzSA9YblH@cowardly-lion.the-meissners.org>", "X-TM-AS-GCONF": "00", "X-Proofpoint-ORIG-GUID": "POwCrhGefneLSoFlWkbgM2BBqzYg5nar", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIxMDAyMSBTYWx0ZWRfXxCUIXv2dG4s1\n sRjWrp7qumeLCo/lfbJURH+7SSiDq73hI7Gr3+2yD7dZF/aW3FHLy1Ucd/3jiUd6qMJqlF45F7G\n mcJl5k4x76V9z7LnQjQK2cpoO8X0BAa04stB5Idv/9ou07aL2V+vo5afaBEtT7pxOgjQphBaClG\n rSrENrrKMNemPgBO/sNSvvTO7nEs3/o6XSy10K3OkTVuezwsuzSj+E1T7n/RqeDK7IVFcAaJoqf\n 0CHea46xSnA/vQnEPYIFkOMqom41UOdJ/qL3NG01XyPCPmMNW1idC1dqdcAJPHpZIkxxSfsXYkr\n RNFaEK+aKoYsMn1CPINb009GTeVBp3Zd7UJRySPGQ8kNocC2Y8ywy6zqG5ADjkoCKYVRXxhNcCP\n A0Ci0f7xSb44czDwo9x5n0h1mwe8NCQiehcFbTkWHdQjHhgVRKGdJj7wltkHk7z219D0Lgv/B6A\n NDm7+kkk4szFgtlwlwg==", "X-Proofpoint-GUID": "POwCrhGefneLSoFlWkbgM2BBqzYg5nar", "X-Authority-Analysis": "v=2.4 cv=B7iJFutM c=1 sm=1 tr=0 ts=69e6e27b cx=c_pps\n a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17\n a=kj9zAlcOel0A:10 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=mDV3o1hIAAAA:8\n a=VnNF1IyMAAAA:8 a=Jz-Qs_lQuOGvCERg6MEA:9 a=CjuIK1q_8ugA:10", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-20_05,2026-04-20_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 priorityscore=1501 spamscore=0 impostorscore=0 adultscore=0\n bulkscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604210021", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "This patch adds the -mdense-math option for -mcpu=future. The next set of\npatches will support for using dense math registers with the MMA instructions.\nAll this patch does is add the option. A future patch will implement support\nfor dense math registers, and another patch will then switch the MMA\ninstructions to use dense math registers.\n\nThe patches have been tested on both little and big endian systems. Can I check\nit into the master branch?\n\nNote, in the intro mail message, I said that this was V4 of the\npatches, but I missed I had submitted V5 on February 21st, 2026, so\nthis is now V6:\n\nBetween V4 and V5, this patch adds macros to say whether MMA supports ISA 3.1\naccumulators being overlaid over VSX registers 0..31 or whether it supports\ndense math accumulators.\n\nFor users, the following macros are defined:\n\n\t__MMA_NO_DENSE_MATH__\tISA 3.1 MMA support.\n\t__MMA_DENSE_MATH__\tMMA with dense math registers.\n\nWithin the compiler, the following macros are defined:\n\n\tTARGET_MMA_NO_DENSE_MATH\tISA 3.1 MMA support.\n\tTARGET_MMA_DENSE_MATH\t\tMMA with dense math registers.\n\nThis is version 6 of the patches (which is the same as version 5).\nVersion 5 patches are at:\n\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/708943.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/708944.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/708945.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/708946.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/708947.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/708948.html\n\nThis patch needs the -mcpu=future patch posted on April 8th, 2026:\n\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/712532.html\n\nI have built bootstrap little endian compilers on power10 systems, and\nbig endian compiler on power9 systems. There were no regression in the\ntests. Can I add the patches to the GCC trunk after the -mcpu=future\npatch is applied and GCC 17 has opened up?\n\ngcc/\n\n2026-04-20 Michael Meissner <meissner@linux.ibm.com>\n\n\t* config/rs6000/rs6000-c.cc (rs6000_define_or_undefine_macro): Define\n\t__MMA_DENSE_MATH__ if we have MMA that uses dense math register\n\taccumulators. Define __MMA_NO_DENSE_MATH__ if we have MMA but we are\n\tusing ISA 3.1 where the accumulators are overlaid over VSX registers\n\t0..32. Define __DENSE_MATH__ if we have dense math registers.\n\t* config/rs6000/rs6000.cc (rs6000_option_override_internal): Do not\n\tallow -mdense-math unless -mcpu=future is used.\n\t(rs6000_opt_masks): Add -mdense-math support.\n\t* config/rs6000/rs6000.h (TARGET_MMA_DENSE_MATH): New macro.\n\t(TARGET_MMA_NO_DENSE_MATH): Likewise.\n\t* config/rs6000/rs6000.opt (-mdense-math): New option.\n\t* doc/invoke.texi (RS/6000 and PowerPC Options): Add -mdense-math.\n---\n gcc/config/rs6000/rs6000-c.cc | 22 ++++++++++++++++++++--\n gcc/config/rs6000/rs6000.cc | 10 ++++++++++\n gcc/config/rs6000/rs6000.h | 6 ++++++\n gcc/config/rs6000/rs6000.opt | 4 ++++\n gcc/doc/invoke.texi | 7 +++++++\n 5 files changed, 47 insertions(+), 2 deletions(-)", "diff": "diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc\nindex eb6a881aa9b..a13ed0e0754 100644\n--- a/gcc/config/rs6000/rs6000-c.cc\n+++ b/gcc/config/rs6000/rs6000-c.cc\n@@ -587,9 +587,27 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)\n if (rs6000_cpu == PROCESSOR_CELL)\n rs6000_define_or_undefine_macro (define_p, \"__PPU__\");\n \n- /* Tell the user if we support the MMA instructions. */\n+ /* Tell the user if we support the MMA instructions. Also tell them if we\n+ have MMA with ISA 3.1 that uses accumulators overlaid over VSX registers\n+ 0..31 or if we have support with separate dense math accumulators. */\n if ((flags & OPTION_MASK_MMA) != 0)\n- rs6000_define_or_undefine_macro (define_p, \"__MMA__\");\n+ {\n+ rs6000_define_or_undefine_macro (define_p, \"__MMA__\");\n+ if ((flags & OPTION_MASK_DENSE_MATH) != 0)\n+\t{\n+\t rs6000_define_or_undefine_macro (define_p, \"__MMA_DENSE_MATH__\");\n+\t rs6000_define_or_undefine_macro (false, \"__MMA_NO_DENSE_MATH__\");\n+\t}\n+ else\n+\t{\n+\t rs6000_define_or_undefine_macro (false, \"__MMA_DENSE_MATH__\");\n+\t rs6000_define_or_undefine_macro (define_p, \"__MMA_NO_DENSE_MATH__\");\n+\t}\n+ }\n+ /* Tell the user if we support the dense math registers for use with MMA and\n+ cryptography. */\n+ if ((flags & OPTION_MASK_DENSE_MATH) != 0)\n+ rs6000_define_or_undefine_macro (define_p, \"__DENSE_MATH__\");\n /* Whether pc-relative code is being generated. */\n if ((flags & OPTION_MASK_PCREL) != 0)\n rs6000_define_or_undefine_macro (define_p, \"__PCREL__\");\ndiff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc\nindex 63723396558..f5ba84a108e 100644\n--- a/gcc/config/rs6000/rs6000.cc\n+++ b/gcc/config/rs6000/rs6000.cc\n@@ -4410,6 +4410,15 @@ rs6000_option_override_internal (bool global_init_p)\n if (!TARGET_PCREL && TARGET_PCREL_OPT)\n rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT;\n \n+ /* Turn off dense math register support on non-future systems. */\n+ if (TARGET_DENSE_MATH && !TARGET_FUTURE)\n+ {\n+ if ((rs6000_isa_flags_explicit & OPTION_MASK_DENSE_MATH) != 0)\n+\terror (\"%qs requires %qs\", \"-mdense-math\", \"-mcpu=future\");\n+\n+ rs6000_isa_flags &= ~OPTION_MASK_DENSE_MATH;\n+ }\n+\n if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)\n rs6000_print_isa_options (stderr, 0, \"after subtarget\", rs6000_isa_flags);\n \n@@ -24463,6 +24472,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =\n \t\t\t\t\t\t\t\tfalse, true },\n { \"cmpb\",\t\t\tOPTION_MASK_CMPB,\t\tfalse, true },\n { \"crypto\",\t\t\tOPTION_MASK_CRYPTO,\t\tfalse, true },\n+ { \"dense-math\",\t\tOPTION_MASK_DENSE_MATH,\t\tfalse, true },\n { \"direct-move\",\t\t0,\t\t\t\tfalse, true },\n { \"dlmzb\",\t\t\tOPTION_MASK_DLMZB,\t\tfalse, true },\n { \"efficient-unaligned-vsx\",\tOPTION_MASK_EFFICIENT_UNALIGNED_VSX,\ndiff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h\nindex 04709f0dcd6..91e60085515 100644\n--- a/gcc/config/rs6000/rs6000.h\n+++ b/gcc/config/rs6000/rs6000.h\n@@ -500,6 +500,12 @@ extern int rs6000_vector_align[];\n #define TARGET_MINMAX\t(TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT\t\t\\\n \t\t\t && (TARGET_P9_MINMAX || !flag_trapping_math))\n \n+/* Define if the MMA subsystem uses ISA 3.1 where the accumulators are overlaid\n+ over VSX registers 0..31 or whether MMA uses separate dense math\n+ accumulators. */\n+#define TARGET_MMA_DENSE_MATH\t\t(TARGET_MMA && TARGET_DENSE_MATH)\n+#define TARGET_MMA_NO_DENSE_MATH\t(TARGET_MMA && !TARGET_DENSE_MATH)\n+\n /* In switching from using target_flags to using rs6000_isa_flags, the options\n machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. The MASK_<xxxx>\n options that have not yet been replaced by their OPTION_MASK_<xxx>\ndiff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt\nindex 2b6ec5222fc..5bf1b98e4e7 100644\n--- a/gcc/config/rs6000/rs6000.opt\n+++ b/gcc/config/rs6000/rs6000.opt\n@@ -638,6 +638,10 @@ mieee128-constant\n Target Var(TARGET_IEEE128_CONSTANT) Init(1) Save\n Generate (do not generate) code that uses the LXVKQ instruction.\n \n+mdense-math\n+Target Mask(DENSE_MATH) Var(rs6000_isa_flags)\n+Generate (do not generate) instructions that use dense math registers.\n+\n ; Documented parameters\n \n -param=rs6000-vect-unroll-limit=\ndiff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi\nindex 6d70ae6935b..afebdabcf9d 100644\n--- a/gcc/doc/invoke.texi\n+++ b/gcc/doc/invoke.texi\n@@ -32763,6 +32763,13 @@ This option is enabled by default.\n Enable or disable warnings about deprecated @samp{vector long ...} Altivec\n type usage. This option is enabled by default.\n \n+@opindex mdense-math\n+@opindex mno-dense-math\n+@item -mdense-math\n+@itemx -mno-dense-math\n+Generate (do not generate) code that uses the dense math registers.\n+This option is enabled by default.\n+\n @end table\n \n @node RX Options\n", "prefixes": [] }