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GET /api/1.1/patches/2225193/?format=api
{ "id": 2225193, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225193/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pwm/patch/20260420-rk3576-pwm-v5-4-ae7cfbbe5427@collabora.com/", "project": { "id": 38, "url": "http://patchwork.ozlabs.org/api/1.1/projects/38/?format=api", "name": "Linux PWM development", "link_name": "linux-pwm", "list_id": "linux-pwm.vger.kernel.org", "list_email": "linux-pwm@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260420-rk3576-pwm-v5-4-ae7cfbbe5427@collabora.com>", "date": "2026-04-20T13:52:41", "name": "[v5,4/6] counter: Add rockchip-pwm-capture driver", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9e467d3fa5fbdd3ad13ced108c6ed02f5c7c998f", "submitter": { "id": 90188, "url": "http://patchwork.ozlabs.org/api/1.1/people/90188/?format=api", "name": "Nicolas Frattaroli", "email": "nicolas.frattaroli@collabora.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pwm/patch/20260420-rk3576-pwm-v5-4-ae7cfbbe5427@collabora.com/mbox/", "series": [ { "id": 500617, "url": "http://patchwork.ozlabs.org/api/1.1/series/500617/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pwm/list/?series=500617", "date": "2026-04-20T13:52:37", "name": "Add Rockchip RK3576 PWM Support Through MFPWM", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/500617/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225193/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225193/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pwm+bounces-8657-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pwm@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com\n header.a=rsa-sha256 header.s=zohomail header.b=OEmi/Xag;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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mx.zohomail.com;\n\tdkim=pass header.i=collabora.com;\n\tspf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com;\n\tdmarc=pass header.from=<nicolas.frattaroli@collabora.com>" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1776693224;\n\ts=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com;\n\th=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To;\n\tbh=nsutsVj0iUbQZMCAjd1hvnunqn5qD6BVdq6dMYUC5IA=;\n\tb=OEmi/Xagen/DSaYql+XoPlBjOyxZTPIjcAM9Nyf288bh04wP80biAu3WGqaeCYxp\n\tMzSc26pnEqUInXxJzqHmEVEKSMxXD95R00LexuPcz+DHlZ6J/1W5b2gkueprUCdoSPR\n\tidoyKKEt6bTe+BMjgkM1DTCxzzOb8yB6AtqDcoBs=", "From": "Nicolas Frattaroli <nicolas.frattaroli@collabora.com>", "Date": "Mon, 20 Apr 2026 15:52:41 +0200", "Subject": "[PATCH v5 4/6] counter: Add rockchip-pwm-capture driver", "Precedence": "bulk", "X-Mailing-List": "linux-pwm@vger.kernel.org", "List-Id": "<linux-pwm.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pwm+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pwm+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260420-rk3576-pwm-v5-4-ae7cfbbe5427@collabora.com>", "References": "<20260420-rk3576-pwm-v5-0-ae7cfbbe5427@collabora.com>", "In-Reply-To": "<20260420-rk3576-pwm-v5-0-ae7cfbbe5427@collabora.com>", "To": "=?utf-8?q?Uwe_Kleine-K=C3=B6nig?= <ukleinek@kernel.org>,\n Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>,\n Lee Jones <lee@kernel.org>, William Breathitt Gray <wbg@kernel.org>,\n Damon Ding <damon.ding@rock-chips.com>", "Cc": "Nicolas Frattaroli <nicolas.frattaroli@collabora.com>,\n kernel@collabora.com, Jonas Karlman <jonas@kwiboo.se>,\n Alexey Charkov <alchark@gmail.com>, linux-rockchip@lists.infradead.org,\n linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,\n linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n linux-iio@vger.kernel.org", "X-Mailer": "b4 0.15.2" }, "content": "Among many other things, Rockchip's new PWMv4 IP in the RK3576 supports\nPWM capture functionality.\n\nAdd a basic driver for this that works to expose HPC/LPC counts and\nstate change events to userspace through the counter framework. It's\nquite basic, but works well enough to demonstrate the device function\nexclusion stuff that mfpwm does, in order to eventually support all the\nfunctions of this device in drivers within their appropriate subsystems,\nwithout them interfering with each other.\n\nSigned-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>\n---\n MAINTAINERS | 1 +\n drivers/counter/Kconfig | 11 ++\n drivers/counter/Makefile | 1 +\n drivers/counter/rockchip-pwm-capture.c | 307 +++++++++++++++++++++++++++++++++\n 4 files changed, 320 insertions(+)", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 68bb9ee07a47..3f72784dd5bc 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -23178,6 +23178,7 @@ L:\tlinux-rockchip@lists.infradead.org\n L:\tlinux-pwm@vger.kernel.org\n S:\tMaintained\n F:\tDocumentation/devicetree/bindings/pwm/rockchip,rk3576-pwm.yaml\n+F:\tdrivers/counter/rockchip-pwm-capture.c\n F:\tdrivers/mfd/rockchip-mfpwm.c\n F:\tdrivers/pwm/pwm-rockchip-v4.c\n F:\tinclude/linux/mfd/rockchip-mfpwm.h\ndiff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig\nindex d30d22dfe577..85adeb41aeed 100644\n--- a/drivers/counter/Kconfig\n+++ b/drivers/counter/Kconfig\n@@ -90,6 +90,17 @@ config MICROCHIP_TCB_CAPTURE\n \t To compile this driver as a module, choose M here: the\n \t module will be called microchip-tcb-capture.\n \n+config ROCKCHIP_PWM_CAPTURE\n+\ttristate \"Rockchip PWM Counter Capture driver\"\n+\tdepends on MFD_ROCKCHIP_MFPWM\n+\thelp\n+\t Generic counter framework driver for the multi-function PWM on\n+\t Rockchip SoCs such as the RK3576.\n+\n+\t Uses the Rockchip Multi-function PWM controller driver infrastructure\n+\t to guarantee exclusive operation with other functions of the same\n+\t device implemented by drivers in other subsystems.\n+\n config RZ_MTU3_CNT\n \ttristate \"Renesas RZ/G2L MTU3a counter driver\"\n \tdepends on RZ_MTU3\ndiff --git a/drivers/counter/Makefile b/drivers/counter/Makefile\nindex fa3c1d08f706..2bfcfc2c584b 100644\n--- a/drivers/counter/Makefile\n+++ b/drivers/counter/Makefile\n@@ -17,3 +17,4 @@ obj-$(CONFIG_FTM_QUADDEC)\t+= ftm-quaddec.o\n obj-$(CONFIG_MICROCHIP_TCB_CAPTURE)\t+= microchip-tcb-capture.o\n obj-$(CONFIG_INTEL_QEP)\t\t+= intel-qep.o\n obj-$(CONFIG_TI_ECAP_CAPTURE)\t+= ti-ecap-capture.o\n+obj-$(CONFIG_ROCKCHIP_PWM_CAPTURE)\t+= rockchip-pwm-capture.o\ndiff --git a/drivers/counter/rockchip-pwm-capture.c b/drivers/counter/rockchip-pwm-capture.c\nnew file mode 100644\nindex 000000000000..09a92f2bc409\n--- /dev/null\n+++ b/drivers/counter/rockchip-pwm-capture.c\n@@ -0,0 +1,307 @@\n+// SPDX-License-Identifier: GPL-2.0-or-later\n+/*\n+ * Copyright (c) 2025 Collabora Ltd.\n+ *\n+ * A counter driver for the Pulse-Width-Modulation (PWM) hardware found on\n+ * Rockchip SoCs such as the RK3576, internally referred to as \"PWM v4\". It\n+ * allows for measuring the high cycles and low cycles of a PWM signal through\n+ * the generic counter framework, while guaranteeing exclusive use over the\n+ * MFPWM device while the counter is enabled.\n+ *\n+ * Authors:\n+ * Nicolas Frattaroli <nicolas.frattaroli@collabora.com>\n+ */\n+\n+#include <linux/cleanup.h>\n+#include <linux/counter.h>\n+#include <linux/devm-helpers.h>\n+#include <linux/interrupt.h>\n+#include <linux/mfd/rockchip-mfpwm.h>\n+#include <linux/mod_devicetable.h>\n+#include <linux/of.h>\n+#include <linux/platform_device.h>\n+#include <linux/spinlock.h>\n+\n+#define RKPWMC_INT_MASK\t\t\t(PWMV4_INT_LPC | PWMV4_INT_HPC)\n+\n+struct rockchip_pwm_capture {\n+\tstruct rockchip_mfpwm_func *pwmf;\n+\tstruct counter_device *counter;\n+};\n+\n+static struct counter_signal rkpwmc_signals[] = {\n+\t{\n+\t\t.id = 0,\n+\t\t.name = \"PWM Clock\"\n+\t},\n+};\n+\n+static const enum counter_synapse_action rkpwmc_hpc_lpc_actions[] = {\n+\tCOUNTER_SYNAPSE_ACTION_BOTH_EDGES,\n+\tCOUNTER_SYNAPSE_ACTION_NONE,\n+};\n+\n+static struct counter_synapse rkpwmc_pwm_synapses[] = {\n+\t{\n+\t\t.actions_list = rkpwmc_hpc_lpc_actions,\n+\t\t.num_actions = ARRAY_SIZE(rkpwmc_hpc_lpc_actions),\n+\t\t.signal = &rkpwmc_signals[0]\n+\t},\n+};\n+\n+static const enum counter_function rkpwmc_functions[] = {\n+\tCOUNTER_FUNCTION_INCREASE,\n+};\n+\n+static inline bool rkpwmc_is_enabled(struct rockchip_mfpwm_func *pwmf)\n+{\n+\treturn mfpwm_get_mode(pwmf) == PWMV4_MODE_CAPTURE;\n+}\n+\n+static bool rkpwmc_acquire_if_enabled(struct rockchip_pwm_capture *pc)\n+{\n+\tint ret;\n+\n+\tret = mfpwm_acquire(pc->pwmf);\n+\tif (ret < 0)\n+\t\treturn false;\n+\n+\tif (rkpwmc_is_enabled(pc->pwmf))\n+\t\treturn true;\n+\n+\tmfpwm_release(pc->pwmf);\n+\n+\treturn false;\n+}\n+\n+static int rkpwmc_enable_read(struct counter_device *counter,\n+\t\t\t struct counter_count *count,\n+\t\t\t u8 *enable)\n+{\n+\tstruct rockchip_pwm_capture *pc = counter_priv(counter);\n+\n+\t*enable = rkpwmc_is_enabled(pc->pwmf);\n+\n+\treturn 0;\n+}\n+\n+static int rkpwmc_enable_write(struct counter_device *counter,\n+\t\t\t struct counter_count *count,\n+\t\t\t u8 enable)\n+{\n+\tstruct rockchip_pwm_capture *pc = counter_priv(counter);\n+\tint ret;\n+\n+\tret = mfpwm_acquire(pc->pwmf);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tif (!!enable != rkpwmc_is_enabled(pc->pwmf)) {\n+\t\tif (enable) {\n+\t\t\tmfpwm_reg_write(pc->pwmf->base, PWMV4_REG_ENABLE,\n+\t\t\t\t\t PWMV4_EN(false));\n+\t\t\tmfpwm_reg_write(pc->pwmf->base, PWMV4_REG_CTRL,\n+\t\t\t\t\t PWMV4_CTRL_CAP_FLAGS);\n+\t\t\tmfpwm_reg_write(pc->pwmf->base, PWMV4_REG_INT_EN,\n+\t\t\t\t\t PWMV4_INT_LPC_W(true) |\n+\t\t\t\t\t PWMV4_INT_HPC_W(true));\n+\t\t\tmfpwm_reg_write(pc->pwmf->base, PWMV4_REG_ENABLE,\n+\t\t\t\t\t PWMV4_EN(true) | PWMV4_CLK_EN(true));\n+\n+\t\t\tret = clk_enable(pc->pwmf->core);\n+\t\t\tif (ret)\n+\t\t\t\tgoto err_release;\n+\n+\t\t\tret = clk_rate_exclusive_get(pc->pwmf->core);\n+\t\t\tif (ret)\n+\t\t\t\tgoto err_disable_pwm_clk;\n+\n+\t\t\tret = mfpwm_acquire(pc->pwmf);\n+\t\t\tif (ret)\n+\t\t\t\tgoto err_unprotect_pwm_clk;\n+\t\t} else {\n+\t\t\tmfpwm_reg_write(pc->pwmf->base, PWMV4_REG_INT_EN,\n+\t\t\t\t\t PWMV4_INT_LPC_W(false) |\n+\t\t\t\t\t PWMV4_INT_HPC_W(false));\n+\t\t\tmfpwm_reg_write(pc->pwmf->base, PWMV4_REG_ENABLE,\n+\t\t\t\t\t PWMV4_EN(false) | PWMV4_CLK_EN(false));\n+\t\t\tclk_rate_exclusive_put(pc->pwmf->core);\n+\t\t\tclk_disable(pc->pwmf->core);\n+\t\t\tmfpwm_release(pc->pwmf);\n+\t\t}\n+\t}\n+\n+\tmfpwm_release(pc->pwmf);\n+\n+\treturn 0;\n+\n+err_unprotect_pwm_clk:\n+\tclk_rate_exclusive_put(pc->pwmf->core);\n+err_disable_pwm_clk:\n+\tclk_disable(pc->pwmf->core);\n+err_release:\n+\tmfpwm_release(pc->pwmf);\n+\n+\treturn ret;\n+}\n+\n+static struct counter_comp rkpwmc_ext[] = {\n+\tCOUNTER_COMP_ENABLE(rkpwmc_enable_read, rkpwmc_enable_write),\n+};\n+\n+enum rkpwmc_count_id {\n+\tCOUNT_LPC = 0,\n+\tCOUNT_HPC = 1,\n+};\n+\n+static struct counter_count rkpwmc_counts[] = {\n+\t{\n+\t\t.id = COUNT_LPC,\n+\t\t.name = \"Low Polarity Capture\",\n+\t\t.functions_list = rkpwmc_functions,\n+\t\t.num_functions = ARRAY_SIZE(rkpwmc_functions),\n+\t\t.synapses = rkpwmc_pwm_synapses,\n+\t\t.num_synapses = ARRAY_SIZE(rkpwmc_pwm_synapses),\n+\t\t.ext = rkpwmc_ext,\n+\t\t.num_ext = ARRAY_SIZE(rkpwmc_ext),\n+\t},\n+\t{\n+\t\t.id = COUNT_HPC,\n+\t\t.name = \"High Polarity Capture\",\n+\t\t.functions_list = rkpwmc_functions,\n+\t\t.num_functions = ARRAY_SIZE(rkpwmc_functions),\n+\t\t.synapses = rkpwmc_pwm_synapses,\n+\t\t.num_synapses = ARRAY_SIZE(rkpwmc_pwm_synapses),\n+\t\t.ext = rkpwmc_ext,\n+\t\t.num_ext = ARRAY_SIZE(rkpwmc_ext),\n+\t},\n+};\n+\n+static int rkpwmc_count_read(struct counter_device *counter,\n+\t\t\t struct counter_count *count, u64 *value)\n+{\n+\tstruct rockchip_pwm_capture *pc = counter_priv(counter);\n+\n+\tswitch (count->id) {\n+\tcase COUNT_LPC:\n+\t\tif (rkpwmc_acquire_if_enabled(pc)) {\n+\t\t\t*value = mfpwm_reg_read(pc->pwmf->base, PWMV4_REG_LPC);\n+\t\t\tmfpwm_release(pc->pwmf);\n+\t\t} else {\n+\t\t\t*value = 0;\n+\t\t}\n+\t\treturn 0;\n+\tcase COUNT_HPC:\n+\t\tif (rkpwmc_acquire_if_enabled(pc)) {\n+\t\t\t*value = mfpwm_reg_read(pc->pwmf->base, PWMV4_REG_HPC);\n+\t\t\tmfpwm_release(pc->pwmf);\n+\t\t} else {\n+\t\t\t*value = 0;\n+\t\t}\n+\t\treturn 0;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static const struct counter_ops rkpwmc_ops = {\n+\t.count_read = rkpwmc_count_read,\n+};\n+\n+static irqreturn_t rkpwmc_irq_handler(int irq, void *data)\n+{\n+\tstruct rockchip_pwm_capture *pc = data;\n+\tu32 intsts;\n+\tu32 clr = 0;\n+\n+\tintsts = mfpwm_reg_read(pc->pwmf->base, PWMV4_REG_INTSTS);\n+\n+\tif (!(intsts & RKPWMC_INT_MASK))\n+\t\treturn IRQ_NONE;\n+\n+\tif (intsts & PWMV4_INT_LPC) {\n+\t\tclr |= PWMV4_INT_LPC;\n+\t\tcounter_push_event(pc->counter, COUNTER_EVENT_CHANGE_OF_STATE, 0);\n+\t}\n+\n+\tif (intsts & PWMV4_INT_HPC) {\n+\t\tclr |= PWMV4_INT_HPC;\n+\t\tcounter_push_event(pc->counter, COUNTER_EVENT_CHANGE_OF_STATE, 1);\n+\t}\n+\n+\tif (clr)\n+\t\tmfpwm_reg_write(pc->pwmf->base, PWMV4_REG_INTSTS, clr);\n+\n+\t/* If other interrupt status bits are set, they're not for this driver */\n+\tif (intsts != clr)\n+\t\treturn IRQ_NONE;\n+\n+\treturn IRQ_HANDLED;\n+}\n+\n+static int rockchip_pwm_capture_probe(struct platform_device *pdev)\n+{\n+\tstruct rockchip_mfpwm_func *pwmf = dev_get_platdata(&pdev->dev);\n+\tstruct rockchip_pwm_capture *pc;\n+\tstruct counter_device *counter;\n+\tint ret;\n+\n+\t/* Set our (still unset) OF node to the parent MFD device's OF node */\n+\tpdev->dev.parent->of_node_reused = true;\n+\tdevice_set_node(&pdev->dev,\n+\t\t\tof_fwnode_handle(no_free_ptr(pdev->dev.parent->of_node)));\n+\n+\tcounter = devm_counter_alloc(&pdev->dev, sizeof(*pc));\n+\tif (IS_ERR(counter))\n+\t\treturn PTR_ERR(counter);\n+\n+\tpc = counter_priv(counter);\n+\tpc->pwmf = pwmf;\n+\n+\tplatform_set_drvdata(pdev, pc);\n+\n+\t/* If the counter is on at module probe, acquire it */\n+\trkpwmc_acquire_if_enabled(pc);\n+\n+\tcounter->name = pdev->name;\n+\tcounter->signals = rkpwmc_signals;\n+\tcounter->num_signals = ARRAY_SIZE(rkpwmc_signals);\n+\tcounter->ops = &rkpwmc_ops;\n+\tcounter->counts = rkpwmc_counts;\n+\tcounter->num_counts = ARRAY_SIZE(rkpwmc_counts);\n+\n+\tpc->counter = counter;\n+\n+\tret = devm_counter_add(&pdev->dev, counter);\n+\tif (ret < 0)\n+\t\treturn dev_err_probe(&pdev->dev, ret, \"Failed to add counter\\n\");\n+\n+\tret = devm_request_irq(&pdev->dev, pwmf->irq, rkpwmc_irq_handler,\n+\t\t\t IRQF_SHARED, pdev->name, pc);\n+\tif (ret)\n+\t\treturn dev_err_probe(&pdev->dev, ret, \"Failed requesting IRQ\\n\");\n+\n+\treturn 0;\n+}\n+\n+static const struct platform_device_id rockchip_pwm_capture_id_table[] = {\n+\t{ .name = \"rockchip-pwm-capture\", },\n+\t{ /* sentinel */ },\n+};\n+MODULE_DEVICE_TABLE(platform, rockchip_pwm_capture_id_table);\n+\n+static struct platform_driver rockchip_pwm_capture_driver = {\n+\t.probe = rockchip_pwm_capture_probe,\n+\t.id_table = rockchip_pwm_capture_id_table,\n+\t.driver = {\n+\t\t.name = \"rockchip-pwm-capture\",\n+\t},\n+};\n+module_platform_driver(rockchip_pwm_capture_driver);\n+\n+MODULE_AUTHOR(\"Nicolas Frattaroli <nicolas.frattaroli@collabora.com>\");\n+MODULE_DESCRIPTION(\"Rockchip PWM Counter Capture Driver\");\n+MODULE_LICENSE(\"GPL\");\n+MODULE_IMPORT_NS(\"ROCKCHIP_MFPWM\");\n+MODULE_IMPORT_NS(\"COUNTER\");\n+MODULE_ALIAS(\"platform:rockchip-pwm-capture\");\n", "prefixes": [ "v5", "4/6" ] }