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GET /api/1.1/patches/2225172/?format=api
{ "id": 2225172, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225172/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420140552.104369-2-eric.auger@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260420140552.104369-2-eric.auger@redhat.com>", "date": "2026-04-20T14:03:51", "name": "[v10,1/7] target/arm/cpu: Introduce the infrastructure for cpreg migration tolerances", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f2adbbb2663e8c293b117d41e389571fde3e1f39", "submitter": { "id": 69187, "url": "http://patchwork.ozlabs.org/api/1.1/people/69187/?format=api", "name": "Eric Auger", "email": "eric.auger@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420140552.104369-2-eric.auger@redhat.com/mbox/", "series": [ { "id": 500612, "url": "http://patchwork.ozlabs.org/api/1.1/series/500612/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500612", "date": "2026-04-20T14:03:52", "name": "[v10,1/7] target/arm/cpu: Introduce the infrastructure for cpreg migration tolerances", "version": 10, "mbox": "http://patchwork.ozlabs.org/series/500612/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225172/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225172/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=G+wW7Z8K;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fznPk06Q7z1yGs\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 21 Apr 2026 00:07:54 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wEpGu-000337-9G; Mon, 20 Apr 2026 10:06:44 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <eric.auger@redhat.com>)\n id 1wEpGT-0002z4-Cp\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 10:06:19 -0400", "from us-smtp-delivery-124.mimecast.com ([170.10.129.124])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <eric.auger@redhat.com>)\n id 1wEpGN-0001Mx-Ff\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 10:06:14 -0400", "from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com\n (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by\n relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,\n cipher=TLS_AES_256_GCM_SHA384) id us-mta-361-7VcxzBEMNciAS8a8jBKShw-1; Mon,\n 20 Apr 2026 10:06:06 -0400", "from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com\n (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS\n id CEEB618005BE; Mon, 20 Apr 2026 14:06:04 +0000 (UTC)", "from laptop.redhat.com (unknown [10.44.32.74])\n by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP\n id 0EB9C180057E; Mon, 20 Apr 2026 14:06:00 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1776693969;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=2GT9RJqWPAezmRzAH3IGO5ZTeLTnQClTHnsjsx0rbWA=;\n b=G+wW7Z8KSv7QtQxjflKNkiponn9yl4JjCAr1gPP43I1L9SkAaT/ldcqvTw7MiV87KiHp3O\n pCeO0/9XVD8t095Oj90vuPid/C6OBDbGGXyevofqKHaz54dNCKEW4WLXCNqsf9WUsgtZ06\n X08palsuPQZKJ/JQNpZLAhEjn3gQ5e4=", "X-MC-Unique": "7VcxzBEMNciAS8a8jBKShw-1", "X-Mimecast-MFC-AGG-ID": "7VcxzBEMNciAS8a8jBKShw_1776693965", "From": "Eric Auger <eric.auger@redhat.com>", "To": "eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org,\n qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com,\n sebott@redhat.com, peterx@redhat.com, philmd@linaro.org,\n alex.bennee@linaro.org", "Subject": "[PATCH v10 1/7] target/arm/cpu: Introduce the infrastructure for\n cpreg migration tolerances", "Date": "Mon, 20 Apr 2026 16:03:51 +0200", "Message-ID": "<20260420140552.104369-2-eric.auger@redhat.com>", "In-Reply-To": "<20260420140552.104369-1-eric.auger@redhat.com>", "References": "<20260420140552.104369-1-eric.auger@redhat.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Scanned-By": "MIMEDefang 3.4.1 on 10.30.177.93", "Received-SPF": "pass client-ip=170.10.129.124;\n envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "We introduce a datatype for a tolerance with respect to a given\ncpreg migration issue. The tolerance applies to a given cpreg kvm index,\nand can be of different types:\na) mismatch in cpreg indexes\n- ToleranceNotOnBothEnds (cpreg index is allowed to be only present\n on one end)\n- ToleranceOnlySrcTestValue (cpreg index is allowed to be only\n present in source if its value @mask field matches @value)\nb) mismatch in cpreg values\n- ToleranceDiffInMask (value differences are allowed only within a mask)\n- ToleranceFieldLT (incoming field value must be less than a given value)\n- ToleranceFieldGT (incoming field value must be greater than a given value)\n\nA QLIST of such tolerances can be populated using a new helper:\narm_register_cpreg_mig_tolerance() and arm_cpu_match_cpreg_mig_tolerance()\nallows to check whether a tolerance exists for a given kvm index and its\ncriterion is matched.\n\ncallers for those helpers will be introduced in subsequent patches.\n\nOnly registration of migration tolerances related to cpreg index\nmismatch is currently allowed.\n\nSigned-off-by: Eric Auger <eric.auger@redhat.com>\n\n---\nv9 -> v10\n- s/CPUCPREG/CPReg\n- move declarations and types to internals.h\n- rework doc comments and detail tolerance types\n- introduce find_mig_tolerance() according to Peter's suggestion\n- added ToleranceOnlySrcTestValue\n\nv8 -> v9\n- fix the tolerance type checking\n- rename arm_cpu_cpreg_has_mig_tolerance into arm_cpu_match_cpreg_mig_tolerance\n---\n target/arm/cpu.h | 1 +\n target/arm/internals.h | 54 ++++++++++++++++++++++++++++\n target/arm/cpu.c | 82 ++++++++++++++++++++++++++++++++++++++++++\n 3 files changed, 137 insertions(+)", "diff": "diff --git a/target/arm/cpu.h b/target/arm/cpu.h\nindex 657ff4ab20b..512d18652aa 100644\n--- a/target/arm/cpu.h\n+++ b/target/arm/cpu.h\n@@ -1139,6 +1139,7 @@ struct ArchCPU {\n \n QLIST_HEAD(, ARMELChangeHook) pre_el_change_hooks;\n QLIST_HEAD(, ARMELChangeHook) el_change_hooks;\n+ QLIST_HEAD(, ARMCPRegMigTolerance) cpreg_mig_tolerances;\n \n int32_t node_id; /* NUMA node this CPU belongs to */\n \ndiff --git a/target/arm/internals.h b/target/arm/internals.h\nindex 85980f0e69a..fb5f11d3e7a 100644\n--- a/target/arm/internals.h\n+++ b/target/arm/internals.h\n@@ -1933,4 +1933,58 @@ int compare_u64(const void *a, const void *b);\n /* Used in FEAT_MEC to set the MECIDWidthm1 field in the MECIDR_EL2 register. */\n #define MECID_WIDTH 16\n \n+typedef enum {\n+ ToleranceNotOnBothEnds,\n+ ToleranceOnlySrcTestValue,\n+ ToleranceDiffInMask,\n+ ToleranceFieldLT,\n+ ToleranceFieldGT,\n+} ARMCPRegMigToleranceType;\n+\n+typedef struct ARMCPRegMigTolerance {\n+ uint64_t kvmidx;\n+ uint64_t mask;\n+ uint64_t value;\n+ ARMCPRegMigToleranceType type;\n+ QLIST_ENTRY(ARMCPRegMigTolerance) node;\n+} ARMCPRegMigTolerance;\n+\n+/**\n+ * arm_register_cpreg_mig_tolerance:\n+ * Register a migration tolerance wrt one given cpreg identified by its\n+ * @kvmidx. Calling this function twice for the same @kvmidx is a\n+ * programming error and will cause an assertion failure.\n+ *\n+ * @cpu: vcpu to apply the migration tolerance on\n+ * @kvmidx: kvm index of the cpreg the tolerance applies to\n+ * @mask: bitmask where a difference is tolerated\n+ * (relevant with ToleranceDiffInMask)\n+ * @value: value the bitmask field is compared with\n+ * (relevant with ToleranceFieldLT and ToleranceFieldGT)\n+ * @type: type of the migration tolerance:\n+ * - ToleranceNotOnBothEnds (cpreg index is allowed to be only present\n+ * on one end)\n+ * - ToleranceOnlySrcTestValue (cpreg index is allowed to be only\n+ * present in source if its value @mask field matches @value)\n+ * - ToleranceDiffInMask (mismatch in cpreg values are only tolerated\n+ * if differences are within @mask)\n+ * - ToleranceFieldLT (mismatch in cpreg values are only tolerated\n+ * if incoming @bitmask field value is less than @value)\n+ * - ToleranceFieldGT (mismatch in cpreg values are only tolerated\n+ * if incoming @bitmask field value is greater than @value)\n+ */\n+void arm_register_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx,\n+ uint64_t mask, uint64_t value,\n+ ARMCPRegMigToleranceType type);\n+\n+/**\n+ * arm_cpu_match_cpreg_mig_tolerance:\n+ * Check whether a tolerance of type @type exists for a given @kvmidx\n+ * and the tolerance criterion is satisfied\n+ */\n+bool arm_cpu_match_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx,\n+ uint64_t vmstate_value, uint64_t local_value,\n+ ARMCPRegMigToleranceType type);\n+\n+\n #endif\ndiff --git a/target/arm/cpu.c b/target/arm/cpu.c\nindex ccc47c8a9ad..7fae97ef40b 100644\n--- a/target/arm/cpu.c\n+++ b/target/arm/cpu.c\n@@ -181,6 +181,82 @@ void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,\n QLIST_INSERT_HEAD(&cpu->el_change_hooks, entry, node);\n }\n \n+static ARMCPRegMigTolerance *find_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx)\n+{\n+ ARMCPRegMigTolerance *t;\n+ QLIST_FOREACH(t, &cpu->cpreg_mig_tolerances, node) {\n+ if (t->kvmidx == kvmidx) {\n+ return t;\n+ }\n+ }\n+ return NULL;\n+}\n+\n+void arm_register_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx,\n+ uint64_t mask, uint64_t value,\n+ ARMCPRegMigToleranceType type)\n+{\n+ ARMCPRegMigTolerance *entry;\n+\n+ /* make sure the kvmidx has not tolerance already registered */\n+ assert(!find_mig_tolerance(cpu, kvmidx));\n+\n+ assert(type == ToleranceNotOnBothEnds ||\n+ type == ToleranceOnlySrcTestValue);\n+\n+ entry = g_new0(ARMCPRegMigTolerance, 1);\n+\n+ entry->kvmidx = kvmidx;\n+ entry->mask = mask;\n+ entry->value = value;\n+ entry->type = type;\n+\n+ QLIST_INSERT_HEAD(&cpu->cpreg_mig_tolerances, entry, node);\n+}\n+\n+bool arm_cpu_match_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx,\n+ uint64_t vmstate_value, uint64_t local_value,\n+ ARMCPRegMigToleranceType type)\n+{\n+ ARMCPRegMigTolerance *t = find_mig_tolerance(cpu, kvmidx);\n+ uint64_t diff, diff_outside_mask, field;\n+\n+ if (!t || t->type != type) {\n+ return false;\n+ }\n+\n+ if (type == ToleranceNotOnBothEnds) {\n+ return true;\n+ }\n+\n+ if (type == ToleranceOnlySrcTestValue &&\n+ ((vmstate_value & t->mask) == t->value)) {\n+ return true;\n+ }\n+\n+ /* Need to check the mask */\n+ diff = vmstate_value ^ local_value;\n+ diff_outside_mask = diff & ~t->mask;\n+\n+ if (diff_outside_mask) {\n+ /* there are differences outside of the mask */\n+ return false;\n+ }\n+ if (type == ToleranceDiffInMask) {\n+ /* differences only in the field, tolerance matched */\n+ return true;\n+ }\n+ /* need to compare field value against authorized ones */\n+ field = vmstate_value & t->mask;\n+ if (type == ToleranceFieldLT && (field < t->value)) {\n+ return true;\n+ }\n+ if (type == ToleranceFieldGT && (field > t->value)) {\n+ return true;\n+ }\n+ return false;\n+}\n+\n static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque)\n {\n /* Reset a single ARMCPRegInfo register */\n@@ -1106,6 +1182,7 @@ static void arm_cpu_initfn(Object *obj)\n \n QLIST_INIT(&cpu->pre_el_change_hooks);\n QLIST_INIT(&cpu->el_change_hooks);\n+ QLIST_INIT(&cpu->cpreg_mig_tolerances);\n \n #ifdef CONFIG_USER_ONLY\n # ifdef TARGET_AARCH64\n@@ -1550,6 +1627,7 @@ static void arm_cpu_finalizefn(Object *obj)\n {\n ARMCPU *cpu = ARM_CPU(obj);\n ARMELChangeHook *hook, *next;\n+ ARMCPRegMigTolerance *t, *n;\n \n g_hash_table_destroy(cpu->cp_regs);\n \n@@ -1561,6 +1639,10 @@ static void arm_cpu_finalizefn(Object *obj)\n QLIST_REMOVE(hook, node);\n g_free(hook);\n }\n+ QLIST_FOREACH_SAFE(t, &cpu->cpreg_mig_tolerances, node, n) {\n+ QLIST_REMOVE(t, node);\n+ g_free(t);\n+ }\n #ifndef CONFIG_USER_ONLY\n if (cpu->pmu_timer) {\n timer_free(cpu->pmu_timer);\n", "prefixes": [ "v10", "1/7" ] }