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GET /api/1.1/patches/2225146/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2225146,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225146/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260420123135.350446-2-ajay.nandam@oss.qualcomm.com/",
    "project": {
        "id": 42,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api",
        "name": "Linux GPIO development",
        "link_name": "linux-gpio",
        "list_id": "linux-gpio.vger.kernel.org",
        "list_email": "linux-gpio@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260420123135.350446-2-ajay.nandam@oss.qualcomm.com>",
    "date": "2026-04-20T12:31:33",
    "name": "[v2,1/3] pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "a47a6db6e2a9624b262342e4faab567bb82360df",
    "submitter": {
        "id": 93131,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/93131/?format=api",
        "name": "Ajay Kumar Nandam",
        "email": "ajay.nandam@oss.qualcomm.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260420123135.350446-2-ajay.nandam@oss.qualcomm.com/mbox/",
    "series": [
        {
            "id": 500603,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/500603/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=500603",
            "date": "2026-04-20T12:31:33",
            "name": "pinctrl: qcom: lpass-lpi: Switch to PM clock framework",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/500603/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2225146/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2225146/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-gpio+bounces-35258-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-gpio@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
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        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776688317; cv=none;\n b=GF6Bhv62bFwpCOF+KL0+cFU05FVc4F+1FhYinhLw/qkhNZO+vHAWbX3YTHIvxlGmPaEyx7ykYfgHHbjGhfPDF/da21Ib5swGt6bfhtDKpxRf6lZ/mBpezYs5+CV8qgswxou9n+Juf4efmkmUHrDVU5ddOzWfcLAmdAMaXU8fwOc=",
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        ],
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20251104; t=1776688314; x=1777293114;\n        h=content-transfer-encoding:mime-version:references:in-reply-to\n         :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n         :to:cc:subject:date:message-id:reply-to;\n        bh=BuyqIDl4EgS9NX7o0yRwJQQxQlytyU2BJsEt6TVPCdg=;\n        b=S4+oXlEpabDEgbYvCiP2cR58aZTkGVm2GyY3P3nxtzDi1hFRWcDKpMk195Ro9TvVBz\n         xTMQOeQjlyP7r+NHOsyiPYnBIjxJjkMJKnMjkgzSYqJqcYmi8xLpbRhs3WihJqNvFLjf\n         jvzn2Us8ViDzxPL8YSCnuFBSuT+oEFo6+WahF/aM8NSlOziA/PpCd/Io170DWmpz8S1n\n         Le9VGJv2tSpimAhViX6fm9wyTyM2/By0eTv4geW8AZSSeAZlfJZKqfVWm75JZT+xwEVS\n         AR6KeYQZaIntRCWJj85OP4esALdoqeNsqL0Jt2HcL71mGi2FjOw6AkDikJVnK44bw7H/\n         L0Hg==",
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        ],
        "From": "Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>",
        "To": "Bjorn Andersson <andersson@kernel.org>, Linus Walleij <linusw@kernel.org>",
        "Cc": "linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,\n        linux-kernel@vger.kernel.org, mohammad.rafi.shaik@oss.qualcomm.com,\n        ajay.nandam@oss.qualcomm.com",
        "Subject": "[PATCH v2 1/3] pinctrl: qcom: lpass-lpi: Switch to PM clock framework\n for runtime PM",
        "Date": "Mon, 20 Apr 2026 18:01:33 +0530",
        "Message-Id": "<20260420123135.350446-2-ajay.nandam@oss.qualcomm.com>",
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        "References": "<20260420123135.350446-1-ajay.nandam@oss.qualcomm.com>",
        "Precedence": "bulk",
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    },
    "content": "Convert the LPASS LPI pinctrl driver to use the PM clock framework for\nruntime power management.\n\nThis allows the LPASS LPI pinctrl driver to drop clock votes when idle,\nimproves power efficiency on platforms using LPASS LPI island mode, and\naligns the driver with common runtime PM patterns used across Qualcomm\nLPASS subsystems.\n\nSigned-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>\n---\n drivers/pinctrl/qcom/pinctrl-lpass-lpi.c      | 22 +++++++++----------\n .../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c   |  7 ++++++\n 2 files changed, 18 insertions(+), 11 deletions(-)",
    "diff": "diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\nindex 76aed3296279..2b0956ff2ae0 100644\n--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n@@ -15,6 +15,8 @@\n #include <linux/pinctrl/pinconf-generic.h>\n #include <linux/pinctrl/pinconf.h>\n #include <linux/pinctrl/pinmux.h>\n+#include <linux/pm_clock.h>\n+#include <linux/pm_runtime.h>\n \n #include \"../pinctrl-utils.h\"\n \n@@ -22,7 +24,6 @@\n \n #define MAX_NR_GPIO\t\t32\n #define GPIO_FUNC\t\t0\n-#define MAX_LPI_NUM_CLKS\t2\n \n struct lpi_pinctrl {\n \tstruct device *dev;\n@@ -31,7 +32,6 @@ struct lpi_pinctrl {\n \tstruct pinctrl_desc desc;\n \tchar __iomem *tlmm_base;\n \tchar __iomem *slew_base;\n-\tstruct clk_bulk_data clks[MAX_LPI_NUM_CLKS];\n \t/* Protects from concurrent register updates */\n \tstruct mutex lock;\n \tDECLARE_BITMAP(ever_gpio, MAX_NR_GPIO);\n@@ -480,9 +480,6 @@ int lpi_pinctrl_probe(struct platform_device *pdev)\n \tpctrl->data = data;\n \tpctrl->dev = &pdev->dev;\n \n-\tpctrl->clks[0].id = \"core\";\n-\tpctrl->clks[1].id = \"audio\";\n-\n \tpctrl->tlmm_base = devm_platform_ioremap_resource(pdev, 0);\n \tif (IS_ERR(pctrl->tlmm_base))\n \t\treturn dev_err_probe(dev, PTR_ERR(pctrl->tlmm_base),\n@@ -495,13 +492,17 @@ int lpi_pinctrl_probe(struct platform_device *pdev)\n \t\t\t\t\t     \"Slew resource not provided\\n\");\n \t}\n \n-\tret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks);\n+\tret = devm_pm_clk_create(dev);\n \tif (ret)\n \t\treturn ret;\n \n-\tret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks);\n-\tif (ret)\n-\t\treturn dev_err_probe(dev, ret, \"Can't enable clocks\\n\");\n+\tret = of_pm_clk_add_clks(dev);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\tpm_runtime_set_autosuspend_delay(dev, 100);\n+\tpm_runtime_use_autosuspend(dev);\n+\tdevm_pm_runtime_enable(dev);\n \n \tpctrl->desc.pctlops = &lpi_gpio_pinctrl_ops;\n \tpctrl->desc.pmxops = &lpi_gpio_pinmux_ops;\n@@ -539,8 +540,8 @@ int lpi_pinctrl_probe(struct platform_device *pdev)\n \treturn 0;\n \n err_pinctrl:\n+\tpm_runtime_disable(dev);\n \tmutex_destroy(&pctrl->lock);\n-\tclk_bulk_disable_unprepare(MAX_LPI_NUM_CLKS, pctrl->clks);\n \n \treturn ret;\n }\n@@ -552,7 +553,6 @@ void lpi_pinctrl_remove(struct platform_device *pdev)\n \tint i;\n \n \tmutex_destroy(&pctrl->lock);\n-\tclk_bulk_disable_unprepare(MAX_LPI_NUM_CLKS, pctrl->clks);\n \n \tfor (i = 0; i < pctrl->data->npins; i++)\n \t\tpinctrl_generic_remove_group(pctrl->ctrl, i);\ndiff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c\nindex 750f410311a8..64a200dd8f41 100644\n--- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c\n+++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c\n@@ -7,6 +7,8 @@\n #include <linux/gpio/driver.h>\n #include <linux/module.h>\n #include <linux/platform_device.h>\n+#include <linux/pm_clock.h>\n+#include <linux/pm_runtime.h>\n \n #include \"pinctrl-lpass-lpi.h\"\n \n@@ -139,10 +141,15 @@ static const struct of_device_id lpi_pinctrl_of_match[] = {\n };\n MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match);\n \n+static const struct dev_pm_ops lpi_pinctrl_pm_ops = {\n+\tRUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)\n+};\n+\n static struct platform_driver lpi_pinctrl_driver = {\n \t.driver = {\n \t\t   .name = \"qcom-sc7280-lpass-lpi-pinctrl\",\n \t\t   .of_match_table = lpi_pinctrl_of_match,\n+\t\t   .pm = pm_ptr(&lpi_pinctrl_pm_ops),\n \t},\n \t.probe = lpi_pinctrl_probe,\n \t.remove = lpi_pinctrl_remove,\n",
    "prefixes": [
        "v2",
        "1/3"
    ]
}