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GET /api/1.1/patches/2225102/?format=api
{ "id": 2225102, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225102/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420104248.86702-23-mohamed@unpredictable.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260420104248.86702-23-mohamed@unpredictable.fr>", "date": "2026-04-20T10:42:32", "name": "[v2,22/38] whpx: i386: add HV_X64_MSR_GUEST_IDLE when !kernel-irqchip", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "bfe23117078095ea27e2aaa7b26d1b487c114f7a", "submitter": { "id": 91318, "url": "http://patchwork.ozlabs.org/api/1.1/people/91318/?format=api", "name": "Mohamed Mediouni", "email": "mohamed@unpredictable.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420104248.86702-23-mohamed@unpredictable.fr/mbox/", "series": [ { "id": 500592, "url": "http://patchwork.ozlabs.org/api/1.1/series/500592/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500592", "date": "2026-04-20T10:42:10", "name": "WHPX x86 updates for QEMU 11.1", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500592/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225102/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225102/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=g9dcsIzN;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fzj0F4fjrz1yHr\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 20 Apr 2026 20:49:01 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wEm6d-0007LR-B7; Mon, 20 Apr 2026 06:43:55 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wEm6b-0007Ki-IV\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 06:43:53 -0400", "from p-west3-cluster6-host11-snip4-10.eps.apple.com ([57.103.75.33]\n helo=outbound.ms.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wEm6a-0000gC-0M\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 06:43:53 -0400", "from outbound.ms.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-1 (Postfix) with ESMTPS id\n C36E51800EC2; Mon, 20 Apr 2026 10:43:48 +0000 (UTC)", "from localhost.localdomain (unknown [17.57.154.37])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-1 (Postfix) with ESMTPSA id\n 3860218000A8; Mon, 20 Apr 2026 10:43:46 +0000 (UTC)" ], "Dkim-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1776681831; x=1779273831;\n bh=35AwHuK3FNutlfTTq4p+Vg27ixeNuT9FvPY378EVDsQ=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=g9dcsIzNLY+BJW6ySRkk7+o5tgxBqmVyDVPwi+qJaipyJZvst/WVPmngY1NI7elYXTYxGjayco4peUbdNExH23Kgxw8hN6E+6neNpFGm6ZG8IYNtwyQMtRAYIyQRsM8fWk5KJaRNvvSqOmjidJvhVR2lzBRa7F4zk5rdde7eUBwR/K26+W3oIQKMwh88DMkq4Mlestn20YuKwSpXqSeLNvuQqB7kTs3Rav4KajDhUb0TOfpCJLaIetSttyJ8KWKjGfyW9JZuiGgPxZqG2W8wViqKSTTIaONy8C5f0WGpRvxioPUIs+GsSgLb8QTc8+S2ixghzdoGwYq3gZmDTvSn7A==", "mail-alias-created-date": "1752046281608", "From": "Mohamed Mediouni <mohamed@unpredictable.fr>", "To": "qemu-devel@nongnu.org", "Cc": "qemu-arm@nongnu.org, Mohamed Mediouni <mohamed@unpredictable.fr>,\n Paolo Bonzini <pbonzini@redhat.com>,\n Phil Dennis-Jordan <phil@philjordan.eu>,\n Roman Bolshakov <rbolshakov@ddn.com>,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>,\n Pedro Barbuda <pbarbuda@microsoft.com>, Wei Liu <wei.liu@kernel.org>,\n \"Michael S. Tsirkin\" <mst@redhat.com>,\n Peter Maydell <peter.maydell@linaro.org>, Zhao Liu <zhao1.liu@intel.com>", "Subject": "[PATCH v2 22/38] whpx: i386: add HV_X64_MSR_GUEST_IDLE when\n !kernel-irqchip", "Date": "Mon, 20 Apr 2026 12:42:32 +0200", "Message-ID": "<20260420104248.86702-23-mohamed@unpredictable.fr>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260420104248.86702-1-mohamed@unpredictable.fr>", "References": "<20260420104248.86702-1-mohamed@unpredictable.fr>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-GUID": "dE6Sy28pQ6v8HPLMu6rOC2g_RSQ33-4c", "X-Authority-Info-Out": "v=2.4 cv=DOGCIiNb c=1 sm=1 tr=0 ts=69e60365\n cx=c_apl:c_pps:t_out a=qkKslKyYc0ctBTeLUVfTFg==:117 a=A5OVakUREuEA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=mSEN7FZ2dYRJNo9PPvgA:9", "X-Proofpoint-ORIG-GUID": "dE6Sy28pQ6v8HPLMu6rOC2g_RSQ33-4c", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIwMDEwNCBTYWx0ZWRfX/7s1U1iEpY8u\n ZJ2HMCKQaIoxG9HSWTjkfi5jX7O3mzViV6jBElXOxoBTyurbtq+LN/WgjirDgGQxJkIzTSB1U2J\n Rb6XaLeljwlP5V8WSRjrGAwBa25rbFzhBAksOW7VOAJITE5H9ZFHWYTDZeylu05nsV+nIGrqKMQ\n xIOqI6mTbBzxTWejXf+cIZnoZfxQEodb4HJXWu+KG1ktiD7Xk7BpyN3p7Cci8fKv0cdtr1/U/rF\n NJrRChgr61UTrYYIZLYaKxrIFs/oYmSLlnOL/nCTE06LAzVRVhr5KI7dHkdTY8dEv9Xn9DYk8xh\n xe4PHvaTz6HNxO/IyYImGhROQotso7+Brh2uHL69Fze17sQxglxo7IIlJibkkY=", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-20_02,2026-04-17_04,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=notspam policy=default score=0 suspectscore=0\n lowpriorityscore=0 mlxscore=0 spamscore=0\n malwarescore=0 phishscore=0\n adultscore=0 bulkscore=0 mlxlogscore=999 clxscore=1030 classifier=spam\n authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2604200104", "Received-SPF": "pass client-ip=57.103.75.33;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.ms.icloud.com", "X-Spam_score_int": "-27", "X-Spam_score": "-2.8", "X-Spam_bar": "--", "X-Spam_report": "(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Add support for an oddball HV_X64_MSR_GUEST_IDLE not-quite-an-HLT\nthat wakes the vCPU even if EFLAGS.IF is set.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/i386/whpx/whpx-all.c | 46 ++++++++++++++++++++++++++++++++++---\n 1 file changed, 43 insertions(+), 3 deletions(-)", "diff": "diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex 3af5f936d4..4dc4030d87 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -52,6 +52,7 @@\n /* for kernel-irqchip=off */\n #define HV_X64_MSR_APIC_FREQUENCY 0x40000023\n #define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073\n+#define HV_X64_MSR_GUEST_IDLE 0x400000f0\n \n static bool is_modern_os = true;\n \n@@ -1543,13 +1544,16 @@ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid)\n }\n }\n \n-static int whpx_handle_halt(CPUState *cpu)\n+static int whpx_handle_halt_generic(CPUState *cpu)\n {\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+\n int ret = 0;\n \n bql_lock();\n if (!(cpu_test_interrupt(cpu, CPU_INTERRUPT_HARD) &&\n- (cpu_env(cpu)->eflags & IF_MASK)) &&\n+ ((cpu_env(cpu)->eflags & IF_MASK) || env->hflags2 & HF2_HYPERV_HLT_MASK)) &&\n !cpu_test_interrupt(cpu, CPU_INTERRUPT_NMI)) {\n cpu->exception_index = EXCP_HLT;\n cpu->halted = true;\n@@ -1560,6 +1564,27 @@ static int whpx_handle_halt(CPUState *cpu)\n return ret;\n }\n \n+static int whpx_handle_halt(CPUState *cpu)\n+{\n+ int ret = 0;\n+\n+ ret = whpx_handle_halt_generic(cpu);\n+\n+ return ret;\n+}\n+\n+static int whpx_handle_hyperv_guestidle(CPUState *cpu)\n+{\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+ int ret = 0;\n+\n+ env->hflags2 |= HF2_HYPERV_HLT_MASK;\n+ ret = whpx_handle_halt_generic(cpu);\n+\n+ return ret;\n+}\n+\n static void whpx_vcpu_kick_out_of_hlt(CPUState *cpu) \n {\n WHV_REGISTER_VALUE reg;\n@@ -1763,9 +1788,10 @@ static void whpx_vcpu_process_async_events(CPUState *cpu)\n }\n \n if ((cpu_test_interrupt(cpu, CPU_INTERRUPT_HARD) &&\n- (env->eflags & IF_MASK)) ||\n+ ((env->eflags & IF_MASK) || env->hflags2 & HF2_HYPERV_HLT_MASK)) ||\n cpu_test_interrupt(cpu, CPU_INTERRUPT_NMI)) {\n cpu->halted = false;\n+ env->hflags2 &= ~HF2_HYPERV_HLT_MASK;\n }\n \n if (cpu_test_interrupt(cpu, CPU_INTERRUPT_SIPI)) {\n@@ -2035,6 +2061,20 @@ int whpx_vcpu_run(CPUState *cpu)\n }\n }\n \n+ /*\n+ * Windows and Linux both use this MSR.\n+ * Windows 11 25H2 uses it even when not advertised.\n+ */\n+ if (vcpu->exit_ctx.MsrAccess.MsrNumber == HV_X64_MSR_GUEST_IDLE\n+ && !vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite\n+ && !whpx_irqchip_in_kernel()\n+ && whpx->hyperv_enlightenments_enabled) {\n+ is_known_msr = 1;\n+ whpx_bump_rip(cpu, &vcpu->exit_ctx);\n+ ret = whpx_handle_hyperv_guestidle(cpu);\n+ break;\n+ }\n+\n /*\n * Linux tries to use it anyway even when not exposed. \n * Ignore the write as the VP assist page is not used.\n", "prefixes": [ "v2", "22/38" ] }