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GET /api/1.1/patches/2224728/?format=api
{ "id": 2224728, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2224728/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260417233535.524431-1-hongtao.liu@intel.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260417233535.524431-1-hongtao.liu@intel.com>", "date": "2026-04-17T23:35:35", "name": "late-combine: Don't substitute REG_EQUAL/REG_EQUIV notes that reference MEM [PR124894]", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "dad52f8d92fb4b74433d9e11810d54a61b65738b", "submitter": { "id": 79166, "url": "http://patchwork.ozlabs.org/api/1.1/people/79166/?format=api", "name": "liuhongt", "email": "hongtao.liu@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260417233535.524431-1-hongtao.liu@intel.com/mbox/", "series": [ { "id": 500411, "url": "http://patchwork.ozlabs.org/api/1.1/series/500411/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500411", "date": "2026-04-17T23:35:35", "name": "late-combine: Don't substitute REG_EQUAL/REG_EQUIV notes that reference MEM [PR124894]", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500411/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224728/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224728/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Vf0LLSbr;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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Fri, 17 Apr 2026 23:36:05 +0000 (GMT)", "from mgamail.intel.com (mgamail.intel.com [198.175.65.10])\n by sourceware.org (Postfix) with ESMTPS id 324964BA2E1D\n for <gcc-patches@gcc.gnu.org>; Fri, 17 Apr 2026 23:35:37 +0000 (GMT)", "from fmviesa005.fm.intel.com ([10.60.135.145])\n by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Apr 2026 16:35:36 -0700", "from scymds04.sc.intel.com ([10.82.73.238])\n by fmviesa005.fm.intel.com with ESMTP; 17 Apr 2026 16:35:35 -0700", "from jfel-spr-6155.jf.intel.com (jfel-spr-6155.jf.intel.com\n [10.165.119.109])\n by scymds04.sc.intel.com (Postfix) with ESMTP id 2B4B12003101;\n Fri, 17 Apr 2026 16:35:35 -0700 (PDT)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org 37DC84C9176C", "OpenDKIM Filter v2.11.0 sourceware.org 324964BA2E1D" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 324964BA2E1D", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 324964BA2E1D", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; 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a=\"94885370\"", "E=Sophos;i=\"6.23,185,1770624000\"; d=\"scan'208\";a=\"94885370\"", "E=Sophos;i=\"6.23,185,1770624000\"; d=\"scan'208\";a=\"236136242\"" ], "X-ExtLoop1": "1", "From": "liuhongt <hongtao.liu@intel.com>", "To": "gcc-patches@gcc.gnu.org", "Cc": "rguenther@suse.de,\n\t\"Claude Opus 4 . 6\" <noreply@anthropic.com>", "Subject": "[PATCH] late-combine: Don't substitute REG_EQUAL/REG_EQUIV notes that\n reference MEM [PR124894]", "Date": "Fri, 17 Apr 2026 16:35:35 -0700", "Message-Id": "<20260417233535.524431-1-hongtao.liu@intel.com>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "DSE can forward-substitute a stored value into a load and then delete\nthe store as dead. This leaves REG_EQUAL notes on other insns that\nreference the same memory location stale, since the memory now holds\na different (older) value.\n\nWhen late-combine propagates a register source into such a stale\nREG_EQUAL note, the note can end up with two identical MEM references\n(e.g. (minus (mem[X]) (mem[X]))) that simplify_binary_operation folds\nto zero. IRA then promotes REG_EQUAL(0) to REG_EQUIV(0), and reload\neliminates the computation entirely, producing wrong code.\n\nFix this by dropping REG_EQUAL/REG_EQUIV notes that contain any\nnon-readonly MEM before propagating into them. Read-only MEMs (such\nas constant pool references) are safe since their contents cannot\nchange. REG_EQUAL notes are just optimization hints, so dropping\nthem is always safe.\n\n\nBootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.\nOk for trunk?\n\ngcc/ChangeLog:\n\n\tPR rtl-optimization/124894\n\t* rtl.h (contains_nonreadonly_mem_rtx_p): Declare.\n\t* rtlanal.cc (contains_nonreadonly_mem_rtx_p): New function.\n\t* late-combine.cc (insn_combination::substitute_note): Drop\n\tREG_EQUAL/REG_EQUIV notes that reference non-readonly MEM.\n\ngcc/testsuite/ChangeLog:\n\n\tPR rtl-optimization/124894\n\t* gcc.dg/pr124894.c: New test.\n\nAssisted-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>\n---\n gcc/late-combine.cc | 11 ++++++++++\n gcc/rtl.h | 1 +\n gcc/rtlanal.cc | 13 ++++++++++++\n gcc/testsuite/gcc.dg/pr124894.c | 36 +++++++++++++++++++++++++++++++++\n 4 files changed, 61 insertions(+)\n create mode 100644 gcc/testsuite/gcc.dg/pr124894.c", "diff": "diff --git a/gcc/late-combine.cc b/gcc/late-combine.cc\nindex aeb3ba17615..069d6b21161 100644\n--- a/gcc/late-combine.cc\n+++ b/gcc/late-combine.cc\n@@ -350,6 +350,17 @@ insn_combination::substitute_note (insn_info *use_insn, rtx note,\n if (REG_NOTE_KIND (note) == REG_EQUAL\n || REG_NOTE_KIND (note) == REG_EQUIV)\n {\n+ // If the note references a MEM, drop it rather than propagating\n+ // into it. The MEM's value may have been changed by a store that\n+ // was later deleted (e.g. by DSE), making the note stale.\n+ // Propagating into such a note could produce incorrect\n+ // simplifications (e.g. (minus (mem) (mem)) folded to zero when\n+ // the two references actually correspond to different values).\n+ // Read-only MEMs are safe, since their contents cannot change.\n+ // Since the note is just a hint, it is always safe to drop it.\n+ if (contains_nonreadonly_mem_rtx_p (XEXP (note, 0)))\n+\treturn false;\n+\n insn_propagation prop (use_insn->rtl (), m_dest, m_src);\n return (prop.apply_to_note (&XEXP (note, 0))\n \t && (can_propagate || prop.num_replacements == 0));\ndiff --git a/gcc/rtl.h b/gcc/rtl.h\nindex eebcc18a4f1..a5ccdadcfc2 100644\n--- a/gcc/rtl.h\n+++ b/gcc/rtl.h\n@@ -3765,6 +3765,7 @@ extern rtx tablejump_casesi_pattern (const rtx_insn *insn);\n extern bool computed_jump_p (const rtx_insn *);\n extern bool tls_referenced_p (const_rtx);\n extern bool contains_mem_rtx_p (rtx x);\n+extern bool contains_nonreadonly_mem_rtx_p (rtx x);\n extern bool register_asm_p (const_rtx);\n \n /* Overload for refers_to_regno_p for checking a single register. */\ndiff --git a/gcc/rtlanal.cc b/gcc/rtlanal.cc\nindex 88561a54e5a..70c75a0dee3 100644\n--- a/gcc/rtlanal.cc\n+++ b/gcc/rtlanal.cc\n@@ -710,6 +710,19 @@ contains_mem_rtx_p (rtx x)\n return false;\n }\n \n+/* Return true if X contains a MEM subrtx whose contents might change. */\n+\n+bool\n+contains_nonreadonly_mem_rtx_p (rtx x)\n+{\n+ subrtx_iterator::array_type array;\n+ FOR_EACH_SUBRTX (iter, array, x, ALL)\n+ if (MEM_P (*iter) && !MEM_READONLY_P (*iter))\n+ return true;\n+\n+ return false;\n+}\n+\n /* Return true if X is an address that is known to not be zero. */\n \n bool\ndiff --git a/gcc/testsuite/gcc.dg/pr124894.c b/gcc/testsuite/gcc.dg/pr124894.c\nnew file mode 100644\nindex 00000000000..f906169c699\n--- /dev/null\n+++ b/gcc/testsuite/gcc.dg/pr124894.c\n@@ -0,0 +1,36 @@\n+/* { dg-do run } */\n+/* { dg-require-effective-target int128 } */\n+/* { dg-require-effective-target lp64 } */\n+/* { dg-options \"-O2 -fno-strict-aliasing\" } */\n+\n+/* PR rtl-optimization/124894 */\n+/* DSE can delete a store after forward-substituting the stored value into\n+ a load, leaving a stale MEM in a REG_EQUAL note. Late-combine must not\n+ propagate into such notes, as the resulting simplification (e.g.\n+ (minus (mem) (mem)) -> 0) would be wrong. */\n+\n+short s;\n+__int128 z;\n+long g;\n+\n+__attribute__((noipa)) long\n+foo (short a)\n+{\n+ long t = 0;\n+ char c = *(char *) __builtin_memset (&z, 2, 6);\n+ __builtin_memset (&s, c, 2);\n+ __builtin_memmove (&t, &g, 4);\n+ long u = -t;\n+ long v = *(long *) __builtin_memset (&t, a | 6, 8);\n+ __int128 w = z % s;\n+ long r = w + t + u + v;\n+ return r;\n+}\n+\n+int\n+main ()\n+{\n+ long x = foo (0);\n+ if (x != 0x0c0c0c0c0c0c0c0c)\n+ __builtin_abort ();\n+}\n", "prefixes": [] }