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GET /api/1.1/patches/2223868/?format=api
{ "id": 2223868, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223868/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260416093041.42070-6-fengchengwen@huawei.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260416093041.42070-6-fengchengwen@huawei.com>", "date": "2026-04-16T09:30:41", "name": "[v2,RESEND,5/5] vfio/pci: Add PCIe TPH SET_ST interface", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9927f360430236b902ac301e3d13b3baea183c17", "submitter": { "id": 92756, "url": "http://patchwork.ozlabs.org/api/1.1/people/92756/?format=api", "name": "Chengwen Feng", "email": "fengchengwen@huawei.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260416093041.42070-6-fengchengwen@huawei.com/mbox/", "series": [ { "id": 500126, "url": "http://patchwork.ozlabs.org/api/1.1/series/500126/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=500126", "date": "2026-04-16T09:30:36", "name": "vfio/pci: Add PCIe TPH support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500126/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223868/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223868/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-52590-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=N3ntHYJQ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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Thu, 16 Apr 2026 17:30:48 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776331853; cv=none;\n b=sGDkVPYEHVzmOnZD3q8RS+kEyNpRtocbjNeinmTySqDmdRFEbXpUWjEjLlXzQU8P73+tAASskfTOPLNV7HJIC+OChNUWNK44/QxwIElzx0BZ00hltidfB0vMMa/hxi0LKGJPjFMxMDBE7zYrwx3FniGq8VKwQLocdb4j8BJY53U=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776331853; c=relaxed/simple;\n\tbh=0ZzbJT9E7RzYbJf0gsVuCsMfn7oF4dp4mRbLQzvfCLw=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=G7MhECZz7LB6DdetOQeiOFUMIPhbZe/WBxK1UuAUSFg1wBSTY8+B4ClpiyMWSSAFd4HTunmOAtUCqAnPu5wyo6O1nRGbSTVl/VfLbeR4aIPQ1ORS8FH8+q2EPP5EWVc2w6LJpij6hG6T41YIrI6kAi0ypMLw3gj/9N/t0OdTeXg=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=N3ntHYJQ; arc=none smtp.client-ip=113.46.200.224", "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=JONQT9FvTITi5XQlpu8B8lVau6UcBkWaHsfbZNCrC0A=;\n\tb=N3ntHYJQ7RsL7c+9G8we7kox2G8l1nJSubkqcVGq80uFh6bbZ6khFE4GgehAWqWlVvKxP42Jl\n\tmmBrgRya5JJjA1ENiwK1+Edbi5XOx0OjuYMgSfDA0dg4AWPqCCQcisau95QPxIeapl9fm+9992O\n\t03QI7YpEhlrhXQO7ITm+mGQ=", "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<alex@shazbot.org>, <jgg@ziepe.ca>", "CC": "<wathsala.vithanage@arm.com>, <wangzhou1@hisilicon.com>,\n\t<wangyushan12@huawei.com>, <liuyonglong@huawei.com>, <kvm@vger.kernel.org>,\n\t<linux-pci@vger.kernel.org>", "Subject": "[PATCH v2 RESEND 5/5] vfio/pci: Add PCIe TPH SET_ST interface", "Date": "Thu, 16 Apr 2026 17:30:41 +0800", "Message-ID": "<20260416093041.42070-6-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20260416093041.42070-1-fengchengwen@huawei.com>", "References": "<20260416093041.42070-1-fengchengwen@huawei.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-ClientProxiedBy": "kwepems200002.china.huawei.com (7.221.188.68) To\n kwepemk500009.china.huawei.com (7.202.194.94)" }, "content": "Add VFIO_PCI_TPH_SET_ST operation to support batch programming\nof steering tag entries. If any entry fails, all previously\nprogrammed entries are rolled back to 0 to avoid partial\ndevice state.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\n---\n drivers/vfio/pci/vfio_pci_core.c | 71 ++++++++++++++++++++++++++++++++\n 1 file changed, 71 insertions(+)", "diff": "diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c\nindex a036e7d795be..35b8849ecf39 100644\n--- a/drivers/vfio/pci/vfio_pci_core.c\n+++ b/drivers/vfio/pci/vfio_pci_core.c\n@@ -1573,6 +1573,75 @@ static int vfio_pci_tph_get_st(struct vfio_pci_core_device *vdev,\n \treturn err;\n }\n \n+static int vfio_pci_tph_set_st(struct vfio_pci_core_device *vdev,\n+\t\t\t struct vfio_device_pci_tph_op *op,\n+\t\t\t void __user *uarg)\n+{\n+\tstruct pci_dev *pdev = vdev->pdev;\n+\tstruct vfio_pci_tph_entry *ents;\n+\tstruct vfio_pci_tph_st st;\n+\tenum tph_mem_type mtype;\n+\tint i = 0, j, err, size;\n+\tu32 tab_loc;\n+\tu16 st_val;\n+\n+\ttab_loc = pcie_tph_get_st_table_loc(pdev);\n+\tif (tab_loc != PCI_TPH_LOC_CAP && tab_loc != PCI_TPH_LOC_MSIX)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tif (copy_from_user(&st, uarg, sizeof(st)))\n+\t\treturn -EFAULT;\n+\n+\tif (!st.count || st.count > VFIO_PCI_TPH_MAX_ENTRIES)\n+\t\treturn -EINVAL;\n+\n+\tsize = st.count * sizeof(*ents);\n+\tents = kvmalloc(size, GFP_KERNEL);\n+\tif (!ents)\n+\t\treturn -ENOMEM;\n+\n+\tif (copy_from_user(ents, uarg + sizeof(st), size)) {\n+\t\terr = -EFAULT;\n+\t\tgoto out;\n+\t}\n+\n+\tfor (; i < st.count; i++) {\n+\t\tif (ents[i].cpu == U32_MAX) {\n+\t\t\terr = pcie_tph_set_st_entry(pdev, ents[i].index, 0);\n+\t\t\tif (err)\n+\t\t\t\tgoto out;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tif (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_VM) {\n+\t\t\tmtype = TPH_MEM_TYPE_VM;\n+\t\t} else if (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_PM) {\n+\t\t\tmtype = TPH_MEM_TYPE_PM;\n+\t\t} else {\n+\t\t\terr = -EINVAL;\n+\t\t\tgoto out;\n+\t\t}\n+\n+\t\terr = pcie_tph_get_cpu_st(pdev, mtype, ents[i].cpu, &st_val);\n+\t\tif (err)\n+\t\t\tgoto out;\n+\t\terr = pcie_tph_set_st_entry(pdev, ents[i].index, st_val);\n+\t\tif (err)\n+\t\t\tgoto out;\n+\t}\n+\n+out:\n+\tif (err) {\n+\t\t/* Roll back previously programmed entries to 0 */\n+\t\tfor (j = 0; j < i; j++) {\n+\t\t\tif (ents[j].cpu != U32_MAX)\n+\t\t\t\tpcie_tph_set_st_entry(pdev, ents[j].index, 0);\n+\t\t}\n+\t}\n+\tkvfree(ents);\n+\treturn err;\n+}\n+\n static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\t\t void __user *uarg)\n {\n@@ -1595,6 +1664,8 @@ static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\treturn vfio_pci_tph_disable(vdev);\n \tcase VFIO_PCI_TPH_GET_ST:\n \t\treturn vfio_pci_tph_get_st(vdev, &op, uarg + minsz);\n+\tcase VFIO_PCI_TPH_SET_ST:\n+\t\treturn vfio_pci_tph_set_st(vdev, &op, uarg + minsz);\n \tdefault:\n \t\t/* Other ops are not implemented yet */\n \t\treturn -EINVAL;\n", "prefixes": [ "v2", "RESEND", "5/5" ] }