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GET /api/1.1/patches/2223856/?format=api
{ "id": 2223856, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223856/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260416-ad4692-multichannel-sar-adc-driver-v8-6-c415bd048fa3@analog.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260416-ad4692-multichannel-sar-adc-driver-v8-6-c415bd048fa3@analog.com>", "date": "2026-04-16T09:18:51", "name": "[v8,6/6] docs: iio: adc: ad4691: add driver documentation", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "adfce39cb69887ea7502a8dcbf907891c845490e", "submitter": { "id": 92791, "url": "http://patchwork.ozlabs.org/api/1.1/people/92791/?format=api", "name": "Radu Sabau via B4 Relay", "email": "devnull+radu.sabau.analog.com@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260416-ad4692-multichannel-sar-adc-driver-v8-6-c415bd048fa3@analog.com/mbox/", "series": [ { "id": 500122, "url": "http://patchwork.ozlabs.org/api/1.1/series/500122/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=500122", "date": "2026-04-16T09:18:48", "name": "iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/500122/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223856/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223856/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35189-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=GpHOGDRt;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776331132; cv=none;\n b=M91Wktbye8D7tezJ861ucd9TKs1T/s0xF75IraTjtSzbnasdvUg5oqpOVGFmlPVxyb061C6vs/FttGj+/w1BlPRLS//ko1VTxKqUq1prMHB3OS7pusL/XJ4iQIZ1SBs0smrz/HkZXJEzLJcf63nrJpieJ4HBLuNRsn0B6TSPpHs=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776331132; c=relaxed/simple;\n\tbh=TjLO42re0i6kcbnPAhDuPMCXPMVV1s735AYXgr5LxYw=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=uLwWrS2+mpAHNFrXaRqfWhqsy4RGx22QEO0HyQ3aPK3iPvs5lCv7jdv4A2/Vz7C99cohcs4YMGHYmWOMNYtL//eSgH2MduAcpAhy9ENkWXkAM5rCafcGB8WXmO20dfuvknwJ1Ph+P4FuFbP+gswuw8I5Uq5GaHzujdqXGlxVKA0=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=GpHOGDRt; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1776331132;\n\tbh=TjLO42re0i6kcbnPAhDuPMCXPMVV1s735AYXgr5LxYw=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;\n\tb=GpHOGDRtavYGWigbKzRa+1vvlWrSrSNLz+dvlEWAuWRk/yHEDXWBojCGlZfq/bEtk\n\t pV4aMzCNXg8ma4GKUtAywb/TFBOUHMhaYbyzjm3Ds2JGo6piUy4UU8OB2FAxzCSqCm\n\t IsXOhdLorOZS1SpH+LfQ454qAHOuTlYQHpuy8ltGzTW9aWBTuoOikL8inz+QmOjIuy\n\t hw04GzCp/WnMdJsCVlsnCDsfAkdv5TKy33BbRIrAPOEsP+LQneOlfQ0DF8p1EXgN46\n\t QV5cxod80hn8EFbXidI5AlEapTpYGWYa8Fg8DdXGfrWQpiK5BUQvQoEUJAI8djk4MH\n\t bDLKTTInR/umQ==", "From": "Radu Sabau via B4 Relay <devnull+radu.sabau.analog.com@kernel.org>", "Date": "Thu, 16 Apr 2026 12:18:51 +0300", "Subject": "[PATCH v8 6/6] docs: iio: adc: ad4691: add driver documentation", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "Message-Id": "\n <20260416-ad4692-multichannel-sar-adc-driver-v8-6-c415bd048fa3@analog.com>", "References": "\n <20260416-ad4692-multichannel-sar-adc-driver-v8-0-c415bd048fa3@analog.com>", "In-Reply-To": "\n <20260416-ad4692-multichannel-sar-adc-driver-v8-0-c415bd048fa3@analog.com>", "To": "Lars-Peter Clausen <lars@metafoo.de>,\n Michael Hennerich <Michael.Hennerich@analog.com>,\n Jonathan Cameron <jic23@kernel.org>, David Lechner <dlechner@baylibre.com>,\n\t=?utf-8?q?Nuno_S=C3=A1?= <nuno.sa@analog.com>,\n Andy Shevchenko <andy@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= <ukleinek@kernel.org>,\n Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>,\n Linus Walleij <linusw@kernel.org>, Bartosz Golaszewski <brgl@kernel.org>,\n Philipp Zabel <p.zabel@pengutronix.de>, Jonathan Corbet <corbet@lwn.net>,\n Shuah Khan <skhan@linuxfoundation.org>", "Cc": "linux-iio@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,\n linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org,\n Radu Sabau <radu.sabau@analog.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1776331127; l=9306;\n i=radu.sabau@analog.com; s=20260220; h=from:subject:message-id;\n bh=8iXZp0x1X1defWWuJJgYTk6WrDF1PVndw2AvlFcwSLA=;\n b=aHOfuEZP5VpESDwrICPSueZPytnnOp4Lzqtm4se/CAtiBmnwzQNfTjFqnd9T9FrMv/JhXIi27\n Mqa3OgrgjpaCEI5Pyy/15CXcmzJeGIbWX1gDWlcNFwZV2T3l0qQ/ewC", "X-Developer-Key": "i=radu.sabau@analog.com; a=ed25519;\n pk=lDPQHgn9jTdt0vo58Na9lLxLaE2mb330if71Cn+EvFU=", "X-Endpoint-Received": "by B4 Relay for radu.sabau@analog.com/20260220 with\n auth_id=642", "X-Original-From": "Radu Sabau <radu.sabau@analog.com>", "Reply-To": "radu.sabau@analog.com" }, "content": "From: Radu Sabau <radu.sabau@analog.com>\n\nAdd RST documentation for the AD4691 family ADC driver covering\nsupported devices, IIO channels, operating modes, oversampling,\nreference voltage, LDO supply, reset, GP pins, SPI offload support,\nand buffer data format.\n\nSigned-off-by: Radu Sabau <radu.sabau@analog.com>\n---\n Documentation/iio/ad4691.rst | 205 +++++++++++++++++++++++++++++++++++++++++++\n Documentation/iio/index.rst | 1 +\n MAINTAINERS | 1 +\n 3 files changed, 207 insertions(+)", "diff": "diff --git a/Documentation/iio/ad4691.rst b/Documentation/iio/ad4691.rst\nnew file mode 100644\nindex 000000000000..38e2ad28a713\n--- /dev/null\n+++ b/Documentation/iio/ad4691.rst\n@@ -0,0 +1,205 @@\n+.. SPDX-License-Identifier: GPL-2.0-only\n+\n+=============\n+AD4691 driver\n+=============\n+\n+ADC driver for Analog Devices Inc. AD4691 family of multichannel SAR ADCs.\n+The module name is ``ad4691``.\n+\n+\n+Supported devices\n+=================\n+\n+The following chips are supported by this driver:\n+\n+* `AD4691 <https://www.analog.com/en/products/ad4691.html>`_ — 16-channel, 500 kSPS\n+* `AD4692 <https://www.analog.com/en/products/ad4692.html>`_ — 16-channel, 1 MSPS\n+* `AD4693 <https://www.analog.com/en/products/ad4693.html>`_ — 8-channel, 500 kSPS\n+* `AD4694 <https://www.analog.com/en/products/ad4694.html>`_ — 8-channel, 1 MSPS\n+\n+\n+IIO channels\n+============\n+\n+Each physical ADC input maps to one IIO voltage channel. The AD4691 and AD4692\n+expose 16 channels (``voltage0`` through ``voltage15``); the AD4693 and AD4694\n+expose 8 channels (``voltage0`` through ``voltage7``).\n+\n+All channels share a common scale (``in_voltage_scale``), derived from the\n+reference voltage. Each channel independently exposes:\n+\n+* ``in_voltageN_raw`` — single-shot ADC result\n+* ``in_voltageN_sampling_frequency`` — per-channel effective output rate,\n+ defined as the internal oscillator frequency divided by the channel's\n+ oversampling ratio. Writing this attribute selects the nearest achievable\n+ rate for the current OSR; the value read back reflects the actual rate after\n+ snapping to the closest valid oscillator entry.\n+* ``in_voltageN_sampling_frequency_available`` — list of achievable effective\n+ rates for the channel's current oversampling ratio. The list updates\n+ dynamically when the oversampling ratio changes.\n+\n+The following attributes are only available in CNV Burst Mode:\n+\n+* ``in_voltageN_oversampling_ratio`` — per-channel hardware oversampling depth;\n+ see `Oversampling`_ below.\n+* ``in_voltageN_oversampling_ratio_available`` — valid ratios: 1, 2, 4, 8, 16,\n+ 32.\n+\n+\n+Operating modes\n+===============\n+\n+The driver supports two operating modes, selected automatically from the\n+device tree at probe time.\n+\n+Manual Mode\n+-----------\n+\n+Selected when no ``pwms`` property is present in the device tree. The CNV pin\n+is tied to the SPI chip-select: every CS assertion triggers a conversion and\n+returns the previous result. A user-defined IIO trigger (e.g. hrtimer trigger)\n+drives the buffer.\n+\n+Oversampling is not supported in Manual Mode.\n+\n+CNV Burst Mode\n+--------------\n+\n+Selected when a ``pwms`` property is present in the device tree. A PWM drives\n+the CNV pin at the configured conversion rate. A GP pin wired to the SoC and\n+declared in the device tree signals DATA_READY at the end of each burst,\n+triggering a readout of all active channel results into the IIO buffer.\n+\n+The buffer output rate is controlled by the ``sampling_frequency`` attribute\n+on the IIO buffer. In practice the PWM rate should be set low enough to allow\n+the SPI readout to complete before the next conversion burst begins.\n+\n+Autonomous Mode (idle / single-shot)\n+-------------------------------------\n+\n+When the IIO buffer is disabled, ``in_voltageN_raw`` reads perform a single\n+conversion on the requested channel using the internal oscillator. The\n+oscillator is started and stopped around each read to save power.\n+\n+\n+Oversampling\n+============\n+\n+In CNV Burst Mode each channel has an independent hardware accumulator that\n+averages a configurable number of successive conversions. The result is always\n+returned as a 16-bit mean, so ``realbits`` and ``storagebits`` are unaffected\n+by the oversampling ratio. Valid ratios are 1, 2, 4, 8, 16 and 32; the default\n+is 1 (no averaging). Oversampling is not supported in Manual Mode.\n+\n+.. code-block:: bash\n+\n+ # Set oversampling ratio to 16 on channel 0\n+ echo 16 > /sys/bus/iio/devices/iio:device0/in_voltage0_oversampling_ratio\n+\n+ # Read the resulting effective sampling frequency\n+ cat /sys/bus/iio/devices/iio:device0/in_voltage0_sampling_frequency\n+\n+Writing ``oversampling_ratio`` stores the new depth for that channel;\n+the internal oscillator is unaffected. The effective rate read back via\n+``in_voltageN_sampling_frequency`` becomes ``osc_freq / new_osr``\n+automatically. ``oversampling_ratio`` and ``sampling_frequency`` are\n+orthogonal: one controls averaging depth, the other controls the oscillator.\n+\n+All channels share one internal oscillator. Writing ``sampling_frequency`` for\n+any channel updates the oscillator and therefore affects the effective rate\n+read back from all other channels.\n+\n+\n+Reference voltage\n+=================\n+\n+The driver supports two reference configurations, mutually exclusive:\n+\n+* **External reference** (``ref-supply``): a voltage between 2.4 V and 5.25 V\n+ supplied externally.\n+* **Buffered internal reference** (``refin-supply``): an internal reference\n+ buffer is enabled by the driver.\n+\n+Exactly one of ``ref-supply`` or ``refin-supply`` must be present in the\n+device tree. The reference voltage determines the full-scale range reported\n+via ``in_voltage_scale``.\n+\n+\n+LDO supply\n+==========\n+\n+The chip contains an internal LDO that powers part of the analog front-end.\n+The supply configuration is mutually exclusive:\n+\n+* **External VDD** (``vdd-supply``): an external 1.8 V supply is used directly;\n+ the internal LDO is disabled.\n+* **Internal LDO** (``ldo-in-supply``): the internal LDO is enabled and fed\n+ from the ``ldo-in`` regulator. Use this when no external 1.8 V VDD is present.\n+\n+Exactly one of ``vdd-supply`` or ``ldo-in-supply`` must be provided.\n+\n+\n+Reset\n+=====\n+\n+The driver supports two reset mechanisms:\n+\n+* **Hardware reset** (``reset-gpios`` in device tree): asserted at probe by\n+ the reset controller framework.\n+* **Software reset** (fallback when ``reset-gpios`` is absent): written\n+ automatically at probe.\n+\n+\n+GP pins and interrupts\n+======================\n+\n+The chip exposes up to four general-purpose (GP) pins. In CNV Burst Mode\n+(non-offload), one GP pin must be wired to an interrupt-capable SoC input and\n+declared in the device tree using the ``interrupts`` and ``interrupt-names``\n+properties. The ``interrupt-names`` value identifies which GP pin is used\n+(``\"gp0\"`` through ``\"gp3\"``).\n+\n+Example device tree fragment::\n+\n+ adc@0 {\n+ compatible = \"adi,ad4692\";\n+ ...\n+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;\n+ interrupt-parent = <&gpio0>;\n+ interrupt-names = \"gp0\";\n+ };\n+\n+\n+SPI offload support\n+===================\n+\n+When a SPI offload engine (e.g. the AXI SPI Engine) is present, the driver\n+uses DMA-backed transfers for CPU-independent, high-throughput data capture.\n+SPI offload is detected automatically at probe; if no offload hardware is\n+available the driver falls back to the software triggered-buffer path.\n+\n+Two SPI offload sub-modes exist:\n+\n+CNV Burst offload\n+-----------------\n+\n+Used when a ``pwms`` property is present and SPI offload is available. The PWM\n+drives CNV at the configured rate; on DATA_READY the offload engine reads all\n+active channel results and streams them directly to the IIO DMA buffer with no\n+CPU involvement. The GP pin used as DATA_READY trigger is supplied by the\n+trigger-source consumer at buffer enable time; no ``interrupt-names`` entry is\n+required.\n+\n+Manual offload\n+--------------\n+\n+Used when no ``pwms`` property is present and SPI offload is available. A\n+periodic SPI offload trigger controls the conversion rate and the offload engine\n+streams results directly to the IIO DMA buffer.\n+\n+The ``sampling_frequency`` attribute on the IIO buffer controls the trigger\n+rate (in Hz). The initial rate is 100 kHz.\n+\n+Oversampling is not supported in Manual Mode.\n+\ndiff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst\nindex ba3e609c6a13..007e0a1fcc5a 100644\n--- a/Documentation/iio/index.rst\n+++ b/Documentation/iio/index.rst\n@@ -23,6 +23,7 @@ Industrial I/O Kernel Drivers\n ad4000\n ad4030\n ad4062\n+ ad4691\n ad4695\n ad7191\n ad7380\ndiff --git a/MAINTAINERS b/MAINTAINERS\nindex 24e4502b8292..819d8b6eb6bb 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -1491,6 +1491,7 @@ S:\tSupported\n W:\thttps://ez.analog.com/linux-software-drivers\n F:\tDocumentation/devicetree/bindings/iio/adc/adi,ad4691.yaml\n F:\tdrivers/iio/adc/ad4691.c\n+F:\tdrivers/iio/adc/ad4691.rst\n \n ANALOG DEVICES INC AD4695 DRIVER\n M:\tMichael Hennerich <michael.hennerich@analog.com>\n", "prefixes": [ "v8", "6/6" ] }