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GET /api/1.1/patches/2223792/?format=api
{ "id": 2223792, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223792/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/923e50db696d910803828cd26b0ca0fbbfe11570.1776326933.git.weijie.gao@mediatek.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<923e50db696d910803828cd26b0ca0fbbfe11570.1776326933.git.weijie.gao@mediatek.com>", "date": "2026-04-16T08:23:10", "name": "[v2,3/3] clk: mediatek: fix parent rate lookup for fixed PLL clocks", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "c172ffdcfba561404115d449362bf384a0309407", "submitter": { "id": 75269, "url": "http://patchwork.ozlabs.org/api/1.1/people/75269/?format=api", "name": "Weijie Gao", "email": "weijie.gao@mediatek.com" }, "delegate": { "id": 161331, "url": "http://patchwork.ozlabs.org/api/1.1/users/161331/?format=api", "username": "dlech", "first_name": "David", "last_name": "Lechner", "email": "dlechner@baylibre.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/923e50db696d910803828cd26b0ca0fbbfe11570.1776326933.git.weijie.gao@mediatek.com/mbox/", "series": [ { "id": 500106, "url": "http://patchwork.ozlabs.org/api/1.1/series/500106/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=500106", "date": "2026-04-16T08:22:51", "name": "Fixes for parent rate lookup of mediatek clk driver", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500106/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223792/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223792/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256\n header.s=dk header.b=sWZFILyu;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Thu, 16 Apr 2026 10:23:22 +0200 (CEST)", "from mailgw02.mediatek.com (unknown [210.61.82.184])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 50D1D8421E\n for <u-boot@lists.denx.de>; Thu, 16 Apr 2026 10:23:20 +0200 (CEST)", "from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by\n mailgw02.mediatek.com (envelope-from <weijie.gao@mediatek.com>)\n (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256)\n with ESMTP id 1881001460; Thu, 16 Apr 2026 16:23:15 +0800", "from mtkmbs13n1.mediatek.inc (172.21.101.193) by\n mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.2562.29; Thu, 16 Apr 2026 16:23:13 +0800", "from mcddlt001.gcn.mediatek.inc (10.19.240.15) by\n mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id\n 15.2.2562.29 via Frontend Transport; Thu, 16 Apr 2026 16:23:13 +0800" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,\n RCVD_IN_VALIDITY_RPBL_BLOCKED,RDNS_NONE,SPF_HELO_PASS,SPF_PASS,\n UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.2", "X-UUID": [ "83e8d3bc396d11f19a16598d5ca7f8ec-20260416", "83e8d3bc396d11f19a16598d5ca7f8ec-20260416" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n d=mediatek.com;\n s=dk;\n h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;\n bh=q3JJQRyjGZXZhUrERJx6skvKzdEfjFY8yoxQF35nMzw=;\n b=sWZFILyuq/x5tUPfhZ1DY/S2zQzHBOMx9NNnnkVGWDOvnrqmFlBL3WMWZl0EJGxV1q7Jfl/IDKfIUkB12joXSEIWy4NeWMWvUqQdTpU0HmdWxJJjliiKwrdYRsY+oS8BV5lCod8ntdjekcoFtnOMyUpLQAmxo0kiabueqHyk/ks=;", "X-CID-P-RULE": "Release_Ham", "X-CID-O-INFO": "VERSION:1.3.12, REQID:23301851-7d77-4c45-97ae-c6aca34e4443,\n IP:0,\n U\n RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:\n release,TS:0", "X-CID-META": "VersionHash:e7bac3a, CLOUDID:1f0aef24-cb5c-4236-a89a-9a7fb20c9bc4,\n B\n ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|865|888|898,TC:-5,Cont\n ent:0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0\n ,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0", "X-CID-BVR": "2,SSN|SDN", "X-CID-BAS": "2,SSN|SDN,0,_", "X-CID-FACTOR": "TF_CID_SPAM_SNR", "X-CID-RHF": "D41D8CD98F00B204E9800998ECF8427E", "From": "Weijie Gao <weijie.gao@mediatek.com>", "To": "<u-boot@lists.denx.de>", "CC": "GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>, Tom Rini\n <trini@konsulko.com>, David Lechner <dlechner@baylibre.com>, Julien Stephan\n <jstephan@baylibre.com>, Macpaul Lin <macpaul.lin@mediatek.com>, Sam Shih\n <sam.shih@mediatek.com>, Weijie Gao <weijie.gao@mediatek.com>", "Subject": "[PATCH v2 3/3] clk: mediatek: fix parent rate lookup for fixed PLL\n clocks", "Date": "Thu, 16 Apr 2026 16:23:10 +0800", "Message-ID": "\n <923e50db696d910803828cd26b0ca0fbbfe11570.1776326933.git.weijie.gao@mediatek.com>", "X-Mailer": "git-send-email 2.17.0", "In-Reply-To": "<cover.1776326933.git.weijie.gao@mediatek.com>", "References": "<cover.1776326933.git.weijie.gao@mediatek.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MTK": "N", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Sam Shih <sam.shih@mediatek.com>\n\nThe refactoring in commit 00d0ff7f81bf (\"clk: mediatek: refactor parent\nrate lookup functions\") introduced a regression where fixed PLL clocks\nusing mtk_clk_fixed_pll_ops are not properly recognized as valid parents\nin the CLK_PARENT_APMIXED case.\n\nFixed PLL clocks are implemented using mtk_clk_fixed_pll_ops instead of\nmtk_clk_apmixedsys_ops, but they can also serve as parent clocks in the\nAPMIXED domain. The parent lookup function needs to check for both\ndriver ops to properly resolve the parent clock device.\n\nAdd mtk_clk_fixed_pll_ops checks alongside mtk_clk_apmixedsys_ops checks\nin mtk_find_parent_rate() to restore support for fixed PLL parent clocks.\n\nAlso refactor the grandparent lookup code to extract the repeated\ndev_get_parent(priv->parent) call into a local variable to keep lines\nunder 100 characters and pass checkpatch validation.\n\nFixes: 00d0ff7f81bf (\"clk: mediatek: refactor parent rate lookup functions\")\nSigned-off-by: Sam Shih <sam.shih@mediatek.com>\nSigned-off-by: Weijie Gao <weijie.gao@mediatek.com>\n---\n drivers/clk/mediatek/clk-mtk.c | 11 +++++++----\n 1 file changed, 7 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c\nindex f974f0f2432..d209bc5eb47 100644\n--- a/drivers/clk/mediatek/clk-mtk.c\n+++ b/drivers/clk/mediatek/clk-mtk.c\n@@ -212,14 +212,17 @@ static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,\n \tswitch (flags & CLK_PARENT_MASK) {\n \tcase CLK_PARENT_APMIXED:\n \t\t/* APMIXEDSYS can be parent or grandparent. */\n-\t\tif (dev_get_driver_ops(clk->dev) == &mtk_clk_apmixedsys_ops)\n+\t\tif (dev_get_driver_ops(clk->dev) == &mtk_clk_apmixedsys_ops ||\n+\t\t dev_get_driver_ops(clk->dev) == &mtk_clk_fixed_pll_ops) {\n \t\t\tparent_dev = clk->dev;\n-\t\telse if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops)\n+\t\t} else if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops ||\n+\t\t\tdev_get_driver_ops(priv->parent) == &mtk_clk_fixed_pll_ops) {\n \t\t\tparent_dev = priv->parent;\n-\t\telse {\n+\t\t} else {\n \t\t\tstruct udevice *grandparent_dev = dev_get_parent(priv->parent);\n \n-\t\t\tif (dev_get_driver_ops(grandparent_dev) == &mtk_clk_apmixedsys_ops)\n+\t\t\tif (dev_get_driver_ops(grandparent_dev) == &mtk_clk_apmixedsys_ops ||\n+\t\t\t dev_get_driver_ops(grandparent_dev) == &mtk_clk_fixed_pll_ops)\n \t\t\t\tparent_dev = grandparent_dev;\n \t\t\telse\n \t\t\t\treturn -EINVAL;\n", "prefixes": [ "v2", "3/3" ] }