Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2223788/?format=api
{ "id": 2223788, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223788/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260416081429.44987-1-garthlei@linux.alibaba.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260416081429.44987-1-garthlei@linux.alibaba.com>", "date": "2026-04-16T08:14:29", "name": "[GCC17-stage1] RISC-V: Implement even-odd shuffles with vnsrl", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b404fd6568b15206a2abaadedef3f21ea3e8112b", "submitter": { "id": 89310, "url": "http://patchwork.ozlabs.org/api/1.1/people/89310/?format=api", "name": "Bohan Lei", "email": "garthlei@linux.alibaba.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260416081429.44987-1-garthlei@linux.alibaba.com/mbox/", "series": [ { "id": 500105, "url": "http://patchwork.ozlabs.org/api/1.1/series/500105/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500105", "date": "2026-04-16T08:14:29", "name": "[GCC17-stage1] RISC-V: Implement even-odd shuffles with vnsrl", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500105/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223788/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223788/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.alibaba.com header.i=@linux.alibaba.com\n header.a=rsa-sha256 header.s=default header.b=GfQyqQV1;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)", "sourceware.org;\n\tdkim=pass (1024-bit key,\n unprotected) header.d=linux.alibaba.com header.i=@linux.alibaba.com\n header.a=rsa-sha256 header.s=default header.b=GfQyqQV1", "sourceware.org; dmarc=pass (p=none dis=none)\n header.from=linux.alibaba.com", "sourceware.org;\n spf=pass smtp.mailfrom=linux.alibaba.com", "server2.sourceware.org;\n arc=none smtp.remote-ip=115.124.30.100" ], "Received": [ "from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fx9md4Rdqz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 16 Apr 2026 18:15:13 +1000 (AEST)", "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 9DA6B4BA2E26\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 16 Apr 2026 08:15:11 +0000 (GMT)", "from out30-100.freemail.mail.aliyun.com\n (out30-100.freemail.mail.aliyun.com [115.124.30.100])\n by sourceware.org (Postfix) with ESMTPS id AB5CC4BA2E04\n for <gcc-patches@gcc.gnu.org>; Thu, 16 Apr 2026 08:14:44 +0000 (GMT)", "from localhost(mailfrom:garthlei@linux.alibaba.com\n fp:SMTPD_---0X17f-Of_1776327271 cluster:ay36) by smtp.aliyun-inc.com;\n Thu, 16 Apr 2026 16:14:40 +0800" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org 9DA6B4BA2E26", "OpenDKIM Filter v2.11.0 sourceware.org AB5CC4BA2E04" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org AB5CC4BA2E04", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org AB5CC4BA2E04", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1776327285; cv=none;\n b=TmX6puMTszOgIpG5evS3m1o+JwdzUJu8+cGTyseANyMYpcyKv7sE7LCBofcCX79xUeM4FqJLZDNRNz6aWpBCWpGdXarTlKJ9mtdENWGDzN/ajWqLLYp9MhgkhSSXJYnLwR7fkUQYLWyGdqjhIsj57sy5BmAq4IhVrj2FMs4a7Rw=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776327285; c=relaxed/simple;\n bh=rfo0pVzQtWi3r1E85mw5B5gIVMQJbjgONwvzU07KyBA=;\n h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version;\n b=BCgfmwth4Dp/5Cbid7P8rlG2K5/55tIG7AgqVmJI6w4rtBIiMmxnxyU39ew5BCBT67xIQBVaHFh5xVX06ex1BIznEQbSiNhBG9XPgJwGhePHswNtUENsnjtduuaci/Y5obgC3eYX0Fh6a443lM6nn9H92cK+PIeMK/H5E60okn0=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linux.alibaba.com; s=default;\n t=1776327281; h=From:To:Subject:Date:Message-Id:MIME-Version;\n bh=4ONmYaRcxHsFM0eWqqRHByIK6DS2KkKaG/fKs/454Lk=;\n b=GfQyqQV1nvWRxAQiEnVG5wgEYHYawvdP24++h6Z6SqWUVh/ZRgP9MxKXJ8wEbuV4p3I1/J5OOHdp0BhYWhfHS18sgbzBCMKmSzBNUri2IlOkIONTj9wD5guAYQjFPah7nqlXgq4kG7ZTL04eaNAZaye/9nZzLpyg5Pdox3bMhPM=", "X-Alimail-AntiSpam": "AC=PASS; BC=-1|-1; BR=01201311R131e4; CH=green;\n DM=||false|;\n DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=maildocker-contentspam033037009110;\n MF=garthlei@linux.alibaba.com; NM=1; PH=DS; RN=4; SR=0;\n TI=SMTPD_---0X17f-Of_1776327271;", "From": "Bohan Lei <garthlei@linux.alibaba.com>", "To": "gcc-patches@gcc.gnu.org", "Cc": "jeffrey.law@oss.qualcomm.com, rdapp.gcc@gmail.com,\n Bohan Lei <garthlei@linux.alibaba.com>", "Subject": "[PATCH GCC17-stage1] RISC-V: Implement even-odd shuffles with vnsrl", "Date": "Thu, 16 Apr 2026 16:14:29 +0800", "Message-Id": "<20260416081429.44987-1-garthlei@linux.alibaba.com>", "X-Mailer": "git-send-email 2.39.3 (Apple Git-146)", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "This patch tries to implement some even-odd shuffles with vnsrl instead\nof vcompress, which is inspired by the current behavior of LLVM. Since\nvcompress is slower than vnsrl on many implementations, and that\nvcompress needs a mask load, using vnsrl seems to be more desirable.\n\ngcc/ChangeLog:\n\n\t* config/riscv/riscv-v.cc (shuffle_even_odd_patterns): Use vnsrl\n\twhen possible.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c:\n\tMatch vnsrl patterns.\n---\n gcc/config/riscv/riscv-v.cc | 33 +++++++++++++++++++\n .../rvv/autovec/vls-vlmax/shuffle-evenodd.c | 3 +-\n 2 files changed, 35 insertions(+), 1 deletion(-)", "diff": "diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc\nindex 82313356a80..b0898da7d5a 100644\n--- a/gcc/config/riscv/riscv-v.cc\n+++ b/gcc/config/riscv/riscv-v.cc\n@@ -4064,6 +4064,39 @@ shuffle_even_odd_patterns (struct expand_vec_perm_d *d)\n if (d->testing_p)\n return true;\n \n+ /* Use VNSRL when the element width is smaller than greatest ELEN */\n+ /* ??? For now, only do this when the mode size is no greater than the natural\n+ size of the register. Doing this for longer modes can lead to extra spills\n+ due to current subreg handling. Once this is fixed, the condition should\n+ be replaced by the ELEN condition. */\n+ if (known_le (GET_MODE_SIZE (vmode), riscv_regmode_natural_size (vmode)))\n+ {\n+ unsigned int wide_elen = GET_MODE_BITSIZE (GET_MODE_INNER (vmode)) * 2;\n+ scalar_int_mode smode = int_mode_for_size (wide_elen, 0).require ();\n+ scalar_int_mode smode_narrow\n+\t= int_mode_for_size (GET_MODE_BITSIZE (GET_MODE_INNER (vmode)), 0)\n+\t .require ();\n+ machine_mode wider_vmode = get_vector_mode (smode, vlen / 2).require ();\n+ machine_mode half_len_mode\n+\t= get_vector_mode (smode_narrow, vlen / 2).require ();\n+ unsigned int shift_amt = even ? 0 : wide_elen / 2;\n+ insn_code icode = code_for_pred_narrow_scalar (LSHIFTRT, wider_vmode);\n+ rtx tmp = gen_reg_rtx (vmode);\n+ rtx ops_shift1[]\n+\t= {gen_lowpart (half_len_mode, d->target),\n+\t gen_lowpart (wider_vmode, d->op0), gen_int_mode (shift_amt, Pmode)};\n+ rtx ops_shift2[]\n+\t= {gen_lowpart (half_len_mode, tmp),\n+\t gen_lowpart (wider_vmode, d->op1), gen_int_mode (shift_amt, Pmode)};\n+ emit_vlmax_insn (icode, BINARY_OP, ops_shift1);\n+ emit_vlmax_insn (icode, BINARY_OP, ops_shift2);\n+ rtx ops[]\n+\t= {d->target, d->target, tmp, gen_int_mode (vlen / 2, Pmode)};\n+ icode = code_for_pred_slide (UNSPEC_VSLIDEUP, vmode);\n+ emit_vlmax_insn (icode, SLIDEUP_OP_MERGE, ops);\n+ return true;\n+ }\n+\n machine_mode mask_mode = get_mask_mode (vmode);\n rvv_builder builder (mask_mode, vlen, 1);\n int bit = even ? 0 : 1;\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c\nindex 6db4c5ab386..ba1131b1f16 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c\n@@ -65,4 +65,5 @@ TEST_ALL (PERMUTE1)\n TEST_ALL (PERMUTE2)\n \n /* { dg-final { scan-assembler-times \"vslideup\" 48 } } */\n-/* { dg-final { scan-assembler-times \"vcompress\" 96 } } */\n+/* { dg-final { scan-assembler-times \"vcompress\" 84 } } */\n+/* { dg-final { scan-assembler-times \"vnsrl\" 12 } } */\n", "prefixes": [ "GCC17-stage1" ] }