Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2223717/?format=api
{ "id": 2223717, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223717/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416014928.1279360-4-jamin_lin@aspeedtech.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260416014928.1279360-4-jamin_lin@aspeedtech.com>", "date": "2026-04-16T01:49:36", "name": "[v3,03/17] hw/usb/hcd-ehci.c: Fix coding style issues reported by checkpatch", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "731c7be84df6991195f1ee06e17e672fa5160eb0", "submitter": { "id": 81768, "url": "http://patchwork.ozlabs.org/api/1.1/people/81768/?format=api", "name": "Jamin Lin", "email": "jamin_lin@aspeedtech.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416014928.1279360-4-jamin_lin@aspeedtech.com/mbox/", "series": [ { "id": 500066, "url": "http://patchwork.ozlabs.org/api/1.1/series/500066/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500066", "date": "2026-04-16T01:49:32", "name": "hw/usb/ehci: Add 64-bit descriptor addressing support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/500066/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223717/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223717/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=ER2nfHDP;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=aspeedtech.com;" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fx1H55pWNz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 16 Apr 2026 11:52:33 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wDBsO-0008JH-5A; Wed, 15 Apr 2026 21:50:40 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <jamin_lin@aspeedtech.com>)\n id 1wDBre-0007rS-QD; Wed, 15 Apr 2026 21:49:56 -0400", "from mail-japaneastazlp170120005.outbound.protection.outlook.com\n ([2a01:111:f403:c405::5] helo=TYPPR03CU001.outbound.protection.outlook.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <jamin_lin@aspeedtech.com>)\n id 1wDBrc-0007PV-B5; Wed, 15 Apr 2026 21:49:54 -0400", "from TYPPR06MB8206.apcprd06.prod.outlook.com (2603:1096:405:383::19)\n by SEYPR06MB6202.apcprd06.prod.outlook.com (2603:1096:101:c7::12)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9769.48; Thu, 16 Apr\n 2026 01:49:37 +0000", "from TYPPR06MB8206.apcprd06.prod.outlook.com\n ([fe80::e659:1ead:77cb:f6d3]) by TYPPR06MB8206.apcprd06.prod.outlook.com\n ([fe80::e659:1ead:77cb:f6d3%3]) with mapi id 15.20.9818.017; Thu, 16 Apr 2026\n 01:49:37 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=gqmBhFUW5U7cV3GWKYLZ25JdJbkKzGFuR5fRNYa/6fJFLUOxt2jFoQlPmqbo/DJYKdcdZSiaVqh1F/DFzSNAXMhEImaoReLPMaxEvCL9eYd0EiCjoP6IAxRZ0Q/l7bdVoKjpa5ELtU8IAMP7kIAq5aefb8AHjwfjr+K5q2yC/IXjK6KMSuQPmHrG8SXTjbKQofq/VNefrnewV0dqG7kVi9fa6ufpcdo9mDbvgPrr9YjL9dnAUZS6OpNQZL3NeEowGk7A9OyjpY9OKxJ2vqrd2/Iot79qTp/ef15XrSyxujzxrlPS11miZ3ll9G1XIjD4YVc3GVYN5VewcBgPIfv80Q==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=aCVYDin/aI2j3cdnv7i8SYpme0GrUJ0vo7kGdjFa8Bs=;\n b=pweO5TjSHIyN2e2YAYT3lfRVkYFv9QEZenl7Vq20mtuyxMDu3kUeHLTHA0gJ+g9NtVocOF8evubjuxiI7O0KeGG/wxxYfvu+vb0DeolXDEHNO7p5PMA2aNcmeU/LhkrCB0ITbW3RUheAl+FPWRMaxhZOsPhYm89s+urEXc/+7nOJ569b6MnujpR+wH16LUnXO8x8Cch7JkXGe5cc3bbXwZncl6GHkMfqfnySPeWgns/+BGfGI5XWvypm1WIVNpLqx6GisJACbjC7dwxQZXrqxZw+wtToT8TC7/1AzyCHVu/QWNIFvU2OqItdbYl+mzmHsNZJImA1noCLSxtrsgkA9Q==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=aspeedtech.com; dmarc=pass action=none\n header.from=aspeedtech.com; dkim=pass header.d=aspeedtech.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=aspeedtech.com;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=aCVYDin/aI2j3cdnv7i8SYpme0GrUJ0vo7kGdjFa8Bs=;\n b=ER2nfHDPUQo4atHlrmKO9CFFYH7TwZODT5uWxmbeMBmAeDoAXBWzC1b0FkHImSSHHDZlkbsAIPxu1/xhysgYYWGJLJkXrCtJ0mRxdsp3dz6ndvso3fqGp5s9Amx7s8IHyJHrcMIOn4u0jWqZBDOEhBENDrUqGzntqoqVoHSfwx6rnzABtvd9nEcQeEfia+/DwVHJCHJ1LH6Bj+mX+PIXSynn+/xIgxxoNEC0BdkvhiPLFvaeVuznI8yjHudLzjOf0m4lBPQNNL2TdiUnPq7A4Y1ZitB53W0ryg9GZEiEDviOHkkBj24mnTJMVLqUk+USSODLYbKk8O9s3b1lMA7bvw==", "From": "Jamin Lin <jamin_lin@aspeedtech.com>", "To": "\"philmd@linaro.org\" <philmd@linaro.org>, =?iso-8859-1?q?C=E9dric_Le_Goat?=\n\t=?iso-8859-1?q?er?= <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>,\n Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>,\n Kane Chen <kane_chen@aspeedtech.com>,\n Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>,\n \"open list:ASPEED BMCs\" <qemu-arm@nongnu.org>,\n \"open list:All patches CC here\" <qemu-devel@nongnu.org>", "CC": "Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>,\n \"flwu@google.com\" <flwu@google.com>, \"nabihestefan@google.com\"\n <nabihestefan@google.com>", "Subject": "[PATCH v3 03/17] hw/usb/hcd-ehci.c: Fix coding style issues reported\n by checkpatch", "Thread-Topic": "[PATCH v3 03/17] hw/usb/hcd-ehci.c: Fix coding style issues\n reported by checkpatch", "Thread-Index": "AQHczUNIuFbPgPlki0SfG8stynbviw==", "Date": "Thu, 16 Apr 2026 01:49:36 +0000", "Message-ID": "<20260416014928.1279360-4-jamin_lin@aspeedtech.com>", "References": "<20260416014928.1279360-1-jamin_lin@aspeedtech.com>", "In-Reply-To": "<20260416014928.1279360-1-jamin_lin@aspeedtech.com>", "Accept-Language": "zh-TW, en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "authentication-results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=ER2nfHDP;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=aspeedtech.com;" ], "x-ms-publictraffictype": "Email", "x-ms-traffictypediagnostic": "TYPPR06MB8206:EE_|SEYPR06MB6202:EE_", "x-ms-office365-filtering-correlation-id": "76bc55e3-245b-4966-3b2b-08de9b5a6a96", "x-ms-exchange-senderadcheck": "1", "x-ms-exchange-antispam-relay": "0", "x-microsoft-antispam": "BCL:0;\n ARA:13230040|376014|7416014|1800799024|366016|18096099003|38070700021|921020|18002099003|22082099003|56012099003;", "x-microsoft-antispam-message-info": "\n HU8mgoG7zy1UUCruJRDMhp0tScbJYP0ASaR7aA8MJkSxFUW7bbfduBLKOIZEfo0IsLndZC8VMHVHKzG31Tk+vJFdQmly9u1eTnopr0BHRX43oQEGTRje3WeRE+lWRKE8RWvEi1F4Ae1SeTtHMTDDpzEs94m3hOJerq/A72fSdwT5UHSsPO+X496jHuxlzHRAqt1A0LbpZtiZemoUxOnDMTdCc3nXksvgMOeS3LjPv2zeD9FgOMY9Q/qvsq52GDOBovXk+94o/94OAwzGNsH/UwG9EFpRxv5r5esrRqPh/0AZym8CHYl5TWG8lSV6wqMV9mzOWqdVWSFsPGOsOzunra4yuMeHvxGDNBXJOAp/08nzLzqKTSq0EwTh+ozpogmyzu7IYnTLPzVnO3/XJdCGi8ZpDau8XubDO7FgrvtA/t2PDKuybL9lF2Z9fuOu37pPMP6WrN+K/eQn1iNTF/49NhUpjbmX0iQIN+METkYcs5DDl37pq2p7En08bz8YgStwj+gcsl4Q+M3DBM8be+jVW4y60PeYYTrtd/gpWl6vp8LHo+sPjteVTs9eDVnrg6I9yu4PnAImo5M6dIq6sylDMw23ZRF7d+UDpakrFXouTRm+4nbf061KCZNwwxUp2m/24LnlaBv78gfXDZBa48FHSix4ue76fNT4HHHfZlfQ2OaM8rt4NL9HxXDuGeIm6/Kuq6xuf9dwtLnH94PGSdom+QN+UwxulP7eOAhT2kyE4djYgcXyKhyr7l3IjdRQaKPFH0vcqorL7dpBMQLnRPiTIgRde845TwDSL6BhIoNqwhisrXnX6w+/IPX76WDTUR/X", "x-forefront-antispam-report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:TYPPR06MB8206.apcprd06.prod.outlook.com; PTR:; CAT:NONE;\n SFS:(13230040)(376014)(7416014)(1800799024)(366016)(18096099003)(38070700021)(921020)(18002099003)(22082099003)(56012099003);\n DIR:OUT; SFP:1102;", "x-ms-exchange-antispam-messagedata-chunkcount": "1", "x-ms-exchange-antispam-messagedata-0": "=?iso-8859-1?q?+nYG2MR5hZstK5anq0Z5ueI?=\n\t=?iso-8859-1?q?sIqFCjK/cytZO7Knt+PBsJxVt9+mbYf0Csp2G/v/5qVfmBiW0RUP+rKitIwd?=\n\t=?iso-8859-1?q?UuSTUmszdC7k3rdADUm7G0FSGtNEU6vu3kgJ4Z+Yu8Lperrcsw5SDAbeGnOi?=\n\t=?iso-8859-1?q?H0MmO/YEgGhksEKrldnlkt4pAPDjp4fc6wSTne7U9HSoirZWTAsqUQrB8hvH?=\n\t=?iso-8859-1?q?4ZqRzU87rugb4xjxyWaacfzxvVG3qx8/keyuuGCncsLNYQLDBT2Z7iWBVrRS?=\n\t=?iso-8859-1?q?wofwTAsTERVDXJq6MMixUflX/f3ezPoJFBxrjeye+ticOtGwZtcva/kSd9Dq?=\n\t=?iso-8859-1?q?olwDKMVRrGylbBsGGIMHn2Qqv9/aoz3+T3okjSe81Le0eRhyU1EqcKtKRx3o?=\n\t=?iso-8859-1?q?sGKlkvl2iHPIUm9zLW5MGO0lXHs/TbnCy+oCzhvwutWQ+0789Me1MbmfsKgj?=\n\t=?iso-8859-1?q?YuMTZb9+XJGWA8b2JJrVmi8Pq4YXcS9Y21aDCi+MIk+k7qL56owuXYHmlHO9?=\n\t=?iso-8859-1?q?mKhTGIMTePYsWVDk4InD16BetIJdRdAsGTq/Xh1sLBbY82r/AqcAg0uCo1z8?=\n\t=?iso-8859-1?q?mVUXr8pqZVm8YU6i5U1k4ZcSwhr/gtRnRayGeREy7r50R1WxVQNm85FqNOHn?=\n\t=?iso-8859-1?q?kkcLmGxuc+ESZuwpoy5zMmhWTyTW9sy+PYCWOPxNQgpJRweciF0h5jm/NnZo?=\n\t=?iso-8859-1?q?6uE8v3ZYRMVkpFG2Xhw4HTPebwoLSkb5tmguAo2EC8a0KxEWm84CtqQhVamA?=\n\t=?iso-8859-1?q?yIZeupjczmJQmDTW+rqBB2ZIjIdqRqT6yt+JS5jUKEg0jUEyv6fYTGwLnxQO?=\n\t=?iso-8859-1?q?bmzy+qfYnXnHo/jE/RQByeWdeXz9UIiLmJfGXCSLEwOi6fwVDeqNwnGx1yp1?=\n\t=?iso-8859-1?q?LuBVT2RnQZg4QspVKokunNg1XOeOe39fcPgfQJJDinlHKegv5/2aUiWeK3g2?=\n\t=?iso-8859-1?q?ssipgfJqBy0L2SYOd4M8Wci3+KxIu23Knn/Br9nfT6kyB6SvdntHO9vcWFJd?=\n\t=?iso-8859-1?q?CDiKUoUqGs0u2cts8vs55OHwmgwaTfiPfW/cAYwXfrp6zlDhw3DeWV/C9Q2D?=\n\t=?iso-8859-1?q?OefJbcMPz8SMXjR5F3kOPMwdSsW1Fi2wsGjUt5DFWefVB0YQE27iQoY8i09+?=\n\t=?iso-8859-1?q?4PronbEi80cR0PqXwib2lSWsuHoluEfHQUqykAD24HnDbHq3anvLhTzi8kwu?=\n\t=?iso-8859-1?q?9NWLr8yN/ObUZhgCSzZeUnpqqDoaI7WTP9v6Pd/8qwQTOUANXawWoFu2v4+d?=\n\t=?iso-8859-1?q?acF8rBC1orvjfj6pvaH8tNS2sj+uVXg9QxuVC3oJP501qZ4nSUNa0MVowoOM?=\n\t=?iso-8859-1?q?/+yF3YkqOEm9Rk4zjqAQKRDeCWUygQ7YaBIiI7t2U3ewJUVNaWth8d3wtdSB?=\n\t=?iso-8859-1?q?PQq99XDx7CF/BOFkR6OIx+zxS5zqFjGakX78Te8aGKJ6Mdy65QtQIODXPoXd?=\n\t=?iso-8859-1?q?1FDVB0RHQ0WWH4q9Je3I0oDWCUFh6CUEtQ9Y09CfC2HlHnVJdDu1ay4cvU7S?=\n\t=?iso-8859-1?q?U44e7oJdQu/kyTXEGUx/yqT/F9J9SQ0MKNpUkulD0yO/QJrEcBY+Stzlsw5j?=\n\t=?iso-8859-1?q?zOTp8dSz4NbeWstNrrKhI2cvmmB3uAyHqqJ1XO4De/nmM7WV0i+to9X8soy3?=\n\t=?iso-8859-1?q?HdTmKk8fTt8gj31kBZpxc+Z0q2rBQlAuHpj/pHURzzaLW2spub/DIM2KjxcX?=\n\t=?iso-8859-1?q?Cde//SBE0BKUOBzlAYXKCssqfPJC6mR9IUvrUohboRTbzxkvdkQvDxPYOLZW?=\n\t=?iso-8859-1?q?q4LDqY/0AxF1j34lPATidwnIxh96PKju4mdS6f10aWMrXag=3D=3D?=", "Content-Type": "text/plain; charset=\"iso-8859-1\"", "Content-Transfer-Encoding": "quoted-printable", "MIME-Version": "1.0", "X-Exchange-RoutingPolicyChecked": "\n TTPQsGgNi35gLsmgvpZ3pZfcEvTyhCiAcIspspwR99eHxdqCHycZRcPbFPg3rZseE71SriCjFttCf0T7ngvZE2+papmRpOJL2W/5JJpC7nwPshtbpcmIdbod/8IugYyWbCVTn8783ao8C2taqKIuw4ad1x7BrCNO8JoGtmmaFrlvR8ukDBMbwANSEk3coAggxqNGi4Y5UayauXH6KOKT6AThcsk6iZn+GYxcPYz962/OFrWfUOghQHPzQjOHgA30DX6Viu2lhuD/ZhkFPyJmvawyH72RF4N/KbOy9jUiY2hqVpoQsJPohH1fUiyPrHm5FKqV8L53S56esGltz2kFqQ==", "X-OriginatorOrg": "aspeedtech.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-AuthSource": "TYPPR06MB8206.apcprd06.prod.outlook.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 76bc55e3-245b-4966-3b2b-08de9b5a6a96", "X-MS-Exchange-CrossTenant-originalarrivaltime": "16 Apr 2026 01:49:36.9579 (UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "43d4aa98-e35b-4575-8939-080e90d5a249", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "\n bj11OlVFg6Lx7AVLjEBtGN3gMUDtClsCBne5Y+OspN4KpsdfKKyWPPDJABwg6gr/xQe/wYWKYnAOaJTY8n6hIxRsEPenJu6wLRiIlu8eMZg=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SEYPR06MB6202", "Received-SPF": "pass client-ip=2a01:111:f403:c405::5;\n envelope-from=jamin_lin@aspeedtech.com;\n helo=TYPPR03CU001.outbound.protection.outlook.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "No functional change.\n\nSigned-off-by: Jamin Lin <jamin_lin@aspeedtech.com>\n---\n hw/usb/hcd-ehci.c | 126 +++++++++++++++++++++++++---------------------\n 1 file changed, 69 insertions(+), 57 deletions(-)", "diff": "diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c\nindex 5ea8461f70..9b92384bac 100644\n--- a/hw/usb/hcd-ehci.c\n+++ b/hw/usb/hcd-ehci.c\n@@ -41,21 +41,23 @@\n #define FRAME_TIMER_NS (NANOSECONDS_PER_SECOND / FRAME_TIMER_FREQ)\n #define UFRAME_TIMER_NS (FRAME_TIMER_NS / 8)\n \n-#define NB_MAXINTRATE 8 // Max rate at which controller issues ints\n-#define BUFF_SIZE 5*4096 // Max bytes to transfer per transaction\n-#define MAX_QH 100 // Max allowable queue heads in a chain\n+#define NB_MAXINTRATE 8 /* Max rate at which controller issues ints */\n+#define BUFF_SIZE (5 * 4096) /* Max bytes to transfer per transaction */\n+#define MAX_QH 100 /* Max allowable queue heads in a chain */\n #define MIN_UFR_PER_TICK 24 /* Min frames to process when catching up */\n #define PERIODIC_ACTIVE 512 /* Micro-frames */\n \n-/* Internal periodic / asynchronous schedule state machine states\n+/*\n+ * Internal periodic / asynchronous schedule state machine states\n */\n typedef enum {\n EST_INACTIVE = 1000,\n EST_ACTIVE,\n EST_EXECUTING,\n EST_SLEEPING,\n- /* The following states are internal to the state machine function\n- */\n+ /*\n+ * The following states are internal to the state machine function\n+ */\n EST_WAITLISTHEAD,\n EST_FETCHENTRY,\n EST_FETCHQH,\n@@ -71,13 +73,13 @@ typedef enum {\n /* macros for accessing fields within next link pointer entry */\n #define NLPTR_GET(x) ((x) & 0xffffffe0)\n #define NLPTR_TYPE_GET(x) (((x) >> 1) & 3)\n-#define NLPTR_TBIT(x) ((x) & 1) // 1=invalid, 0=valid\n+#define NLPTR_TBIT(x) ((x) & 1) /* 1=invalid, 0=valid */\n \n /* link pointer types */\n-#define NLPTR_TYPE_ITD 0 // isoc xfer descriptor\n-#define NLPTR_TYPE_QH 1 // queue head\n-#define NLPTR_TYPE_STITD 2 // split xaction, isoc xfer descriptor\n-#define NLPTR_TYPE_FSTN 3 // frame span traversal node\n+#define NLPTR_TYPE_ITD 0 /* isoc xfer descriptor */\n+#define NLPTR_TYPE_QH 1 /* queue head */\n+#define NLPTR_TYPE_STITD 2 /* split xaction, isoc xfer descriptor */\n+#define NLPTR_TYPE_FSTN 3 /* frame span traversal node */\n \n #define SET_LAST_RUN_CLOCK(s) \\\n (s)->last_run_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);\n@@ -88,10 +90,10 @@ typedef enum {\n \n #define set_field(data, newval, field) do { \\\n uint32_t val = *data; \\\n- val &= ~ field##_MASK; \\\n+ val &= ~field##_MASK; \\\n val |= ((newval) << field##_SH) & field##_MASK; \\\n *data = val; \\\n- } while(0)\n+ } while (0)\n \n static const char *ehci_state_names[] = {\n [EST_INACTIVE] = \"INACTIVE\",\n@@ -472,8 +474,10 @@ static bool ehci_verify_pid(EHCIQueue *q, EHCIqtd *qtd)\n }\n }\n \n-/* Finish executing and writeback a packet outside of the regular\n- fetchqh -> fetchqtd -> execute -> writeback cycle */\n+/*\n+ * Finish executing and writeback a packet outside of the regular\n+ * fetchqh -> fetchqtd -> execute -> writeback cycle\n+ */\n static void ehci_writeback_async_complete_packet(EHCIPacket *p)\n {\n EHCIQueue *q = p->queue;\n@@ -733,7 +737,7 @@ static void ehci_detach(USBPort *port)\n ehci_queues_rip_device(s, port->dev, 0);\n ehci_queues_rip_device(s, port->dev, 1);\n \n- *portsc &= ~(PORTSC_CONNECT|PORTSC_PED|PORTSC_SUSPEND);\n+ *portsc &= ~(PORTSC_CONNECT | PORTSC_PED | PORTSC_SUSPEND);\n *portsc |= PORTSC_CSC;\n \n ehci_raise_irq(s, USBSTS_PCD);\n@@ -858,7 +862,7 @@ void ehci_reset(void *opaque)\n * Do the detach before touching portsc, so that it correctly gets send to\n * us or to our companion based on PORTSC_POWNER before the reset.\n */\n- for(i = 0; i < EHCI_PORTS; i++) {\n+ for (i = 0; i < EHCI_PORTS; i++) {\n devs[i] = s->ports[i].dev;\n if (devs[i] && devs[i]->attached) {\n usb_detach(&s->ports[i]);\n@@ -877,7 +881,7 @@ void ehci_reset(void *opaque)\n s->astate = EST_INACTIVE;\n s->pstate = EST_INACTIVE;\n \n- for(i = 0; i < EHCI_PORTS; i++) {\n+ for (i = 0; i < EHCI_PORTS; i++) {\n if (s->companion_ports[i]) {\n s->portsc[i] = PORTSC_POWNER | PORTSC_PPOWER;\n } else {\n@@ -942,8 +946,9 @@ static void handle_port_owner_write(EHCIState *s, int port, uint32_t owner)\n uint32_t *portsc = &s->portsc[port];\n uint32_t orig;\n \n- if (s->companion_ports[port] == NULL)\n+ if (s->companion_ports[port] == NULL) {\n return;\n+ }\n \n owner = owner & PORTSC_POWNER;\n orig = *portsc & PORTSC_POWNER;\n@@ -988,7 +993,7 @@ static void ehci_port_write(void *ptr, hwaddr addr,\n trace_usb_ehci_port_reset(port, 1);\n }\n \n- if (!(val & PORTSC_PRESET) &&(*portsc & PORTSC_PRESET)) {\n+ if (!(val & PORTSC_PRESET) && (*portsc & PORTSC_PRESET)) {\n trace_usb_ehci_port_reset(port, 0);\n if (dev && dev->attached) {\n usb_port_reset(&s->ports[port]);\n@@ -1065,8 +1070,10 @@ static void ehci_opreg_write(void *ptr, hwaddr addr,\n break;\n \n case USBSTS:\n- val &= USBSTS_RO_MASK; // bits 6 through 31 are RO\n- ehci_clear_usbsts(s, val); // bits 0 through 5 are R/WC\n+ /* bits 6 through 31 are RO */\n+ val &= USBSTS_RO_MASK;\n+ /* bits 0 through 5 are R/WC */\n+ ehci_clear_usbsts(s, val);\n val = s->usbsts;\n ehci_update_irq(s);\n break;\n@@ -1131,8 +1138,7 @@ static void ehci_flush_qh(EHCIQueue *q)\n put_dwords(q->ehci, addr + 3 * sizeof(uint32_t), qh + 3, dwords - 3);\n }\n \n-// 4.10.2\n-\n+/* 4.10.2 */\n static int ehci_qh_do_overlay(EHCIQueue *q)\n {\n EHCIPacket *p = QTAILQ_FIRST(&q->packets);\n@@ -1145,8 +1151,7 @@ static int ehci_qh_do_overlay(EHCIQueue *q)\n assert(p != NULL);\n assert(p->qtdaddr == q->qtdaddr);\n \n- // remember values in fields to preserve in qh after overlay\n-\n+ /* remember values in fields to preserve in qh after overlay */\n dtoggle = q->qh.token & QTD_TOKEN_DTOGGLE;\n ping = q->qh.token & QTD_TOKEN_PING;\n \n@@ -1170,7 +1175,7 @@ static int ehci_qh_do_overlay(EHCIQueue *q)\n }\n \n if (!(q->qh.epchar & QH_EPCHAR_DTC)) {\n- // preserve QH DT bit\n+ /* preserve QH DT bit */\n q->qh.token &= ~QTD_TOKEN_DTOGGLE;\n q->qh.token |= dtoggle;\n }\n@@ -1397,9 +1402,7 @@ static int ehci_execute(EHCIPacket *p, const char *action)\n return 1;\n }\n \n-/* 4.7.2\n- */\n-\n+/* 4.7.2 */\n static int ehci_process_itd(EHCIState *ehci,\n EHCIitd *itd,\n uint32_t addr)\n@@ -1411,13 +1414,13 @@ static int ehci_process_itd(EHCIState *ehci,\n \n ehci->periodic_sched_active = PERIODIC_ACTIVE;\n \n- dir =(itd->bufptr[1] & ITD_BUFPTR_DIRECTION);\n+ dir = (itd->bufptr[1] & ITD_BUFPTR_DIRECTION);\n devaddr = get_field(itd->bufptr[0], ITD_BUFPTR_DEVADDR);\n endp = get_field(itd->bufptr[0], ITD_BUFPTR_EP);\n max = get_field(itd->bufptr[1], ITD_BUFPTR_MAXPKT);\n mult = get_field(itd->bufptr[2], ITD_BUFPTR_MULT);\n \n- for(i = 0; i < 8; i++) {\n+ for (i = 0; i < 8; i++) {\n if (itd->transact[i] & ITD_XACT_ACTIVE) {\n pg = get_field(itd->transact[i], ITD_XACT_PGSEL);\n off = itd->transact[i] & ITD_XACT_OFFSET_MASK;\n@@ -1513,8 +1516,9 @@ static int ehci_process_itd(EHCIState *ehci,\n }\n \n \n-/* This state is the entry point for asynchronous schedule\n- * processing. Entry here constitutes a EHCI start event state (4.8.5)\n+/*\n+ * This state is the entry point for asynchronous schedule\n+ * processing. Entry here constitutes a EHCI start event state (4.8.5)\n */\n static int ehci_state_waitlisthead(EHCIState *ehci, int async)\n {\n@@ -1531,7 +1535,7 @@ static int ehci_state_waitlisthead(EHCIState *ehci, int async)\n ehci_queues_rip_unused(ehci, async);\n \n /* Find the head of the list (4.9.1.1) */\n- for(i = 0; i < MAX_QH; i++) {\n+ for (i = 0; i < MAX_QH; i++) {\n if (get_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &qh,\n sizeof(EHCIqh) >> 2) < 0) {\n return 0;\n@@ -1564,8 +1568,9 @@ out:\n }\n \n \n-/* This state is the entry point for periodic schedule processing as\n- * well as being a continuation state for async processing.\n+/*\n+ * This state is the entry point for periodic schedule processing as\n+ * well as being a continuation state for async processing.\n */\n static int ehci_state_fetchentry(EHCIState *ehci, int async)\n {\n@@ -1674,7 +1679,7 @@ static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci, int async)\n \n #if EHCI_DEBUG\n if (q->qhaddr != q->qh.next) {\n- DPRINTF(\"FETCHQH: QH 0x%08x (h %x halt %x active %x) next 0x%08x\\n\",\n+ DPRINTF(\"FETCHQH: QH 0x%08x (h %x halt %x active %x) next 0x%08x\\n\",\n q->qhaddr,\n q->qh.epchar & QH_EPCHAR_H,\n q->qh.token & QTD_TOKEN_HALT,\n@@ -1924,8 +1929,10 @@ static int ehci_state_execute(EHCIQueue *q)\n return -1;\n }\n \n- // TODO verify enough time remains in the uframe as in 4.4.1.1\n- // TODO write back ptr to async list when done or out of time\n+ /*\n+ * TODO verify enough time remains in the uframe as in 4.4.1.1\n+ * TODO write back ptr to async list when done or out of time\n+ */\n \n /* 4.10.3, bottom of page 82, go horizontal on transaction counter == 0 */\n if (!q->async && q->transact_ctr == 0) {\n@@ -2036,7 +2043,7 @@ static void ehci_advance_state(EHCIState *ehci, int async)\n int again;\n \n do {\n- switch(ehci_get_state(ehci, async)) {\n+ switch (ehci_get_state(ehci, async)) {\n case EST_WAITLISTHEAD:\n again = ehci_state_waitlisthead(ehci, async);\n break;\n@@ -2115,21 +2122,20 @@ static void ehci_advance_state(EHCIState *ehci, int async)\n ehci_reset(ehci);\n again = 0;\n }\n- }\n- while (again);\n+ } while (again);\n }\n \n static void ehci_advance_async_state(EHCIState *ehci)\n {\n const int async = 1;\n \n- switch(ehci_get_state(ehci, async)) {\n+ switch (ehci_get_state(ehci, async)) {\n case EST_INACTIVE:\n if (!ehci_async_enabled(ehci)) {\n break;\n }\n ehci_set_state(ehci, async, EST_ACTIVE);\n- // No break, fall through to ACTIVE\n+ /* No break, fall through to ACTIVE */\n \n case EST_ACTIVE:\n if (!ehci_async_enabled(ehci)) {\n@@ -2153,7 +2159,8 @@ static void ehci_advance_async_state(EHCIState *ehci)\n ehci_set_state(ehci, async, EST_WAITLISTHEAD);\n ehci_advance_state(ehci, async);\n \n- /* If the doorbell is set, the guest wants to make a change to the\n+ /*\n+ * If the doorbell is set, the guest wants to make a change to the\n * schedule. The host controller needs to release cached data.\n * (section 4.8.2)\n */\n@@ -2180,13 +2187,13 @@ static void ehci_advance_periodic_state(EHCIState *ehci)\n uint32_t list;\n const int async = 0;\n \n- // 4.6\n+ /* 4.6 */\n \n- switch(ehci_get_state(ehci, async)) {\n+ switch (ehci_get_state(ehci, async)) {\n case EST_INACTIVE:\n if (!(ehci->frindex & 7) && ehci_periodic_enabled(ehci)) {\n ehci_set_state(ehci, async, EST_ACTIVE);\n- // No break, fall through to ACTIVE\n+ /* No break, fall through to ACTIVE */\n } else\n break;\n \n@@ -2210,7 +2217,7 @@ static void ehci_advance_periodic_state(EHCIState *ehci)\n \n DPRINTF(\"PERIODIC state adv fr=%d. [%08X] -> %08X\\n\",\n ehci->frindex / 8, list, entry);\n- ehci_set_fetch_addr(ehci, async,entry);\n+ ehci_set_fetch_addr(ehci, async, entry);\n ehci_set_state(ehci, async, EST_FETCHENTRY);\n ehci_advance_state(ehci, async);\n ehci_queues_rip_unused(ehci, async);\n@@ -2235,7 +2242,8 @@ static void ehci_update_frindex(EHCIState *ehci, int uframes)\n ehci_raise_irq(ehci, USBSTS_FLR);\n }\n \n- /* How many times will frindex roll over 0x4000 with this frame count?\n+ /*\n+ * How many times will frindex roll over 0x4000 with this frame count?\n * usbsts_frindex is decremented by 0x4000 on rollover until it reaches 0\n */\n int rollovers = (ehci->frindex + uframes) / 0x4000;\n@@ -2315,8 +2323,9 @@ static void ehci_work_bh(void *opaque)\n ehci->async_stepdown++;\n }\n \n- /* Async is not inside loop since it executes everything it can once\n- * called\n+ /*\n+ * Async is not inside loop since it executes everything it can once\n+ * called\n */\n if (ehci_async_enabled(ehci) || ehci->astate != EST_INACTIVE) {\n need_timer++;\n@@ -2334,15 +2343,18 @@ static void ehci_work_bh(void *opaque)\n }\n \n if (need_timer) {\n- /* If we've raised int, we speed up the timer, so that we quickly\n- * notice any new packets queued up in response */\n+ /*\n+ * If we've raised int, we speed up the timer, so that we quickly\n+ * notice any new packets queued up in response\n+ */\n if (ehci->int_req_by_async && (ehci->usbsts & USBSTS_INT)) {\n expire_time = t_now +\n NANOSECONDS_PER_SECOND / (FRAME_TIMER_FREQ * 4);\n ehci->int_req_by_async = false;\n } else {\n- expire_time = t_now + (NANOSECONDS_PER_SECOND\n- * (ehci->async_stepdown+1) / FRAME_TIMER_FREQ);\n+ expire_time = t_now\n+ + (NANOSECONDS_PER_SECOND * (ehci->async_stepdown + 1) /\n+ FRAME_TIMER_FREQ);\n }\n timer_mod(ehci->frame_timer, expire_time);\n }\n", "prefixes": [ "v3", "03/17" ] }