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GET /api/1.1/patches/2223668/?format=api
{ "id": 2223668, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223668/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415233740.3027321-2-alistair.francis@wdc.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260415233740.3027321-2-alistair.francis@wdc.com>", "date": "2026-04-15T23:37:37", "name": "[v2,1/4] target/riscv: Generate access fault if sc comparison fails", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "08880561d47e361c0a5e21fc961391f12bd4a407", "submitter": { "id": 64571, "url": "http://patchwork.ozlabs.org/api/1.1/people/64571/?format=api", "name": "Alistair Francis", "email": "alistair23@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415233740.3027321-2-alistair.francis@wdc.com/mbox/", "series": [ { "id": 500054, "url": "http://patchwork.ozlabs.org/api/1.1/series/500054/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500054", "date": "2026-04-15T23:37:38", "name": "target/riscv: A collection of bug fixes", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500054/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223668/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223668/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=Yv40ksUM;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pl1-x62a.google.com", "X-Spam_score_int": "-17", "X-Spam_score": "-1.8", "X-Spam_bar": "-", "X-Spam_report": "(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Alistair Francis <alistair.francis@wdc.com>\n\nThe RISC-V spec states:\n\n\"For the purposes of memory protection, a failed SC.W may be treated\nlike a store.\"\n\nSo if the comparison in sc.w fails we should still check for alignment\nand do a probe access to check permissions.\n\nCc: qemu-stable@nongnu.org\nResolves: https://gitlab.com/qemu-project/qemu/-/work_items/3323\nResolves: https://gitlab.com/qemu-project/qemu/-/work_items/3136\nSigned-off-by: Alistair Francis <alistair.francis@wdc.com>\nReviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>\nReviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>\n---\n target/riscv/helper.h | 3 +++\n target/riscv/op_helper.c | 14 ++++++++++++++\n target/riscv/insn_trans/trans_rva.c.inc | 6 ++++++\n 3 files changed, 23 insertions(+)", "diff": "diff --git a/target/riscv/helper.h b/target/riscv/helper.h\nindex b785456ee0..fa16ab2b82 100644\n--- a/target/riscv/helper.h\n+++ b/target/riscv/helper.h\n@@ -1289,3 +1289,6 @@ DEF_HELPER_4(vsm4r_vs, void, ptr, ptr, env, i32)\n #ifndef CONFIG_USER_ONLY\n DEF_HELPER_1(ssamoswap_disabled, void, env)\n #endif\n+\n+/* Zalrsc SC write probe */\n+DEF_HELPER_FLAGS_3(sc_probe_write, TCG_CALL_NO_WG, void, env, tl, tl)\ndiff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c\nindex 6ccc127c30..b569366369 100644\n--- a/target/riscv/op_helper.c\n+++ b/target/riscv/op_helper.c\n@@ -281,6 +281,20 @@ void helper_cbo_inval(CPURISCVState *env, target_ulong address)\n /* We don't emulate the cache-hierarchy, so we're done. */\n }\n \n+void helper_sc_probe_write(CPURISCVState *env, target_ulong addr,\n+ target_ulong size)\n+{\n+ uintptr_t ra = GETPC();\n+ int mmu_idx = riscv_env_mmu_index(env, false);\n+\n+ if (addr & (size - 1)) {\n+ env->badaddr = addr;\n+ riscv_raise_exception(env, RISCV_EXCP_STORE_AMO_ADDR_MIS, ra);\n+ }\n+\n+ probe_write(env, addr, size, mmu_idx, ra);\n+}\n+\n #ifndef CONFIG_USER_ONLY\n \n target_ulong helper_sret(CPURISCVState *env)\ndiff --git a/target/riscv/insn_trans/trans_rva.c.inc b/target/riscv/insn_trans/trans_rva.c.inc\nindex a7a3278d24..62c0fe673d 100644\n--- a/target/riscv/insn_trans/trans_rva.c.inc\n+++ b/target/riscv/insn_trans/trans_rva.c.inc\n@@ -90,6 +90,12 @@ static bool gen_sc(DisasContext *ctx, arg_atomic *a, MemOp mop)\n */\n TCGBar bar_strl = (ctx->ztso || a->rl) ? TCG_BAR_STRL : 0;\n tcg_gen_mb(TCG_MO_ALL + a->aq * TCG_BAR_LDAQ + bar_strl);\n+ /*\n+ * \"For the purposes of memory protection, a failed SC.W may be treated\n+ * like a store.\" so let's check the write access permissions\n+ */\n+ gen_helper_sc_probe_write(tcg_env, src1,\n+ tcg_constant_tl(memop_size(mop)));\n gen_set_gpr(ctx, a->rd, tcg_constant_tl(1));\n \n gen_set_label(l2);\n", "prefixes": [ "v2", "1/4" ] }