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GET /api/1.1/patches/2223657/?format=api
{ "id": 2223657, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223657/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260415221349.450669-1-marek.vasut+renesas@mailbox.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260415221349.450669-1-marek.vasut+renesas@mailbox.org>", "date": "2026-04-15T22:12:43", "name": "remoteproc: renesas: Add Renesas R-Car Gen5 remote processor driver", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5ded73c40f9a4d2df161cf3dd16828f2a0f83171", "submitter": { "id": 85650, "url": "http://patchwork.ozlabs.org/api/1.1/people/85650/?format=api", "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org" }, "delegate": { "id": 1699, "url": "http://patchwork.ozlabs.org/api/1.1/users/1699/?format=api", "username": "marex", "first_name": "Marek", "last_name": "Vasut", "email": "marek.vasut@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260415221349.450669-1-marek.vasut+renesas@mailbox.org/mbox/", "series": [ { "id": 500048, "url": "http://patchwork.ozlabs.org/api/1.1/series/500048/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=500048", "date": "2026-04-15T22:12:43", "name": "remoteproc: renesas: Add Renesas R-Car Gen5 remote processor driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500048/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223657/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223657/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=mailbox.org header.i=@mailbox.org header.a=rsa-sha256\n header.s=mail20150812 header.b=E4mZW8uI;\n\tdkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org\n header.a=rsa-sha256 header.s=mail20150812 header.b=AgCuajuB;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Thu, 16 Apr 2026 08:14:13 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 094E983015;\n\tThu, 16 Apr 2026 00:14:05 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id B844E84201; Thu, 16 Apr 2026 00:14:02 +0200 (CEST)", "from mout-p-201.mailbox.org (mout-p-201.mailbox.org [80.241.56.171])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 367CD84214\n for <u-boot@lists.denx.de>; Thu, 16 Apr 2026 00:13:57 +0200 (CEST)", "from smtp1.mailbox.org (smtp1.mailbox.org\n [IPv6:2001:67c:2050:b231:465::1])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest\n SHA256)\n (No client certificate requested)\n by mout-p-201.mailbox.org (Postfix) with ESMTPS id 4fwwQr4Jxgz9tZ7;\n Thu, 16 Apr 2026 00:13:56 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED,\n SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org;\n s=mail20150812; t=1776291236;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding;\n bh=nqaIGo7unODaNf/2gq3MPvfViE/I7CMwxHZ7lpdhPiQ=;\n b=E4mZW8uIsrATft6QbT7UcJgRJ0umlI2OPt0Zr6D9K2ARkZgfpJLoFSj1akmPxJMNDTaUpd\n ZfBWkfAUldq1PyICcv00skq+AQtcju7OA1+5bTi0dqZAc5iU+nMMR8aMrRBOAKXH8mSKO6\n MF/F25AbfN/o63YQKmANZIf670r8PYBahIjpmcUO+Shsqik9n8STWFbLeFzNaYkNjCJnSi\n VIhYAvWfdlKKbXgXzgxlARFoOSoePCcjCNJ4pda8YzjhntClsqnkzI7dcbNfd9VNS1n+W8\n tBuLzDgDbxan0n6AzuQyLHRArtk+wBGZq0fiGZTLgeFG6mW8ewfuRmo2gmAKBQ==", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org;\n s=mail20150812; t=1776291234;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding;\n bh=nqaIGo7unODaNf/2gq3MPvfViE/I7CMwxHZ7lpdhPiQ=;\n b=AgCuajuBaevFZK4WOzGPspSEj0wxqxTGIRadIb1LvoaVD5Ajd5uaYXclsFel3JDMsABp6Q\n PKCTzbKN7N9EM3g9Wa1GzliHUmTqmLyey+J0H9KxdjodXlJBSz12k1Ec2KEv7DRv1zUMBe\n Rz8BpzoLyQ9AntYciRBj0y2ps2Xnk1+i48opIXCnyPPViajJzLNxOcezhOYBEaw0HQLO4Y\n d/AZ1xWbcA62h9yy068JQV/yqDEEcthbAq2pLu0oAtRI7eZs3yIjEJPrhTI8TXtG2ReHRH\n HjbEO5wPgnthpS8T01OXKBX1Lddowc/HfdFGwz6beheslIxv9V65ySjDOJDajg==" ], "From": "Marek Vasut <marek.vasut+renesas@mailbox.org>", "To": "u-boot@lists.denx.de", "Cc": "Marek Vasut <marek.vasut+renesas@mailbox.org>,\n Nobuhiro Iwamatsu <iwamatsu@nigauri.org>, Peng Fan <peng.fan@nxp.com>,\n Tom Rini <trini@konsulko.com>, Ye Li <ye.li@nxp.com>", "Subject": "[PATCH] remoteproc: renesas: Add Renesas R-Car Gen5 remote processor\n driver", "Date": "Thu, 16 Apr 2026 00:12:43 +0200", "Message-ID": "<20260415221349.450669-1-marek.vasut+renesas@mailbox.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-MBO-RS-ID": "4d6be2c73f0eada8dcc", "X-MBO-RS-META": "w44rqwzkoo3x78zxkz9gopcymj53t1fy", "X-Rspamd-Queue-Id": "4fwwQr4Jxgz9tZ7", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add R-Car Gen5 RSIP controller remoteproc driver capable of starting\nthe SCP, Cortex-R52 and Cortex-A720 cores in Renesas R-Car R8A78000\nX5H SoC. The SCP core is started by releasing the core from reset,\nthe Cortex-R52 and Cortex-A720 are started using the SCP SCMI call.\nThe entry point for SCP core is fixed to its STCM, entry points for\nCortex-R52 and Cortex-A720 are set during rproc load.\n\nSigned-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>\n---\nCc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>\nCc: Peng Fan <peng.fan@nxp.com>\nCc: Tom Rini <trini@konsulko.com>\nCc: Ye Li <ye.li@nxp.com>\nCc: u-boot@lists.denx.de\n---\n drivers/remoteproc/Kconfig | 9 +\n drivers/remoteproc/Makefile | 1 +\n drivers/remoteproc/renesas_rsip.c | 358 ++++++++++++++++++++++++++++++\n 3 files changed, 368 insertions(+)\n create mode 100644 drivers/remoteproc/renesas_rsip.c", "diff": "diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig\nindex f07ae903a28..7f9e35283f9 100644\n--- a/drivers/remoteproc/Kconfig\n+++ b/drivers/remoteproc/Kconfig\n@@ -48,6 +48,15 @@ config REMOTEPROC_RENESAS_APMU\n \t Say 'y' here to add support for Renesas R-Car Gen4 Cortex-R52\n \t processor via the remoteproc framework.\n \n+config REMOTEPROC_RENESAS_RSIP\n+\tbool \"Support for Renesas R-Car Gen5 RSIP start of SCP/CR52/CA720 processors\"\n+\tselect REMOTEPROC\n+\tdepends on ARCH_RENESAS && RCAR_GEN5 && DM && OF_CONTROL\n+\thelp\n+\t Say 'y' here to add support for Renesas R-Car Gen5 RSIP\n+\t start of SCP, Cortex-R52 and Cortex-A720 processors via\n+\t the remoteproc framework.\n+\n config REMOTEPROC_SANDBOX\n \tbool \"Support for Test processor for Sandbox\"\n \tselect REMOTEPROC\ndiff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile\nindex 7ea8023c50b..250915d0de4 100644\n--- a/drivers/remoteproc/Makefile\n+++ b/drivers/remoteproc/Makefile\n@@ -11,6 +11,7 @@ obj-$(CONFIG_K3_SYSTEM_CONTROLLER) += k3_system_controller.o\n obj-$(CONFIG_REMOTEPROC_ADI_SC5XX) += adi_sc5xx_rproc.o\n obj-$(CONFIG_REMOTEPROC_IMX) += imx_rproc.o\n obj-$(CONFIG_REMOTEPROC_RENESAS_APMU) += renesas_apmu.o\n+obj-$(CONFIG_REMOTEPROC_RENESAS_RSIP) += renesas_rsip.o\n obj-$(CONFIG_REMOTEPROC_SANDBOX) += sandbox_testproc.o\n obj-$(CONFIG_REMOTEPROC_STM32_COPRO) += stm32_copro.o\n obj-$(CONFIG_REMOTEPROC_TI_K3_ARM64) += ti_k3_arm64_rproc.o\ndiff --git a/drivers/remoteproc/renesas_rsip.c b/drivers/remoteproc/renesas_rsip.c\nnew file mode 100644\nindex 00000000000..76ccaf93b1a\n--- /dev/null\n+++ b/drivers/remoteproc/renesas_rsip.c\n@@ -0,0 +1,358 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause\n+/*\n+ * Copyright (C) 2026 Renesas Electronics Corp.\n+ */\n+\n+#include <asm/io.h>\n+#include <dm.h>\n+#include <dm/device-internal.h>\n+#include <dm/lists.h>\n+#include <errno.h>\n+#include <hang.h>\n+#include <linux/iopoll.h>\n+#include <linux/sizes.h>\n+#include <malloc.h>\n+#include <remoteproc.h>\n+\n+/* R-Car X5H contains 1 SCP core, 6 lockstep Cortex-R52 and 32 Cortex-A720AE cores. */\n+#define RCAR5_SCP_CORES\t\t\t1\n+#define RCAR5_CR52_CORES\t\t12\n+#define RCAR5_CA720_CORES\t\t32\n+\n+#define SCP_BASE\t\t\t0xc1340000\n+#define SCP_CPUWAIT\t\t\t(SCP_BASE + 0x30)\n+#define SCP_CPUWAIT_WAIT\t\tBIT(0)\n+#define SCP_STCM\t\t\t0xc1000000\n+\n+struct scp_scmi_shmem {\n+\tu32\treserved0;\n+\tu32\tstatus;\n+\tu64\treserved1;\n+\tu32\tflags;\n+\tu32\tlength;\n+\tu32\tmessage_header;\n+\tu8\tpayload[];\n+};\n+\n+struct scp_scmi_pd_power_state_set_a2p {\n+\tu32\tflags;\n+\tu32\tdomain_id;\n+\tu32\tpower_state;\n+\tu32\tboot_addr;\n+};\n+\n+/* The addresses in range 0x08000000..0x1fffffff are incremented by 0xa0000000 */\n+#define MFIS_COMMON_BASE\t0xb89e1000\n+#define MFIS_SCP_WACNTR\t\t(MFIS_COMMON_BASE + 0x904)\n+\n+/* The addresses in range 0x08000000..0x1fffffff are incremented by 0xa0000000 */\n+#define MFIS_SCP_BASE\t\t0xb8840000\n+#define MFIS_SCP_REICR8\t\t(MFIS_SCP_BASE + 0x28004)\n+#define MFIS_SCP_CODEVALUE\t0xacc00000\n+#define MFIS_SCP_REG_MASK\tGENMASK(19, 0)\n+\n+/**\n+ * mfis_scp_unlock() - Release MFIS-SCP lock\n+ * @lck: MFIS lock register\n+ */\n+static void mfis_scp_unlock(const u32 lck)\n+{\n+\twritel(MFIS_SCP_CODEVALUE | (lck & MFIS_SCP_REG_MASK), MFIS_SCP_WACNTR);\n+}\n+\n+#define SCP_SCMI_SHMEM_AREA09\t\t0xc1060800\n+#define SCP_SCMI_STATUS_MASK\t\t0x3\n+#define SCP_SCMI_STATUS_FREE\t\t0x1\n+\n+/**\n+ * scp_wait_fw_free() - Wait for SCP channel to be free for communication\n+ */\n+static void scp_wait_fw_free(void)\n+{\n+\tstruct scp_scmi_shmem *shmem = (struct scp_scmi_shmem *)SCP_SCMI_SHMEM_AREA09;\n+\n+\twhile ((shmem->status & SCP_SCMI_STATUS_MASK) != SCP_SCMI_STATUS_FREE)\n+\t\tmdelay(1);\n+}\n+\n+/**\n+ * scp_send_interrupt() - Raise interrupt on SCP side\n+ */\n+static void scp_send_interrupt(void)\n+{\n+\tmfis_scp_unlock(MFIS_SCP_REICR8);\n+\t/* Send SCP IRQ */\n+\twritel(1, MFIS_SCP_REICR8);\n+}\n+\n+/* SCMI power domain IDs */\n+#define SCMI_PD_CORE_RT_CORE00\t\t\t117\n+#define SCMI_PD_CORE_AP_CORE00\t\t\t129\n+\n+/*\n+ * FIXME: This is custom extension to the SCMI PD protocol:\n+ * - Protocol 0x11 (PD)\n+ * - Command 0x11 (POWER_STATE_SET_BOOTADDR - custom)\n+ * This must be removed when proper upstream SCP port exists\n+ */\n+#define SCMI_PD_POWER_STATE_SET_BOOTADDR\t0x4411\n+\n+/**\n+ * scp_cpu_core_start() - Boot CPU core by invoking SCP via SCMI\n+ * @core: CPU core to boot\n+ * @ep: Entry point\n+ */\n+static void scp_cpu_core_start(const u32 core, const u32 ep)\n+{\n+\tstruct scp_scmi_shmem *shmem = (struct scp_scmi_shmem *)SCP_SCMI_SHMEM_AREA09;\n+\tstruct scp_scmi_pd_power_state_set_a2p scmi_parameter = {\n+\t\t.flags = 1,\t/* Asynchronous power transition using APMU */\n+\t\t.domain_id = core,\n+\t\t.power_state = 0,\t/* Power on */\n+\t\t.boot_addr = ep,\n+\t};\n+\tu32 status;\n+\n+\t/* Wait for SCP to be free, then set it busy */\n+\tscp_wait_fw_free();\n+\tshmem->status &= ~SCP_SCMI_STATUS_FREE;\n+\n+\t/* Set up the message and copy it to SHMEM */\n+\tshmem->message_header = SCMI_PD_POWER_STATE_SET_BOOTADDR;\n+\tmemcpy(shmem->payload, &scmi_parameter, sizeof(scmi_parameter));\n+\tshmem->length = sizeof(shmem->message_header) + sizeof(scmi_parameter);\n+\n+\t/* Send message to SCP and wait for completion */\n+\tscp_send_interrupt();\n+\tscp_wait_fw_free();\n+\n+\t/* Read back the result */\n+\tstatus = readl((uintptr_t)shmem->payload);\n+\tif (status)\n+\t\tprintf(\"SCP POWER_STATE_SET failed, status=0x%x\\n\", status);\n+}\n+\n+/**\n+ * struct renesas_rsip_rproc_privdata - remote processor private data\n+ * @core_id:\t\tCPU core id\n+ * @ep:\t\t\tEntry point\n+ */\n+struct renesas_rsip_rproc_privdata {\n+\tulong\t\tcore_id;\n+\tulong\t\tep;\n+};\n+\n+/**\n+ * renesas_rsip_rproc_load() - Load the remote processor\n+ * @dev:\tcorresponding remote processor device\n+ * @addr:\tAddress in memory where image is stored\n+ * @size:\tSize in bytes of the image\n+ *\n+ * Return: 0 if all went ok, else corresponding -ve error\n+ */\n+static int renesas_rsip_rproc_load(struct udevice *dev, ulong addr, ulong size)\n+{\n+\tstruct renesas_rsip_rproc_privdata *priv = dev_get_priv(dev);\n+\n+\tpriv->ep = addr;\n+\n+\tif (priv->core_id == 0)\t\t/* SCP */\n+\t\tmemcpy((void *)SCP_STCM, (void *)addr, size);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * renesas_rsip_rproc_start() - Start the remote processor\n+ * @dev:\tcorresponding remote processor device\n+ *\n+ * Return: 0 if all went ok, else corresponding -ve error\n+ */\n+static int renesas_rsip_rproc_start(struct udevice *dev)\n+{\n+\tstruct renesas_rsip_rproc_privdata *priv = dev_get_priv(dev);\n+\tint scmi_core;\n+\n+\tif (priv->core_id == 0) {\n+\t\t/* SCP */\n+\t\tclrbits_le32(SCP_CPUWAIT, SCP_CPUWAIT_WAIT);\n+\t\treturn 0;\n+\t} else if (priv->core_id >= RCAR5_SCP_CORES &&\n+\t\t priv->core_id < RCAR5_SCP_CORES + RCAR5_CR52_CORES) {\n+\t\t/* CR52 */\n+\t\tscmi_core = priv->core_id - RCAR5_SCP_CORES +\n+\t\t\t SCMI_PD_CORE_RT_CORE00;\n+\t} else if (priv->core_id >= RCAR5_SCP_CORES + RCAR5_CR52_CORES &&\n+\t\t priv->core_id < RCAR5_SCP_CORES + RCAR5_CR52_CORES + RCAR5_CA720_CORES) {\n+\t\t/* CA720 */\n+\t\tscmi_core = priv->core_id - RCAR5_SCP_CORES - RCAR5_CR52_CORES +\n+\t\t\t SCMI_PD_CORE_AP_CORE00;\n+\t}\n+\n+\tscp_cpu_core_start(scmi_core, priv->ep);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * renesas_rsip_rproc_stop() - Stop the remote processor\n+ * @dev:\tcorresponding remote processor device\n+ *\n+ * Return: 0 if all went ok, else corresponding -ve error\n+ */\n+static int renesas_rsip_rproc_stop(struct udevice *dev)\n+{\n+\tstruct renesas_rsip_rproc_privdata *priv = dev_get_priv(dev);\n+\n+\tif (priv->core_id == 0) {\t/* SCP */\n+\t\tsetbits_le32(SCP_CPUWAIT, SCP_CPUWAIT_WAIT);\n+\t\treturn 0;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * renesas_rsip_rproc_reset() - Reset the remote processor\n+ * @dev:\tcorresponding remote processor device\n+ *\n+ * Return: 0 if all went ok, else corresponding -ve error\n+ */\n+static int renesas_rsip_rproc_reset(struct udevice *dev)\n+{\n+\trenesas_rsip_rproc_stop(dev);\n+\trenesas_rsip_rproc_start(dev);\n+\treturn 0;\n+}\n+\n+/**\n+ * renesas_rsip_rproc_is_running() - Is the remote processor running\n+ * @dev:\tcorresponding remote processor device\n+ *\n+ * Return: 0 if the remote processor is running, 1 otherwise\n+ */\n+static int renesas_rsip_rproc_is_running(struct udevice *dev)\n+{\n+\t/* We assume the core is stopped. */\n+\treturn 1;\n+}\n+\n+/**\n+ * renesas_rsip_rproc_init() - Initialize the remote processor\n+ * @dev:\tcorresponding remote processor device\n+ *\n+ * Return: 0 if all went ok, else corresponding -ve error\n+ */\n+static int renesas_rsip_rproc_init(struct udevice *dev)\n+{\n+\treturn 0;\n+}\n+\n+/**\n+ * renesas_rsip_rproc_device_to_virt() - Convert device address to virtual address\n+ * @dev:\tcorresponding remote processor device\n+ * @da:\t\tdevice address\n+ * @size:\tSize of the memory region @da is pointing to\n+ * @is_iomem:\toptional pointer filled in to indicate if @da is iomapped memory\n+ *\n+ * Return: converted virtual address\n+ */\n+static void *renesas_rsip_rproc_device_to_virt(struct udevice *dev, ulong da,\n+\t\t\t\t\t ulong size, bool *is_iomem)\n+{\n+\treturn (void *)da;\n+}\n+\n+static const struct dm_rproc_ops renesas_rsip_rproc_ops = {\n+\t.init\t\t= renesas_rsip_rproc_init,\n+\t.load\t\t= renesas_rsip_rproc_load,\n+\t.start\t\t= renesas_rsip_rproc_start,\n+\t.stop\t\t= renesas_rsip_rproc_stop,\n+\t.reset\t\t= renesas_rsip_rproc_reset,\n+\t.is_running\t= renesas_rsip_rproc_is_running,\n+\t.device_to_virt\t= renesas_rsip_rproc_device_to_virt,\n+};\n+\n+/**\n+ * renesas_rsip_rproc_of_to_plat() - Convert OF data to platform data\n+ * @dev:\tcorresponding remote processor device\n+ *\n+ * Return: 0 if all went ok, else corresponding -ve error\n+ */\n+static int renesas_rsip_rproc_of_to_plat(struct udevice *dev)\n+{\n+\tstruct renesas_rsip_rproc_privdata *priv = dev_get_priv(dev);\n+\n+\tpriv->core_id = dev_get_driver_data(dev);\n+\n+\treturn 0;\n+}\n+\n+U_BOOT_DRIVER(renesas_rsip_core) = {\n+\t.name\t\t= \"rcar-rsip-core\",\n+\t.id\t\t= UCLASS_REMOTEPROC,\n+\t.ops\t\t= &renesas_rsip_rproc_ops,\n+\t.of_to_plat\t= renesas_rsip_rproc_of_to_plat,\n+\t.priv_auto\t= sizeof(struct renesas_rsip_rproc_privdata),\n+};\n+\n+/**\n+ * renesas_rsip_rproc_bind() - Bind rproc driver to each core control\n+ * @dev:\tcorresponding remote processor parent device\n+ *\n+ * Return: 0 if all went ok, else corresponding -ve error\n+ */\n+static int renesas_rsip_rproc_bind(struct udevice *parent)\n+{\n+\tofnode pnode = dev_ofnode(parent);\n+\tstruct udevice *cdev;\n+\tstruct driver *cdrv;\n+\tchar name[32];\n+\tulong i;\n+\tint ret;\n+\n+\tcdrv = lists_driver_lookup_name(\"rcar-rsip-core\");\n+\tif (!cdrv)\n+\t\treturn -ENOENT;\n+\n+\t/* Singleton SCP core is core 0 */\n+\tret = device_bind_with_driver_data(parent, cdrv,\n+\t\t\t\t\t strdup(\"rcar-rsip-scp\"),\n+\t\t\t\t\t 0, pnode, &cdev);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\t/* Cores 1..13 are Cortex-R52 */\n+\tfor (i = 0; i < RCAR5_CR52_CORES; i++) {\n+\t\tsnprintf(name, sizeof(name), \"rcar-rsip-cr.%ld\", i);\n+\t\tret = device_bind_with_driver_data(parent, cdrv, strdup(name),\n+\t\t\t\t\t\t i + RCAR5_SCP_CORES, pnode,\n+\t\t\t\t\t\t &cdev);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\t/* Cores 14..46 are Cortex-A720 */\n+\tfor (i = 0; i < RCAR5_CA720_CORES; i++) {\n+\t\tsnprintf(name, sizeof(name), \"rcar-rsip-ca.%ld\", i);\n+\t\tret = device_bind_with_driver_data(parent, cdrv, strdup(name),\n+\t\t\t\t\t\t i + RCAR5_SCP_CORES + RCAR5_CR52_CORES,\n+\t\t\t\t\t\t pnode, &cdev);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static const struct udevice_id renesas_rsip_rproc_ids[] = {\n+\t{ .compatible = \"renesas,r8a78000-rproc\" },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(renesas_rsip_rproc) = {\n+\t.name\t\t= \"rcar-rsip-rproc\",\n+\t.of_match\t= renesas_rsip_rproc_ids,\n+\t.id\t\t= UCLASS_NOP,\n+\t.bind\t\t= renesas_rsip_rproc_bind,\n+};\n", "prefixes": [] }