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GET /api/1.1/patches/2223642/?format=api
{ "id": 2223642, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223642/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260415212935.GA90297@bhelgaas/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260415212935.GA90297@bhelgaas>", "date": "2026-04-15T21:29:35", "name": "[GIT,PULL] PCI changes for v7.1", "commit_ref": null, "pull_url": "git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git tags/pci-v7.1-changes", "state": "new", "archived": false, "hash": null, "submitter": { "id": 67298, "url": "http://patchwork.ozlabs.org/api/1.1/people/67298/?format=api", "name": "Bjorn Helgaas", "email": "helgaas@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260415212935.GA90297@bhelgaas/mbox/", "series": [ { "id": 500041, "url": "http://patchwork.ozlabs.org/api/1.1/series/500041/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=500041", "date": "2026-04-15T21:29:35", "name": "[GIT,PULL] PCI changes for v7.1", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500041/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223642/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223642/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-52564-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=qI62AAq6;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776288576; cv=none;\n b=JeWPKA/LgkMhjrAjk/CjKTBT1J8Rpycbn/JkLsOLpTcnRM/deaNet59sYcKylq8dTu6kTGtcGrAO3alMIi6vd1Dm3ovTyU8vPev1KWBmJoUnIMDBi97E9uZPm1Pxh3QqWkmrHCe4Tsrh5K8tt5qvmSSB2A2Q1P7KRJXaZorVJBQ=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776288576; c=relaxed/simple;\n\tbh=mXc5oanhjLDuYGwQXp3NMLfTvx8Tgq1BtoCzFAwkZa4=;\n\th=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type:\n\t Content-Disposition;\n b=mHuhj+K6npy9suKmj0GElU2aW94a0vFKwEbw3noyJm165300X/9VlIFKNDIqlk5Kx95ao+HNHqwgOYCe1U60397pAHVkmeUTdNN05hHKDj/BKx+oWm1cBDo1s2PBPwhfypzOVqVP8n1ffb3Zplfd9mLZcQGlOpAGNhVDbiPLtxQ=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=qI62AAq6; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1776288576;\n\tbh=mXc5oanhjLDuYGwQXp3NMLfTvx8Tgq1BtoCzFAwkZa4=;\n\th=Date:From:To:Cc:Subject:From;\n\tb=qI62AAq6HvsVAnA7mHYYYmr+Voc+z/2Y3R8cblGqGQzMQG8rggnLr+gnFI6OhTGeA\n\t owYb7MGe6KmFrePv4ZnctWDudCLyiUr1+m1FVtgzQxGlrNucsxceS81IrfNSouw8i/\n\t 2rDNmlkT8SbU7g4SCApbH7MDyK82fRl+fTZH0/9lHuRgQggg9ANheXwIc2S48A6iZk\n\t rXAVqyLnM/4U6OFsB4BnaSCwQpLVOOIM1DPeDrkRGnC/2lspHo6Ad9JBScy0W5o+mX\n\t v2Tk3CzmQx6zpBQ71aWQE8c06f9KOMixTRUiDRkxEs2Ju+LBGn0UTyuYhT9r5O6Bh3\n\t LvEoXWWdlQXzw==", "Date": "Wed, 15 Apr 2026 16:29:35 -0500", "From": "Bjorn Helgaas <helgaas@kernel.org>", "To": "Linus Torvalds <torvalds@linux-foundation.org>", "Cc": "linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,\n Rob Herring <robh@kernel.org>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,\n Manivannan Sadhasivam <mani@kernel.org>, Krzysztof =?utf-8?q?Wilczy=C5=84sk?=\n\t=?utf-8?q?i?= <kwilczynski@kernel.org>", "Subject": "[GIT PULL] PCI changes for v7.1", "Message-ID": "<20260415212935.GA90297@bhelgaas>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=utf-8", "Content-Disposition": "inline", "Content-Transfer-Encoding": "8bit" }, "content": "The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:\n\n Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)\n\nare available in the Git repository at:\n\n git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git tags/pci-v7.1-changes\n\nfor you to fetch changes up to 4224e91fea5695a89843b4c38283016616946307:\n\n Merge branch 'pci/misc' (2026-04-13 12:50:54 -0500)\n\n----------------------------------------------------------------\n\nEnumeration:\n\n - Allow TLP Processing Hints to be enabled for RCiEPs (George Abraham P)\n\n - Enable AtomicOps only if we know the Root Port supports them (Gerd\n Bayer)\n\n - Don't enable AtomicOps for RCiEPs since none of them need Atomic Ops\n and we can't tell whether the Root Complex would support them (Gerd\n Bayer)\n\n - Leave Precision Time Measurement disabled until a driver enables it to\n avoid PCIe errors (Mika Westerberg)\n\n - Make pci_set_vga_state() fail if bridge doesn't support VGA routing,\n i.e., PCI_BRIDGE_CTL_VGA is not writable, and return errors to\n vga_get() callers including userspace via /dev/vga_arbiter (Simon\n Richter)\n\n - Validate max-link-speed from DT in j721e, brcmstb, mediatek-gen3, rzg3s\n drivers (where the actual controller constraints are known), and remove\n validation from the generic OF DT accessor (Hans Zhang)\n\n - Remove pc110pad driver (no longer useful after 486 CPU support removed)\n and no_pci_devices() (pc110pad was the last user) (Dmitry\n Torokhov, Heiner Kallweit)\n\nResource management:\n\n - Prevent assigning space to unimplemented bridge windows; previously we\n mistakenly assumed prefetchable window existed and assigned space and\n put a BAR there (Ahmed Naseef)\n\n - Avoid shrinking bridge windows to fit in the initial Root Port window;\n fixes one problem with devices with large BARs connected via switches,\n e.g., Thunderbolt (Ilpo Järvinen)\n\n - Pass full extent of empty space, not just the aligned space, to\n resource_alignf callback so free space before the requested alignment\n can be used (Ilpo Järvinen)\n\n - Place small resources before larger ones for better utilization of\n address space (Ilpo Järvinen)\n\n - Fix alignment calculation for resource size larger than align, e.g.,\n bridge windows larger than the 1MB required alignment (Ilpo Järvinen)\n\nReset:\n\n - Update slot handling so all ARI functions are treated as being in the\n same slot. They're all reset by Secondary Bus Reset, but previously\n drivers of ARI functions that appeared to be on a non-zero device\n weren't notified and fatal hardware errors could result (Keith Busch)\n\n - Make sysfs reset_subordinate hotplug safe to avoid spurious hotplug\n events (Keith Busch)\n\n - Hide Secondary Bus Reset ('bus') from sysfs reset_methods if masked by\n CXL because it has no effect (Vidya Sagar)\n\n - Avoid FLR for AMD NPU device, where it causes the device to hang (Lizhi\n Hou)\n\nError handling:\n\n - Clear only error bits in PCIe Device Status to avoid accidentally\n clearing Emergency Power Reduction Detected (Shuai Xue)\n\n - Check for AER errors even in devices without drivers (Lukas Wunner)\n\n - Initialize ratelimit info so DPC and EDR paths log AER error\n information (Kuppuswamy Sathyanarayanan)\n\nPower control:\n\n - Add UPD720201/UPD720202 USB 3.0 xHCI Host Controller .compatible so\n generic pwrctrl driver can control it (Neil Armstrong)\n\nHotplug:\n\n - Set LED_HW_PLUGGABLE for NPEM hotplug-capable ports so LED core doesn't\n complain when setting brightness fails because the endpoint is gone\n (Richard Cheng)\n\nPeer-to-peer DMA:\n\n - Allow wildcards in list of host bridges that support peer-to-peer DMA\n between hierarchy domains and add all Google SoCs (Jacob Moroni)\n\nEndpoint framework:\n\n - Advertise dynamic inbound mapping support in pci-epf-test and update\n host pci_endpoint_test to skip doorbell testing if not advertised by\n endpoint (Koichiro Den)\n\n - Return 0, not remaining timeout, when MHI eDMA ops complete so\n mhi_ep_ring_add_element() doesn't interpret non-zero as failure (Daniel\n Hodges)\n\n - Remove vntb and ntb duplicate resource teardown that leads to oops when\n .allow_link() fails or .drop_link() is called (Koichiro Den)\n\n - Disable vntb delayed work before clearing BAR mappings and doorbells to\n avoid oops caused by doing the work after resources have been torn down\n (Koichiro Den)\n\n - Add a way to describe reserved subregions within BARs, e.g.,\n platform-owned fixed register windows, and use it for the RK3588 BAR4\n DMA ctrl window (Koichiro Den)\n\n - Add BAR_DISABLED for BARs that will never be available to an EPF\n driver, and change some BAR_RESERVED annotations to BAR_DISABLED\n (Niklas Cassel)\n\n - Add NTB .get_dma_dev() callback for cases where DMA API requires a\n different device, e.g., vNTB devices (Koichiro Den)\n\n - Add reserved region types for MSI-X Table and PBA so Endpoint\n controllers can them as describe hardware-owned regions in a\n BAR_RESERVED BAR (Manikanta Maddireddy)\n\n - Make Tegra194/234 BAR0 programmable and remove 1MB size limit\n (Manikanta Maddireddy)\n\n - Expose Tegra BAR2 (MSI-X) and BAR4 (DMA) as 64-bit BAR_RESERVED\n (Manikanta Maddireddy)\n\n - Add Tegra194 and Tegra234 device table entries to pci_endpoint_test\n (Manikanta Maddireddy)\n\n - Skip the BAR subrange selftest if there are not enough inbound window\n resources to run the test (Christian Bruel)\n\nNew native PCIe controller drivers:\n\n - Add DT binding and driver for Andes QiLai SoC PCIe host controller\n (Randolph Lin)\n\n - Add DT binding and driver for ESWIN PCIe Root Complex (Senchuan Zhang)\n\nBaikal T-1 PCIe controller driver:\n\n - Remove driver since it never quite became usable (Andy Shevchenko)\n\nCadence PCIe controller driver:\n\n - Implement byte/word config reads with dword (32-bit) reads because some\n Cadence controllers don't support sub-dword accesses (Aksh Garg)\n\nCIX Sky1 PCIe controller driver:\n\n - Add 'power-domains' to DT binding for SCMI power domain (Gary Yang)\n\nFreescale i.MX6 PCIe controller driver:\n\n - Add i.MX94 and i.MX943 to fsl,imx6q-pcie-ep DT binding (Richard Zhu)\n\n - Delay instead of polling for L2/L3 Ready after PME_Turn_off when\n suspending i.MX6SX because LTSSM registers are inaccessible (Richard\n Zhu)\n\n - Separate PERST# assertion (for resetting endpoints) from core reset\n (for resetting the RC itself) to prepare for new DTs with PERST# GPIO\n in per-Root Port nodes (Sherry Sun)\n\n - Retain Root Port MSI capability on i.MX7D, i.MX8MM, and i.MX8MQ so MSI\n from downstream devices will work (Richard Zhu)\n\n - Fix i.MX95 reference clock source selection when internal refclk is\n used (Franz Schnyder)\n\nFreescale Layerscape PCIe controller driver:\n\n - Allow building as a removable module (Sascha Hauer)\n\nMediaTek PCIe Gen3 controller driver:\n\n - Use dev_err_probe() to simplify error paths and make deferred probe\n messages visible in /sys/kernel/debug/devices_deferred (Chen-Yu Tsai)\n\n - Power off device if setup fails (Chen-Yu Tsai)\n\n - Integrate new pwrctrl API to enable power control for WiFi/BT adapters\n on mainboard or in PCIe or M.2 slots (Chen-Yu Tsai)\n\nNVIDIA Tegra194 PCIe controller driver:\n\n - Poll less aggressively and non-atomically for PME_TO_Ack during\n transition to L2 (Vidya Sagar)\n\n - Disable LTSSM after transition to Detect on surprise link down to stop\n toggling between Polling and Detect (Manikanta Maddireddy)\n\n - Don't force the device into the D0 state before L2 when suspending or\n shutting down the controller (Vidya Sagar)\n\n - Disable PERST# IRQ only in Endpoint mode because it's not registered in\n Root Port mode (Manikanta Maddireddy)\n\n - Handle 'nvidia,refclk-select' as optional (Vidya Sagar)\n\n - Disable direct speed change in Endpoint mode so link speed change is\n controlled by the host (Vidya Sagar)\n\n - Set LTR values before link up to avoid bogus LTR messages with 0\n latency (Vidya Sagar)\n\n - Allow system suspend when the Endpoint link is down (Vidya Sagar)\n\n - Use DWC IP core version, not Tegra custom values, to avoid DWC core\n version check warnings (Manikanta Maddireddy)\n\n - Apply ECRC workaround to devices based on DesignWare 5.00a as well as\n 4.90a (Manikanta Maddireddy)\n\n - Disable PM Substate L1.2 in Endpoint mode to work around Tegra234\n erratum (Vidya Sagar)\n\n - Delay post-PERST# cleanup until core is powered on to avoid CBB timeout\n (Manikanta Maddireddy)\n\n - Assert CLKREQ# so switches that forward it to their downstream side can\n bring up those links successfully (Vidya Sagar)\n\n - Calibrate pipe to UPHY for Endpoint mode to reset stale PLL state from\n any previous bad link state (Vidya Sagar)\n\n - Remove IRQF_ONESHOT flag from Endpoint interrupt registration so DMA\n driver and Endpoint controller driver can share the interrupt line\n (Vidya Sagar)\n\n - Enable DMA interrupt to support DMA in both Root Port and Endpoint\n modes (Vidya Sagar)\n\n - Enable hardware link retraining after link goes down in Endpoint mode\n (Vidya Sagar)\n\n - Add DT binding and driver support for core clock monitoring (Vidya\n Sagar)\n\nQualcomm PCIe controller driver:\n\n - Advertise 'Hot-Plug Capable' and set 'No Command Completed Support'\n since Qcom Root Ports support hotplug events like DL_Up/Down and can\n accept writes to Slot Control without delays between writes (Krishna\n Chaitanya Chundru)\n\nRenesas R-Car PCIe controller driver:\n\n - Mark Endpoint BAR0 and BAR2 as Resizable (Koichiro Den)\n\n - Reduce EPC BAR alignment requirement to 4K (Koichiro Den)\n\nRenesas RZ/G3S PCIe controller driver:\n\n - Add RZ/G3E to DT binding and to driver (John Madieu)\n\n - Assert (not deassert) resets in probe error path (John Madieu)\n\n - Assert resets in suspend path in reverse order they were deasserted\n during probe (John Madieu)\n\n - Rework inbound window algorithm to prevent mapping more than intended\n region and enforce alignment on size, to prepare for RZ/G3E support\n (John Madieu)\n\nRockchip DesignWare PCIe controller driver:\n\n - Add tracepoints for PCIe controller LTSSM transitions and link rate\n changes (Shawn Lin)\n\n - Trace LTSSM events collected by the dw-rockchip debug FIFO (Shawn Lin)\n\nSOPHGO PCIe controller driver:\n\n - Disable ASPM L0s and L1 on Sophgo 2042 PCIe Root Ports that advertise\n support for them (Yao Zi)\n\nSynopsys DesignWare PCIe controller driver:\n\n - Continue with system suspend even if an Endpoint doesn't respond with\n PME_TO_Ack message (Manivannan Sadhasivam)\n\n - Set Endpoint MSI-X Table Size in the correct function of a\n multi-function device when configuring MSI-X, not in Function 0 (Aksh\n Garg)\n\n - Set Max Link Width and Max Link Speed for all functions of a\n multi-function device, not just Function 0 (Aksh Garg)\n\n - Expose PCIe event counters in groups 5-7 in debugfs (Hans Zhang)\n\nMiscellaneous:\n\n - Warn only once about invalid ACS kernel parameter format (Richard\n Cheng)\n\n - Suppress FW_BUG warning when writing sysfs 'numa_node' with the current\n value (Li RongQing)\n\n - Drop redundant 'depends on PCI' from Kconfig (Julian Braha)\n\n----------------------------------------------------------------\nAhmed Naseef (1):\n PCI: Prevent assignment to unsupported bridge windows\n\nAksh Garg (3):\n PCI: dwc: ep: Fix MSI-X Table Size configuration in dw_pcie_ep_set_msix()\n PCI: dwc: ep: Mirror the max link width and speed fields to all functions\n PCI: cadence: Use cdns_pcie_read_sz() for byte or word read access\n\nAlok Tiwari (2):\n PCI: endpoint: Fix typo in pci_epf_add_vepf() kernel-doc\n PCI: endpoint: Propagate error from pci_epf_create()\n\nAndy Shevchenko (1):\n PCI: dwc: Remove not-going-to-be-supported code for Baikal SoC\n\nBjorn Helgaas (35):\n Merge branch 'pci/aer'\n Merge branch 'pci/aspm'\n Merge branch 'pci/atomics'\n Merge branch 'pci/dpc'\n Merge branch 'pci/enumeration'\n Merge branch 'pci/hotplug'\n Merge branch 'pci/msi'\n Merge branch 'pci/p2pdma'\n Merge branch 'pci/ptm'\n Merge branch 'pci/pwrctrl'\n Merge branch 'pci/reset'\n Merge branch 'pci/resource'\n Merge branch 'pci/vga'\n Merge branch 'pci/virtualization'\n Merge branch 'pci/dt-binding'\n Merge branch 'pci/endpoint'\n Merge branch 'pci/controller/max-link-speed'\n Merge branch 'pci/controller/aspeed'\n Merge branch 'pci/controller/cadence'\n Merge branch 'pci/controller/cadence-sg2042'\n Merge branch 'pci/controller/cadence-sky1'\n Merge branch 'pci/controller/dwc'\n Merge branch 'pci/controller/dwc-amd-mdb'\n Merge branch 'pci/controller/dwc-andes-qilai'\n Merge branch 'pci/controller/dwc-eswin'\n Merge branch 'pci/controller/dwc-imx6'\n Merge branch 'pci/controller/dwc-layerscape'\n Merge branch 'pci/controller/dwc-qcom'\n Merge branch 'pci/controller/dwc-rcar-gen4-ep'\n Merge branch 'pci/controller/dwc-rockchip'\n Merge branch 'pci/controller/dwc-tegra194'\n Merge branch 'pci/controller/mediatek'\n Merge branch 'pci/controller/mediatek-gen3'\n Merge branch 'pci/controller/rzg3s-host'\n Merge branch 'pci/misc'\n\nChen-Yu Tsai (8):\n PCI: mediatek-gen3: Clean up mtk_pcie_parse_port() with dev_err_probe()\n PCI: mediatek-gen3: Move mtk_pcie_setup_irq() out of mtk_pcie_setup()\n PCI: mediatek-gen3: Move controller setup steps before PERST# control\n PCI: mediatek-gen3: Add error path for resume driver callbacks\n PCI: mediatek-gen3: Split out device power helpers\n PCI: mediatek-gen3: Disable device if further setup fails\n PCI: mediatek-gen3: Integrate new pwrctrl API\n PCI: mediatek-gen3: Prevent leaking IRQ domains when IRQ not found\n\nChristian Bruel (1):\n selftests: pci_endpoint: Skip BAR subrange test on -ENOSPC\n\nChristophe JAILLET (1):\n PCI: endpoint: Constify struct configfs_item_operations and configfs_group_operations\n\nDaniel Hodges (1):\n PCI: epf-mhi: Return 0, not remaining timeout, when eDMA ops complete\n\nDmitry Torokhov (1):\n Input: pc110pad - remove driver\n\nFelix Gu (3):\n PCI: imx6: Fix device node reference leak in imx_pcie_probe()\n PCI: sky1: Fix missing cleanup of ECAM config on probe failure\n PCI: aspeed: Fix IRQ domain leak on platform_get_irq() failure\n\nFranz Schnyder (1):\n PCI: imx6: Fix reference clock source selection for i.MX95\n\nGary Yang (1):\n dt-bindings: PCI: cix,sky1-pcie-host: Add power-domains\n\nGeorge Abraham P (1):\n PCI/TPH: Allow TPH enable for RCiEPs\n\nGerd Bayer (3):\n PCI: Do not enable AtomicOps by RCiEPs\n PCI: Enable AtomicOps only if Root Port supports them\n PCI: Update PCIe spec references for AtomicOps\n\nHans Zhang (8):\n PCI: dwc: Expose PCIe event counters for groups 5 to 7 over debugfs\n PCI: sky1: Use boolean true for is_rc field\n PCI: Add pcie_get_link_speed() helper for safe array access\n PCI: dwc: Use pcie_get_link_speed() helper for safe array access\n PCI: j721e: Validate max-link-speed from DT\n PCI: controller: Validate max-link-speed\n PCI: of: Remove max-link-speed generation validation\n PCI: dwc: Fix type mismatch for kstrtou32_from_user() return value\n\nHeiner Kallweit (1):\n PCI: Remove no_pci_devices()\n\nIlpo Järvinen (13):\n PCI: Consolidate pci_bus/slot_lock/unlock/trylock()\n PCI: Prevent shrinking bridge window from its required size\n PCI: Fix premature removal from realloc_head list during resource assignment\n resource: Add __resource_contains_unbound() for internal contains checks\n resource: Pass full extent of empty space to resource_alignf callback\n resource: Rename 'tmp' variable to 'full_avail'\n ARM/PCI: Remove unnecessary second application of align\n m68k/PCI: Remove unnecessary second application of align\n MIPS: PCI: Remove unnecessary second application of align\n parisc/PCI: Clean up align handling\n PCI: Rename window_alignment() to pci_min_window_alignment()\n PCI: Align head space better\n PCI: Fix alignment calculation for resource size larger than align\n\nJacob Moroni (2):\n PCI/P2PDMA: Allow wildcard Device IDs in host bridge list\n PCI/P2PDMA: Add Google SoCs to the P2P DMA host bridge list\n\nJeremy Linton (1):\n PCI: of: Reduce severity of missing of_root error message\n\nJohn Madieu (11):\n PCI: rzg3s-host: Fix reset handling in probe error path\n PCI: rzg3s-host: Reorder reset assertion during suspend\n PCI: rzg3s-host: Rework inbound window algorithm for supporting RZ/G3E SoC\n dt-bindings: PCI: renesas,r9a08g045s33-pcie: Fix naming properties\n dt-bindings: PCI: renesas,r9a08g045s33-pcie: Document RZ/G3E SoC\n PCI: rzg3s-host: Make SYSC register offsets SoC-specific\n PCI: rzg3s-host: Make configuration reset lines optional\n PCI: rzg3s-host: Add SoC-specific configuration and initialization callbacks\n PCI: rzg3s-host: Explicitly set class code for RZ/G3E compatibility\n PCI: rzg3s-host: Add PCIe Gen3 (8.0 GT/s) link speed support\n PCI: rzg3s-host: Add support for RZ/G3E PCIe controller\n\nJulian Braha (1):\n PCI: Clean up dead code in Kconfig\n\nKeith Busch (3):\n PCI: Rename __pci_bus_reset() and __pci_slot_reset()\n PCI: Allow all bus devices to use the same slot\n PCI: Make reset_subordinate hotplug safe\n\nKoichiro Den (19):\n PCI: endpoint: pci-epf-vntb: Fix MSI doorbell IRQ unwind\n PCI: endpoint: pci-epf-test: Don't free doorbell IRQ unless requested\n PCI: endpoint: pci-ep-msi: Fix error unwind and prevent double alloc\n PCI: endpoint: pci-epf-test: Advertise dynamic inbound mapping support\n misc: pci_endpoint_test: Gate doorbell test on dynamic inbound mapping\n selftests: pci_endpoint: Skip doorbell test when unsupported\n PCI: endpoint: pci-epf-vntb: Use array_index_nospec() on mws_size[] access\n PCI: endpoint: pci-epf-vntb: Return -ERANGE for out-of-range MW index\n PCI: endpoint: pci-epf-vntb: Remove duplicate resource teardown\n PCI: endpoint: pci-epf-ntb: Remove duplicate resource teardown\n PCI: endpoint: pci-epf-vntb: Stop cmd_handler work in epf_ntb_epc_cleanup\n PCI: endpoint: Describe reserved subregions within BARs\n PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window\n PCI: dwc: rcar-gen4: Mark BAR0 and BAR2 as Resizable BARs in endpoint mode\n PCI: dwc: rcar-gen4: Change EPC BAR alignment to 4K as per the documentation\n NTB: core: Add .get_dma_dev() callback to ntb_dev_ops\n NTB: ntb_transport: Use ntb_get_dma_dev() for DMA buffers\n PCI: endpoint: pci-epf-vntb: Implement .get_dma_dev()\n misc: pci_endpoint_test: Use -EINVAL for small subrange size\n\nKrishna Chaitanya Chundru (1):\n PCI: qcom: Advertise Hotplug Slot Capability with no Command Completion support\n\nKrzysztof Kozlowski (2):\n PCI: pnv_php: Simplify with scoped for each OF child loop\n PCI: rpaphp: Simplify with scoped for each OF child loop\n\nKuppuswamy Sathyanarayanan (1):\n PCI/DPC: Log AER error info for DPC/EDR uncorrectable errors\n\nLi RongQing (1):\n PCI/sysfs: Suppress FW_BUG warning when NUMA node already matches\n\nLizhi Hou (1):\n PCI: Avoid FLR for AMD NPU device\n\nLukas Wunner (2):\n PCI/ASPM: Fix pci_clear_and_set_config_dword() usage\n PCI/AER: Stop ruling out unbound devices as error source\n\nManikanta Maddireddy (11):\n PCI: endpoint: Allow only_64bit on BAR_RESERVED\n PCI: endpoint: Add reserved region type for MSI-X Table and PBA\n PCI: tegra194: Make BAR0 programmable and remove 1MB size limit\n PCI: tegra194: Expose BAR2 (MSI-X) and BAR4 (DMA) as 64-bit BAR_RESERVED\n misc: pci_endpoint_test: Add Tegra194 and Tegra234 device table entries\n PCI: tegra194: Increase LTSSM poll time on surprise link down\n PCI: tegra194: Disable LTSSM after transition to Detect on surprise link down\n PCI: tegra194: Disable PERST# IRQ only in Endpoint mode\n PCI: tegra194: Use DWC IP core version\n PCI: dwc: Apply ECRC workaround to DesignWare 5.00a as well\n PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on\n\nManivannan Sadhasivam (4):\n PCI: dwc: Proceed with system suspend even if the endpoint doesn't respond with PME_TO_Ack message\n PCI: dwc: Perform cleanup in the error path of dw_pcie_resume_noirq()\n PCI: endpoint: Print the EPF name in the error log of pci_epf_make()\n PCI: endpoint: Improve error messages\n\nMika Westerberg (2):\n PCI/PTM: Drop pci_enable_ptm() granularity parameter\n PCI/PTM: Do not enable PTM automatically for Root and Switch Upstream Ports\n\nNeil Armstrong (3):\n PCI/pwrctrl: generic: Rename pci-pwrctrl-slot as generic\n PCI/pwrctrl: generic: Simplify dev_err_probe() usage\n PCI/pwrctrl: generic: Add UPD720201/UPD720202 USB 3.0 xHCI Host Controller support\n\nNiklas Cassel (7):\n PCI: endpoint: Do not mark the BAR succeeding a 64-bit BAR as BAR_RESERVED\n PCI: endpoint: Introduce pci_epc_bar_type BAR_DISABLED\n PCI: dwc: Replace certain BAR_RESERVED with BAR_DISABLED in glue drivers\n PCI: dwc: Disable BARs in common code instead of in each glue driver\n PCI: endpoint: pci-epf-test: Advertise reserved BARs\n misc: pci_endpoint_test: Give reserved BARs a distinct error code\n selftests: pci_endpoint: Skip reserved BARs\n\nRakuram Eswaran (1):\n PCI: amd-mdb: Correct IRQ number in INTx error message\n\nRandolph Lin (2):\n dt-bindings: PCI: Add Andes QiLai PCIe support\n PCI: qilai: Add Andes QiLai SoC PCIe host driver support\n\nRichard Cheng (2):\n PCI: Use pr_warn_once() for ACS parameter parse failure\n PCI/NPEM: Set LED_HW_PLUGGABLE for hotplug-capable ports\n\nRichard Zhu (4):\n PCI: imx6: Skip waiting for L2/L3 Ready on i.MX6SX\n PCI: imx6: Keep Root Port MSI capability with iMSI-RX to work around hardware bug\n dt-bindings: PCI: imx6q-pcie: Fix maxItems of clocks and clock-names\n dt-bindings: PCI: imx6q-pcie: Add i.MX94 and i.MX943 SoCs\n\nRyder Lee (1):\n PCI: mediatek: Fix possible truncation in mtk_pcie_parse_port()\n\nSascha Hauer (1):\n PCI: layerscape: Allow to compile as module\n\nSenchuan Zhang (2):\n dt-bindings: PCI: eswin: Add ESWIN PCIe Root Complex\n PCI: eswin: Add ESWIN PCIe Root Complex driver\n\nShawn Lin (5):\n PCI/MSI: Clarify pci_free_irq_vectors() usage for managed devices\n PCI/MSI: Add TODO comment about legacy pcim_enable_device() side-effect\n PCI: trace: Add PCI controller tracepoint feature\n Documentation: tracing: Add PCI controller event documentation\n PCI: dw-rockchip: Add pcie_ltssm_state_transition tracepoint support\n\nSherry Sun (2):\n PCI: imx6: Change imx_pcie_deassert_core_reset() return type to void\n PCI: imx6: Separate PERST# assertion from core reset functions\n\nShuai Xue (1):\n PCI/AER: Clear only error bits in PCIe Device Status\n\nSimon Richter (3):\n PCI/VGA: Pass vga_get_uninterruptible() errors to userspace\n PCI/VGA: Pass errors from pci_set_vga_state() up\n PCI/VGA: Fail pci_set_vga_state() if VGA decoding not supported\n\nSizhe Liu (1):\n PCI/DPC: Hold pci_dev reference during error recovery\n\nVidya Sagar (16):\n PCI/CXL: Hide SBR from reset_methods if masked by CXL\n PCI: tegra194: Fix polling delay for L2 state\n PCI: tegra194: Don't force the device into the D0 state before L2\n PCI: tegra194: Use devm_gpiod_get_optional() to parse \"nvidia,refclk-select\"\n PCI: tegra194: Disable direct speed change for Endpoint mode\n PCI: tegra194: Set LTR message request before PCIe link up in Endpoint mode\n PCI: tegra194: Allow system suspend when the Endpoint link is not up\n PCI: tegra194: Free up Endpoint resources during remove()\n PCI: tegra194: Disable L1.2 capability of Tegra234 EP\n PCI: tegra194: Assert CLKREQ# explicitly by default\n PCI: tegra194: Calibrate pipe to UPHY for Endpoint mode\n PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration\n PCI: tegra194: Enable DMA interrupt\n PCI: tegra194: Enable hardware hot reset mode in Endpoint mode\n dt-bindings: PCI: tegra194: Add monitor clock support\n PCI: tegra194: Add core monitor clock support\n\nYao Zi (2):\n PCI: cadence: Add flags for disabling ASPM capability for broken Root Ports\n PCI: sg2042: Avoid L0s and L1 on Sophgo 2042 PCIe Root Ports\n\n Documentation/PCI/msi-howto.rst | 7 +-\n .../bindings/pci/andestech,qilai-pcie.yaml | 89 +++\n .../devicetree/bindings/pci/baikal,bt1-pcie.yaml | 168 ------\n .../bindings/pci/cix,sky1-pcie-host.yaml | 3 +\n .../devicetree/bindings/pci/eswin,pcie.yaml | 166 ++++++\n .../bindings/pci/fsl,imx6q-pcie-common.yaml | 4 +-\n .../devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 18 +-\n .../devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 29 +-\n .../bindings/pci/nvidia,tegra194-pcie-ep.yaml | 6 +-\n .../bindings/pci/nvidia,tegra194-pcie.yaml | 6 +-\n .../bindings/pci/renesas,r9a08g045-pcie.yaml | 121 +++-\n Documentation/trace/events-pci-controller.rst | 42 ++\n Documentation/trace/index.rst | 1 +\n MAINTAINERS | 16 +\n arch/alpha/kernel/pci.c | 1 +\n arch/arm/kernel/bios32.c | 9 +-\n arch/m68k/kernel/pcibios.c | 8 +-\n arch/mips/pci/pci-generic.c | 8 +-\n arch/mips/pci/pci-legacy.c | 3 +\n arch/parisc/kernel/pci.c | 17 +-\n arch/powerpc/kernel/pci-common.c | 6 +-\n arch/s390/pci/pci.c | 1 +\n arch/sh/drivers/pci/pci.c | 6 +-\n arch/x86/pci/i386.c | 5 +-\n arch/xtensa/kernel/pci.c | 3 +\n drivers/input/mouse/Kconfig | 10 -\n drivers/input/mouse/Makefile | 1 -\n drivers/input/mouse/pc110pad.c | 160 -----\n drivers/misc/pci_endpoint_test.c | 34 +-\n drivers/net/ethernet/intel/ice/ice_main.c | 2 +-\n drivers/net/ethernet/intel/idpf/idpf_main.c | 2 +-\n drivers/net/ethernet/intel/igc/igc_main.c | 2 +-\n drivers/net/ethernet/mellanox/mlx5/core/main.c | 2 +-\n drivers/ntb/ntb_transport.c | 14 +-\n drivers/pci/Kconfig | 12 +-\n drivers/pci/controller/Kconfig | 1 +\n drivers/pci/controller/cadence/pci-j721e.c | 3 +-\n drivers/pci/controller/cadence/pci-sky1.c | 6 +-\n drivers/pci/controller/cadence/pcie-cadence-host.c | 7 +\n drivers/pci/controller/cadence/pcie-cadence.h | 75 ++-\n drivers/pci/controller/cadence/pcie-sg2042.c | 2 +\n drivers/pci/controller/dwc/Kconfig | 28 +-\n drivers/pci/controller/dwc/Makefile | 3 +-\n drivers/pci/controller/dwc/pci-dra7xx.c | 4 -\n drivers/pci/controller/dwc/pci-imx6.c | 81 ++-\n drivers/pci/controller/dwc/pci-keystone.c | 12 +\n drivers/pci/controller/dwc/pci-layerscape-ep.c | 6 -\n drivers/pci/controller/dwc/pci-layerscape.c | 16 +-\n drivers/pci/controller/dwc/pcie-amd-mdb.c | 2 +-\n drivers/pci/controller/dwc/pcie-andes-qilai.c | 197 +++++++\n drivers/pci/controller/dwc/pcie-artpec6.c | 4 -\n drivers/pci/controller/dwc/pcie-bt1.c | 645 ---------------------\n .../pci/controller/dwc/pcie-designware-debugfs.c | 73 ++-\n drivers/pci/controller/dwc/pcie-designware-ep.c | 55 +-\n drivers/pci/controller/dwc/pcie-designware-host.c | 29 +-\n drivers/pci/controller/dwc/pcie-designware-plat.c | 10 -\n drivers/pci/controller/dwc/pcie-designware.c | 18 +-\n drivers/pci/controller/dwc/pcie-designware.h | 3 +\n drivers/pci/controller/dwc/pcie-dw-rockchip.c | 134 ++++-\n drivers/pci/controller/dwc/pcie-eswin.c | 408 +++++++++++++\n drivers/pci/controller/dwc/pcie-keembay.c | 3 -\n drivers/pci/controller/dwc/pcie-qcom-common.c | 2 +-\n drivers/pci/controller/dwc/pcie-qcom-ep.c | 16 +-\n drivers/pci/controller/dwc/pcie-qcom.c | 23 +-\n drivers/pci/controller/dwc/pcie-rcar-gen4.c | 20 +-\n drivers/pci/controller/dwc/pcie-stm32-ep.c | 10 -\n drivers/pci/controller/dwc/pcie-tegra194.c | 300 ++++++----\n drivers/pci/controller/dwc/pcie-uniphier-ep.c | 19 +-\n drivers/pci/controller/pcie-aspeed.c | 8 +-\n drivers/pci/controller/pcie-brcmstb.c | 5 +-\n drivers/pci/controller/pcie-mediatek-gen3.c | 233 ++++----\n drivers/pci/controller/pcie-mediatek.c | 2 +-\n drivers/pci/controller/pcie-rcar-ep.c | 3 -\n drivers/pci/controller/pcie-rzg3s-host.c | 365 +++++++++---\n drivers/pci/endpoint/functions/pci-epf-mhi.c | 4 +\n drivers/pci/endpoint/functions/pci-epf-ntb.c | 56 +-\n drivers/pci/endpoint/functions/pci-epf-test.c | 39 +-\n drivers/pci/endpoint/functions/pci-epf-vntb.c | 69 ++-\n drivers/pci/endpoint/pci-ep-cfs.c | 30 +-\n drivers/pci/endpoint/pci-ep-msi.c | 5 +\n drivers/pci/endpoint/pci-epc-core.c | 5 +-\n drivers/pci/endpoint/pci-epf-core.c | 2 +-\n drivers/pci/hotplug/pciehp_core.c | 3 +-\n drivers/pci/hotplug/pnv_php.c | 19 +-\n drivers/pci/hotplug/rpaphp_slot.c | 4 +-\n drivers/pci/msi/api.c | 5 +\n drivers/pci/msi/msi.c | 10 +\n drivers/pci/npem.c | 2 +-\n drivers/pci/of.c | 21 +-\n drivers/pci/p2pdma.c | 10 +-\n drivers/pci/pci-sysfs.c | 6 +-\n drivers/pci/pci.c | 289 ++++-----\n drivers/pci/pci.h | 7 +-\n drivers/pci/pcie/aer.c | 2 -\n drivers/pci/pcie/aspm.c | 17 +-\n drivers/pci/pcie/dpc.c | 3 +\n drivers/pci/pcie/ptm.c | 77 +--\n drivers/pci/probe.c | 39 +-\n drivers/pci/pwrctrl/Kconfig | 13 +-\n drivers/pci/pwrctrl/Makefile | 4 +-\n drivers/pci/pwrctrl/{slot.c => generic.c} | 13 +-\n drivers/pci/quirks.c | 3 +\n drivers/pci/setup-bus.c | 65 ++-\n drivers/pci/setup-res.c | 40 +-\n drivers/pci/slot.c | 31 +-\n drivers/pci/tph.c | 9 +-\n drivers/pci/trace.c | 1 +\n drivers/pci/vgaarb.c | 20 +-\n drivers/pcmcia/rsrc_nonstatic.c | 3 +-\n include/linux/ioport.h | 22 +-\n include/linux/ntb.h | 24 +\n include/linux/pci-epc.h | 50 +-\n include/linux/pci.h | 31 +-\n include/linux/pci_ids.h | 2 +\n include/trace/events/pci_controller.h | 58 ++\n kernel/resource.c | 33 +-\n .../selftests/pci_endpoint/pci_endpoint_test.c | 8 +\n 117 files changed, 2957 insertions(+), 2010 deletions(-)\n create mode 100644 Documentation/devicetree/bindings/pci/andestech,qilai-pcie.yaml\n delete mode 100644 Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml\n create mode 100644 Documentation/devicetree/bindings/pci/eswin,pcie.yaml\n create mode 100644 Documentation/trace/events-pci-controller.rst\n delete mode 100644 drivers/input/mouse/pc110pad.c\n create mode 100644 drivers/pci/controller/dwc/pcie-andes-qilai.c\n delete mode 100644 drivers/pci/controller/dwc/pcie-bt1.c\n create mode 100644 drivers/pci/controller/dwc/pcie-eswin.c\n rename drivers/pci/pwrctrl/{slot.c => generic.c} (93%)\n create mode 100644 include/trace/events/pci_controller.h", "diff": null, "prefixes": [ "GIT", "PULL" ] }