get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/1.1/patches/2223192/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2223192,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223192/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260414-computebus-v1-2-4d904d40926a@oss.qualcomm.com/",
    "project": {
        "id": 21,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/21/?format=api",
        "name": "Linux Tegra Development",
        "link_name": "linux-tegra",
        "list_id": "linux-tegra.vger.kernel.org",
        "list_email": "linux-tegra@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260414-computebus-v1-2-4d904d40926a@oss.qualcomm.com>",
    "date": "2026-04-14T16:31:16",
    "name": "[2/3] gpu: host1x: Migrate to generic context device bus",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "ec8458abd36c4a798570085ee0cdfa0a20aff43c",
    "submitter": {
        "id": 93147,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/93147/?format=api",
        "name": "Ekansh Gupta via B4 Relay",
        "email": "devnull+ekansh.gupta.oss.qualcomm.com@kernel.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260414-computebus-v1-2-4d904d40926a@oss.qualcomm.com/mbox/",
    "series": [
        {
            "id": 499873,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/499873/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=499873",
            "date": "2026-04-14T16:31:17",
            "name": "Introduce generic context device bus for IOMMU context isolation",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/499873/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2223192/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2223192/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-tegra+bounces-13760-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-tegra@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=P+CTp9l3;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-tegra+bounces-13760-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"P+CTp9l3\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fw90n3b6Kz1yHJ\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 15 Apr 2026 02:37:13 +1000 (AEST)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id DBEBC301DBA9\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 16:31:22 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6406C27A907;\n\tTue, 14 Apr 2026 16:31:22 +0000 (UTC)",
            "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id D1D16288C2C;\n\tTue, 14 Apr 2026 16:31:20 +0000 (UTC)",
            "by smtp.kernel.org (Postfix) with ESMTPS id 7F3CFC4AF0D;\n\tTue, 14 Apr 2026 16:31:20 +0000 (UTC)",
            "from aws-us-west-2-korg-lkml-1.web.codeaurora.org\n (localhost.localdomain [127.0.0.1])\n\tby smtp.lore.kernel.org (Postfix) with ESMTP id 70C4AF9D0E9;\n\tTue, 14 Apr 2026 16:31:20 +0000 (UTC)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776184280; cv=none;\n b=VYpFZTtGKtWONNCBg3J7MtmUaZ2OxLR40TSBV29BWbTarg2n/P3rlP97o7bU+a1qAsvGc+wBjU6pJMOIRdBv6eJf+AnweWF9zPiPan6koc0GohsNQzmiyDLlahsTyS5ChTRdpXPgDXsGF/RTM0rivJA3udM1qn9gn1vK3x0tfEU=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776184280; c=relaxed/simple;\n\tbh=ZM2pWoeOuo+RG4s6jFjQePRcse27xHjB7V24etmkYmU=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=M2dsarXpAByQIsLEKVtCo3OZm7BIrAwUHN/n85cuScz4ldZS7E9S7s4OgOgIbBq3VaMlK7PL/jjTaWbarzvgfP31Sz/qVy1tVDC+mMNIFA5GqSaDyB0X9FGuOHX+/Xxv59qUYD8kTmxaivTEZH7cGAj/c+GnpIdxqdHkY9G+IE0=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=P+CTp9l3; arc=none smtp.client-ip=10.30.226.201",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1776184280;\n\tbh=ZM2pWoeOuo+RG4s6jFjQePRcse27xHjB7V24etmkYmU=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;\n\tb=P+CTp9l39ZoNB3R5OzORxl9YEzVfDLqEjN+vjAHMdcttu4HcslQHZ1+rnfx2HPjZT\n\t nkML5lv8NSAhtA+v0A5NCj3ChCx3FiRRSD5wkLCC/YuDXQ8J79yAuc2HkxIr87ByKb\n\t q12LWkfagQ5X2uvdAKavph82ON35tpO3ZIkFtenp1l70opxuqmPAn9COXi/5x2F9bd\n\t TuI77JKICfIoJ8P6LzAsgoD6RW3DcV3QIoyKVCzuhpMSNeYi3VMp5R7c2cI+ub21Wr\n\t pw5pBXpQvA7tPt+c5KWaCR6BcNTeS808l8eWBsburUlMHamUeDB/6NKzPhCuvlBE4G\n\t qHzx+UFUfcYQQ==",
        "From": "Ekansh Gupta via B4 Relay\n <devnull+ekansh.gupta.oss.qualcomm.com@kernel.org>",
        "Date": "Tue, 14 Apr 2026 22:01:16 +0530",
        "Subject": "[PATCH 2/3] gpu: host1x: Migrate to generic context device bus",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-tegra@vger.kernel.org",
        "List-Id": "<linux-tegra.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=\"utf-8\"",
        "Content-Transfer-Encoding": "7bit",
        "Message-Id": "<20260414-computebus-v1-2-4d904d40926a@oss.qualcomm.com>",
        "References": "<20260414-computebus-v1-0-4d904d40926a@oss.qualcomm.com>",
        "In-Reply-To": "<20260414-computebus-v1-0-4d904d40926a@oss.qualcomm.com>",
        "To": "Greg Kroah-Hartman <gregkh@linuxfoundation.org>,\n \"Rafael J. Wysocki\" <rafael@kernel.org>, Danilo Krummrich <dakr@kernel.org>,\n Thierry Reding <thierry.reding@kernel.org>,\n Mikko Perttunen <mperttunen@nvidia.com>, David Airlie <airlied@gmail.com>,\n Simona Vetter <simona@ffwll.ch>, Joerg Roedel <joro@8bytes.org>,\n Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>,\n Arnd Bergmann <arnd@arndb.de>, Srinivas Kandagatla <srini@kernel.org>,\n Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,\n Bharath Kumar <quic_bkumar@quicinc.com>,\n Chenna Kesava Raju <quic_chennak@quicinc.com>",
        "Cc": "linux-kernel@vger.kernel.org, driver-core@lists.linux.dev,\n dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org,\n iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org,\n Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>",
        "X-Mailer": "b4 0.14.3",
        "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1776184278; l=4839;\n i=ekansh.gupta@oss.qualcomm.com; s=20260223; h=from:subject:message-id;\n bh=DQ1olxxNHseU94rnbtsHQ4+BWgV7NjVl53Fj2nX92ag=;\n b=LNNS8pXQotH116K8rf8Vjr5wHJV7xKAjMrOpuqvSIYb2fF05W7RU2RHTSCAtKIlqBJ/gG+DKE\n ePcI9NgORtfD6ngTYZwsvy+E+hgJBXDVF5vXGtcMu8cja0X8Cx7XpLm",
        "X-Developer-Key": "i=ekansh.gupta@oss.qualcomm.com; a=ed25519;\n pk=n0SepARizye+pYjhjg1RA5J+Nq4+IJbyRcBybU+/ERQ=",
        "X-Endpoint-Received": "by B4 Relay for ekansh.gupta@oss.qualcomm.com/20260223\n with auth_id=647",
        "X-Original-From": "Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>",
        "Reply-To": "ekansh.gupta@oss.qualcomm.com"
    },
    "content": "From: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>\n\nReplace the host1x-specific context device bus with the generic\ncontext_device_bus_type. This eliminates driver-specific bus\ninfrastructure in favor of shared code in the driver core.\n\nThe host1x driver creates synthetic context bank devices to represent\nIOMMU contexts for memory isolation. These devices were previously\nregistered on a host1x-specific bus (\"host1x-context\"), but this\nfunctionality is now provided by the generic \"context-device\" bus.\n\nThe IOMMU subsystem is updated to recognize the generic bus instead\nof the host1x-specific one, allowing proper IOMMU operations on\ncontext devices.\n\nThis change maintains functional equivalence - context devices still\nwork the same way, just on a different bus. The device names remain\n\"host1x-ctx.N\" to preserve any userspace dependencies.\n\nSigned-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>\n---\n drivers/gpu/host1x/Kconfig       |  5 +----\n drivers/gpu/host1x/Makefile      |  1 -\n drivers/gpu/host1x/context.c     |  2 +-\n drivers/gpu/host1x/context.h     |  3 +--\n drivers/gpu/host1x/context_bus.c | 26 --------------------------\n drivers/iommu/iommu.c            |  6 +++---\n 6 files changed, 6 insertions(+), 37 deletions(-)",
    "diff": "diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig\nindex e6c78ae2003a..e3e3896f4d71 100644\n--- a/drivers/gpu/host1x/Kconfig\n+++ b/drivers/gpu/host1x/Kconfig\n@@ -1,13 +1,10 @@\n # SPDX-License-Identifier: GPL-2.0-only\n \n-config TEGRA_HOST1X_CONTEXT_BUS\n-\tbool\n-\n config TEGRA_HOST1X\n \ttristate \"NVIDIA Tegra host1x driver\"\n \tdepends on ARCH_TEGRA || COMPILE_TEST\n \tselect DMA_SHARED_BUFFER\n-\tselect TEGRA_HOST1X_CONTEXT_BUS\n+\tselect CONTEXT_DEVICE_BUS\n \tselect IOMMU_IOVA\n \thelp\n \t  Driver for the NVIDIA Tegra host1x hardware.\ndiff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile\nindex fead483af0b4..2ccd9a5f1c65 100644\n--- a/drivers/gpu/host1x/Makefile\n+++ b/drivers/gpu/host1x/Makefile\n@@ -23,4 +23,3 @@ host1x-$(CONFIG_IOMMU_API) += \\\n \tcontext.o\n \n obj-$(CONFIG_TEGRA_HOST1X) += host1x.o\n-obj-$(CONFIG_TEGRA_HOST1X_CONTEXT_BUS) += context_bus.o\ndiff --git a/drivers/gpu/host1x/context.c b/drivers/gpu/host1x/context.c\nindex d50d41c20561..6411c17cc060 100644\n--- a/drivers/gpu/host1x/context.c\n+++ b/drivers/gpu/host1x/context.c\n@@ -54,7 +54,7 @@ int host1x_memory_context_list_init(struct host1x *host1x)\n \t\tctx->dev.dma_mask = &ctx->dma_mask;\n \t\tctx->dev.coherent_dma_mask = ctx->dma_mask;\n \t\tdev_set_name(&ctx->dev, \"host1x-ctx.%d\", i);\n-\t\tctx->dev.bus = &host1x_context_device_bus_type;\n+\t\tctx->dev.bus = &context_device_bus_type;\n \t\tctx->dev.parent = host1x->dev;\n \t\tctx->dev.release = host1x_memory_context_release;\n \ndiff --git a/drivers/gpu/host1x/context.h b/drivers/gpu/host1x/context.h\nindex 3e03bc1d3bac..87ae522fafc7 100644\n--- a/drivers/gpu/host1x/context.h\n+++ b/drivers/gpu/host1x/context.h\n@@ -8,13 +8,12 @@\n #ifndef __HOST1X_CONTEXT_H\n #define __HOST1X_CONTEXT_H\n \n+#include <linux/context_bus.h>\n #include <linux/mutex.h>\n #include <linux/refcount.h>\n \n struct host1x;\n \n-extern struct bus_type host1x_context_device_bus_type;\n-\n struct host1x_memory_context_list {\n \tstruct mutex lock;\n \tstruct host1x_memory_context *devs;\ndiff --git a/drivers/gpu/host1x/context_bus.c b/drivers/gpu/host1x/context_bus.c\ndeleted file mode 100644\nindex 7cd0e1a5edd1..000000000000\n--- a/drivers/gpu/host1x/context_bus.c\n+++ /dev/null\n@@ -1,26 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0-only\n-/*\n- * Copyright (c) 2021, NVIDIA Corporation.\n- */\n-\n-#include <linux/device.h>\n-#include <linux/of.h>\n-\n-const struct bus_type host1x_context_device_bus_type = {\n-\t.name = \"host1x-context\",\n-};\n-EXPORT_SYMBOL_GPL(host1x_context_device_bus_type);\n-\n-static int __init host1x_context_device_bus_init(void)\n-{\n-\tint err;\n-\n-\terr = bus_register(&host1x_context_device_bus_type);\n-\tif (err < 0) {\n-\t\tpr_err(\"bus type registration failed: %d\\n\", err);\n-\t\treturn err;\n-\t}\n-\n-\treturn 0;\n-}\n-postcore_initcall(host1x_context_device_bus_init);\ndiff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c\nindex 61c12ba78206..f01a13e2e634 100644\n--- a/drivers/iommu/iommu.c\n+++ b/drivers/iommu/iommu.c\n@@ -16,7 +16,7 @@\n #include <linux/export.h>\n #include <linux/slab.h>\n #include <linux/errno.h>\n-#include <linux/host1x_context_bus.h>\n+#include <linux/context_bus.h>\n #include <linux/iommu.h>\n #include <linux/iommufd.h>\n #include <linux/idr.h>\n@@ -173,8 +173,8 @@ static const struct bus_type * const iommu_buses[] = {\n #ifdef CONFIG_FSL_MC_BUS\n \t&fsl_mc_bus_type,\n #endif\n-#ifdef CONFIG_TEGRA_HOST1X_CONTEXT_BUS\n-\t&host1x_context_device_bus_type,\n+#ifdef CONFIG_CONTEXT_DEVICE_BUS\n+\t&context_device_bus_type,\n #endif\n #ifdef CONFIG_CDX_BUS\n \t&cdx_bus_type,\n",
    "prefixes": [
        "2/3"
    ]
}