get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/1.1/patches/2222912/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2222912,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2222912/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414005348.4767-4-philmd@linaro.org/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260414005348.4767-4-philmd@linaro.org>",
    "date": "2026-04-14T00:53:42",
    "name": "[v2,3/9] target/arm: Hoist MO_TE into mve_advance_vpt()",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "25f83e45b03dde1910dd639410df0591d698e2fd",
    "submitter": {
        "id": 85046,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/85046/?format=api",
        "name": "Philippe Mathieu-Daudé",
        "email": "philmd@linaro.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414005348.4767-4-philmd@linaro.org/mbox/",
    "series": [
        {
            "id": 499764,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/499764/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499764",
            "date": "2026-04-14T00:53:39",
            "name": "target/arm: Remove MO_TE to compile MVE/M helpers once",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/499764/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2222912/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2222912/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=uHRaIq2c;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"
        ],
        "Received": [
            "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvm5b5PlWz1y2d\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 10:54:59 +1000 (AEST)",
            "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wCS2n-0000Ni-9x; Mon, 13 Apr 2026 20:54:21 -0400",
            "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <philmd@linaro.org>) id 1wCS2k-0000Mx-HQ\n for qemu-devel@nongnu.org; Mon, 13 Apr 2026 20:54:18 -0400",
            "from mail-wm1-x333.google.com ([2a00:1450:4864:20::333])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <philmd@linaro.org>) id 1wCS2j-0000Kl-1N\n for qemu-devel@nongnu.org; Mon, 13 Apr 2026 20:54:18 -0400",
            "by mail-wm1-x333.google.com with SMTP id\n 5b1f17b1804b1-488d2079582so44460865e9.2\n for <qemu-devel@nongnu.org>; Mon, 13 Apr 2026 17:54:16 -0700 (PDT)",
            "from localhost.localdomain (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-488d681f28esm105872435e9.16.2026.04.13.17.54.12\n (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256);\n Mon, 13 Apr 2026 17:54:13 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1776128055; x=1776732855; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=NNo1mYR/V/Hb3qL4J/cDVYDlyrB6sHdhhxeBEz2vg5I=;\n b=uHRaIq2ck0TWEQr/o0HnoCmAP++GB2Kc2v5RSMPUA6JPm7Uc/CiqHdfulQ7dlFPvyn\n RQnwVvjc1NyC64dook4Nxc1ggXJxpivxoUHIgcPEAmkGRZC9VmhskkaZEdkd6RXsm8qh\n ynWBm1JKHDWvYKEGXsS57/PCqXlydzn1qjVy6v/Xxvh4VVTrX7epr+Cd9GyvDd4oKInl\n y7Lp7mCblzo0rhwy6jByGc1h3PcA/YhrcHwolbdq0u3du3oecTqmPX7OP5rBiEFsewv0\n MQS6hCj5aB3VL4/vhhC9OoCtlKcqDF5NvUolkuyIZKdwrmzLEegY4KpVcoLAwfv4pCNI\n pHMw==",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776128055; x=1776732855;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=NNo1mYR/V/Hb3qL4J/cDVYDlyrB6sHdhhxeBEz2vg5I=;\n b=IWS3jeA5Fu6++TX3tCRo4s6M/Iq5YVGoxliLsXCg0Kban+010tbE8E9bZRSDoL8PM+\n wGzmoYTJVBgo8BD551PI2dNmssbAApRO3K97YaIhoM4vcRNVj61FoVD04ScKYWO/BnXB\n AJlO01LwLi5A19d5tOukGzybD/NlzXBqvv6uLhVdFqUvz36LrHQQH4y5lm9zV5MF9fNJ\n EIuiKk89HdfrL8lmeD2eIc6BKIrDNBLGDuX0sTRKmHcKsN5wi3Mgfa7QVXZV8cEB9iAB\n LbqG62v4PatFpBNchHamAYCH1aYeAPMkxWaXyzN4mGHT9oqCb02DDIRaX5gkK2tdJDk8\n t80g==",
        "X-Gm-Message-State": "AOJu0YyY7HrQ0cD3CPmI/tjfwLpcEGALax8uJwQtX9k6ZtcSuJEuT687\n upJuUI5+3tX65QaPiD37kbSo7wJMiwdvsJskxIgQ61pWUbHjs/O6fSL1/bhncndClzqTr11JKKh\n SS3UWo+w=",
        "X-Gm-Gg": "AeBDievd7KpGtqKrNDxcDAEo8oCoYUMizhPFXbQ6YBfd2JSxz4J7e+npsEgM6cCOrhv\n KYwFeYxOMzpSzUSTFrCjmWFWzGCml6qrVlEP1DkkmW5IJio9Q+02/MTCObnpjNLMwlTHZToCWlK\n pK/MDhOY8In4Rnuuhybqw93DzOPQfBAVUa4hjbPFfG9xazE5eOWVniLnhSKRLazfQZVFpMgND6j\n dFqNgO0Ra+7jGhGh9CJKWUCwdoD5awlPASJsZCVU0/WV+D6WwRVRyqmwH8q3fesa0ntIfHVFcFl\n FGSj4e6RAX2+7GTNDNIcRxuWm2RDBv/i+Y+gFdPOVQBUk9AltoKrurepLOULpnEkfqQblXpldf8\n IyAlbD6M6Cb2gMW+4eKqjC9HjkQcwXkOUOXc2+ewbhJGIZkLpPBfzzUg3+MU2mzh2O3Jp+FLy5z\n 5a5xl1XHTtQCjm06qmdMepeJ1DpeXagzzqGo+jBjjc2csQ3BNYlvvKXBpmjn8Adgu085haBgNOu\n RHoFG/LCqE=",
        "X-Received": "by 2002:a05:600c:c16d:b0:488:be21:54ae with SMTP id\n 5b1f17b1804b1-488d66504bfmr222636215e9.0.1776128055316;\n Mon, 13 Apr 2026 17:54:15 -0700 (PDT)",
        "From": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>",
        "To": "qemu-devel@nongnu.org",
        "Cc": "Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>, =?utf-8?q?Philippe_Mathieu-?=\n\t=?utf-8?q?Daud=C3=A9?= <philmd@linaro.org>,\n Richard Henderson <richard.henderson@linaro.org>",
        "Subject": "[PATCH v2 3/9] target/arm: Hoist MO_TE into mve_advance_vpt()",
        "Date": "Tue, 14 Apr 2026 02:53:42 +0200",
        "Message-ID": "<20260414005348.4767-4-philmd@linaro.org>",
        "X-Mailer": "git-send-email 2.53.0",
        "In-Reply-To": "<20260414005348.4767-1-philmd@linaro.org>",
        "References": "<20260414005348.4767-1-philmd@linaro.org>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=UTF-8",
        "Content-Transfer-Encoding": "8bit",
        "Received-SPF": "pass client-ip=2a00:1450:4864:20::333;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com",
        "X-Spam_score_int": "-20",
        "X-Spam_score": "-2.1",
        "X-Spam_bar": "--",
        "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no",
        "X-Spam_action": "no action",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "qemu development <qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
        "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>",
        "List-Post": "<mailto:qemu-devel@nongnu.org>",
        "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>",
        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"
    },
    "content": "Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\n---\n target/arm/tcg/mve_helper.c | 20 +++++++++++---------\n 1 file changed, 11 insertions(+), 9 deletions(-)",
    "diff": "diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c\nindex cc58e0502f5..fbb64889bf7 100644\n--- a/target/arm/tcg/mve_helper.c\n+++ b/target/arm/tcg/mve_helper.c\n@@ -160,7 +160,8 @@ static void mve_advance_vpt(CPUARMState *env)\n         uint16_t eci_mask = mve_eci_mask(env);                          \\\n         unsigned b, e;                                                  \\\n         int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env));            \\\n-        MemOpIdx oi = make_memop_idx(MFLAG | MO_ALIGN, mmu_idx);        \\\n+        MemOpIdx oi = make_memop_idx(MO_TE | MFLAG | MO_ALIGN,          \\\n+                                     mmu_idx);                          \\\n         /*                                                              \\\n          * R_SXTM allows the dest reg to become UNKNOWN for abandoned   \\\n          * beats so we don't care if we update part of the dest and     \\\n@@ -183,7 +184,8 @@ static void mve_advance_vpt(CPUARMState *env)\n         uint16_t mask = mve_element_mask(env);                          \\\n         unsigned b, e;                                                  \\\n         int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env));            \\\n-        MemOpIdx oi = make_memop_idx(MFLAG | MO_ALIGN, mmu_idx);        \\\n+        MemOpIdx oi = make_memop_idx(MO_TE | MFLAG | MO_ALIGN,          \\\n+                                     mmu_idx);                          \\\n         for (b = 0, e = 0; b < 16; b += ESIZE, e++) {                   \\\n             if (mask & (1 << b)) {                                      \\\n                 cpu_##STTYPE##_mmu(env, addr, d[H##ESIZE(e)], oi, GETPC()); \\\n@@ -194,23 +196,23 @@ static void mve_advance_vpt(CPUARMState *env)\n     }\n \n DO_VLDR(vldrb, MO_UB, 1, uint8_t, ldb, 1, uint8_t)\n-DO_VLDR(vldrh, MO_TE | MO_UW, 2, uint16_t, ldw, 2, uint16_t)\n-DO_VLDR(vldrw, MO_TE | MO_UL, 4, uint32_t, ldl, 4, uint32_t)\n+DO_VLDR(vldrh, MO_UW, 2, uint16_t, ldw, 2, uint16_t)\n+DO_VLDR(vldrw, MO_UL, 4, uint32_t, ldl, 4, uint32_t)\n \n DO_VSTR(vstrb, MO_UB, 1, stb, 1, uint8_t)\n-DO_VSTR(vstrh, MO_TE | MO_UW, 2, stw, 2, uint16_t)\n-DO_VSTR(vstrw, MO_TE | MO_UL, 4, stl, 4, uint32_t)\n+DO_VSTR(vstrh, MO_UW, 2, stw, 2, uint16_t)\n+DO_VSTR(vstrw, MO_UL, 4, stl, 4, uint32_t)\n \n DO_VLDR(vldrb_sh, MO_SB, 1, int8_t, ldb, 2, int16_t)\n DO_VLDR(vldrb_sw, MO_SB, 1, int8_t, ldb, 4, int32_t)\n DO_VLDR(vldrb_uh, MO_UB, 1, uint8_t, ldb, 2, uint16_t)\n DO_VLDR(vldrb_uw, MO_UB, 1, uint8_t, ldb, 4, uint32_t)\n-DO_VLDR(vldrh_sw, MO_TE | MO_SW, 2, int16_t, ldw, 4, int32_t)\n-DO_VLDR(vldrh_uw, MO_TE | MO_UW, 2, uint16_t, ldw, 4, uint32_t)\n+DO_VLDR(vldrh_sw, MO_SW, 2, int16_t, ldw, 4, int32_t)\n+DO_VLDR(vldrh_uw, MO_UW, 2, uint16_t, ldw, 4, uint32_t)\n \n DO_VSTR(vstrb_h, MO_UB, 1, stb, 2, int16_t)\n DO_VSTR(vstrb_w, MO_UB, 1, stb, 4, int32_t)\n-DO_VSTR(vstrh_w, MO_TE | MO_UW, 2, stw, 4, int32_t)\n+DO_VSTR(vstrh_w, MO_UW, 2, stw, 4, int32_t)\n \n #undef DO_VLDR\n #undef DO_VSTR\n",
    "prefixes": [
        "v2",
        "3/9"
    ]
}