Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2222809/?format=api
{ "id": 2222809, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2222809/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413182456.811543-5-prabhakar.mahadev-lad.rj@bp.renesas.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260413182456.811543-5-prabhakar.mahadev-lad.rj@bp.renesas.com>", "date": "2026-04-13T18:24:54", "name": "[v2,4/5] pinctrl: renesas: rzg2l: Add NOD register cache for PM suspend/resume", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b663146735dec8c4bee15ea1d0a8ffe433ceebf3", "submitter": { "id": 9539, "url": "http://patchwork.ozlabs.org/api/1.1/people/9539/?format=api", "name": "Prabhakar", "email": "prabhakar.csengg@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413182456.811543-5-prabhakar.mahadev-lad.rj@bp.renesas.com/mbox/", "series": [ { "id": 499739, "url": "http://patchwork.ozlabs.org/api/1.1/series/499739/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499739", "date": "2026-04-13T18:24:51", "name": "pinctrl: renesas: rzg2l: Fix PM register caching", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/499739/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2222809/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2222809/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35128-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=oUtnyAvL;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35128-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"oUtnyAvL\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.128.48", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvbVP6qgBz1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 04:27:25 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id E579730657AA\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 13 Apr 2026 18:25:31 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5A81F383C63;\n\tMon, 13 Apr 2026 18:25:14 +0000 (UTC)", "from mail-wm1-f48.google.com (mail-wm1-f48.google.com\n [209.85.128.48])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id DB427376BDE\n\tfor <linux-gpio@vger.kernel.org>; Mon, 13 Apr 2026 18:25:11 +0000 (UTC)", "by mail-wm1-f48.google.com with SMTP id\n 5b1f17b1804b1-488ad135063so45645395e9.0\n for <linux-gpio@vger.kernel.org>;\n Mon, 13 Apr 2026 11:25:11 -0700 (PDT)", "from iku.example.org ([2a06:5906:61b:2d00:8060:3087:2ea2:f494])\n by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-488d5b56d1asm301175695e9.15.2026.04.13.11.25.09\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Mon, 13 Apr 2026 11:25:09 -0700 (PDT)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776104714; cv=none;\n b=SpBvK5uw66pnoHlDgFgwEwuCCJ4Zbz5K1TsoesRqNUwsCWaZMh+GrftlBGuK1zHQhMFZFY9jpDdTuwXm09XVyVNK1wnS2hUztsxNipX5HY8AW2t0cuJLrwD5PmkRaO0ZsKTLsohLx9dTrPiYBp2bQlj1pyIy9BDt0YJQhiOupnc=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776104714; c=relaxed/simple;\n\tbh=U4Y/F+JH7fE+UC5EjEQ+l4RRAJguyzUzwpFHaYQwvWY=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=ajtzHXZVlOnb6vlJ+eWz7xLdHHJeySuzcPUybZBBmSzHcAb+I7IILhup4czit+7S6bhTFPiVgEjR+vvF1nKkdhn86KJqkLR95yhqNqbCYuVSfH4VqRs9bysR6G3xRatqkdIFYfyIylaYjFsZu1q8ECEosRclMp3TAjLH+YkZmm8=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=oUtnyAvL; arc=none smtp.client-ip=209.85.128.48", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1776104710; x=1776709510;\n darn=vger.kernel.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=QvXShpkoYrfA999CM9pWEW9h1p62k4eqsGp9A9pTeT8=;\n b=oUtnyAvLJX682lG7orYukO4hCuYq7lOWhFQhKiqEm8L1Yn/VJ7pKqX2lLekTCNYXQS\n w3xlFXyZm/9aEHpS4rf807crVF2J3p5YxuT+2wJz0+xEKSWsz4D4baY0Juet1FTFLcQT\n PB3TgPUb6Kf8DD6aUvNvRw+BOyc7ByHmWUIACyno2mcfp0Y5us99dR2g1JlOZA/L9puV\n kHhaQxCSuukeR2JTI5QjHzTh1v4uKEAoVOZHCnTHfzBWEwBGY5VSVqOZvV4UC3pvRVgN\n xOx5MDDfzONvZkaY5Xe7GJTdKTmsYKabzm5k2NfywKIFCtxBdEyApPxFQoHdRdzo/Y5i\n DpPg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776104710; x=1776709510;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=QvXShpkoYrfA999CM9pWEW9h1p62k4eqsGp9A9pTeT8=;\n b=EIfKDZ41caD45N5jEv83s4MpZg2sMZHelLS4qhfc7kyQpI7z6A4OaWrAbmfUUtB5WY\n ljoqU+4LrjPQBWg1gskU7gAIaea35aNnybeQRe26slosUN/BSSZUCcEOQJHlxu9vpCw1\n N3qBh3EF/NpY+wcHffnc1UMQOvpi3PeO9hW/10TaP/sdUS/Tm6aErGFsu9dLJ+AmnXXl\n b6DHfAI+oxhdjclXlHTGhMYA5W2OLy0UHlzvp9TVSGPtPMe0tc4clEvaRPtyNWegrg1j\n qgWmUNrMYSVtsaY6OPmxpLQuyQsduk8GtzTvH0uhurlxKsgvR+mESDna/qAWiiyyuj1Q\n Vmyg==", "X-Forwarded-Encrypted": "i=1;\n AFNElJ+efVmcL8RYRGb4D2oDlMtSmzfj7IvHzeHGlgdRp6962stJNlnCeQLpW/H8ihOsfzWs84O/BldgTem+@vger.kernel.org", "X-Gm-Message-State": "AOJu0YyfXzbqWDlwXY9y9u/hcCOpmdbN/QnhP1oC5LZZmZcb6J50p0v/\n\tvQvU5vRLThfTvihWi0NqCHxPv98G7dV1bzaEAX8CETBQSsOjfCrxPuQ0", "X-Gm-Gg": "AeBDietlAhK3Shh3/3yPdFOVVeEl5ZT2MYrPkk1Ab5kRKqJMLz7zI3BYRz+uzAEJdVK\n\tkdlzYQxsakedZ/MEj1P6nZKSwWsY/JmAILgK758mai+o8wxhGzj6YiaGzKehXsFwheN+YkxSoqG\n\tVyRBsygz0zftqfPrO/s6cHe7TwZ/ZtXAN6yhMcpE+4QACOEmrSWJ1XIGWcmzVKBhU3kV2JBVsRx\n\tGm8KF6osJWDyEvTlcTqBKfOO/5C3G4wJaBjDugAUwcAzdSU5EAFvcbWHQqxidGub2ChG6SYd+Ri\n\tVy1VRErY1HM7LAWIbXjvWEgDW6jexnGWHdxkVxC6LAV6ovYEGGUBc28R+0463vb2RlfyMvikHtZ\n\tB/euabLea80fKc4ixUhYHp3xagzXU8xDzjYclgBwc4q8CtX1GUe9edeL2gKGWml9R0wnLC0Ejf/\n\thU1ctpkAcY++MUZ6L1yLbW332CVqxGvVS4gbvoqzOHyPJbm3HUp/4oUtD0jwG5DovFZMzxlo4Me\n\tHbH17SWIp+BzmdRxp5HRz4r3mRXr9PSobU0b8I5UQ1ItyQ=", "X-Received": "by 2002:a05:600c:5292:b0:486:fe39:28b7 with SMTP id\n 5b1f17b1804b1-488d67fa48emr206566925e9.9.1776104710273;\n Mon, 13 Apr 2026 11:25:10 -0700 (PDT)", "From": "Prabhakar <prabhakar.csengg@gmail.com>", "X-Google-Original-From": "Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>", "To": "Geert Uytterhoeven <geert+renesas@glider.be>,\n\tLinus Walleij <linusw@kernel.org>", "Cc": "linux-renesas-soc@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tPrabhakar <prabhakar.csengg@gmail.com>,\n\tBiju Das <biju.das.jz@bp.renesas.com>,\n\tFabrizio Castro <fabrizio.castro.jz@renesas.com>,\n\tLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>", "Subject": "[PATCH v2 4/5] pinctrl: renesas: rzg2l: Add NOD register cache for PM\n suspend/resume", "Date": "Mon, 13 Apr 2026 19:24:54 +0100", "Message-ID": "<20260413182456.811543-5-prabhakar.mahadev-lad.rj@bp.renesas.com>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260413182456.811543-1-prabhakar.mahadev-lad.rj@bp.renesas.com>", "References": "<20260413182456.811543-1-prabhakar.mahadev-lad.rj@bp.renesas.com>", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>\n\nInclude the NOD (N-ch Open Drain) register in the PM suspend/resume\nregister cache.\n\nSigned-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>\n---\nv1->v2:\n- New patch\n---\n drivers/pinctrl/renesas/pinctrl-rzg2l.c | 37 +++++++++++++++++++++++--\n 1 file changed, 35 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c\nindex b2eb9dca7eec..be6d229c927b 100644\n--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c\n+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c\n@@ -323,6 +323,7 @@ struct rzg2l_pinctrl_pin_settings {\n * @ien: IEN registers cache\n * @smt: SMT registers cache\n * @sr: SR registers cache\n+ * @nod: NOD registers cache\n * @sd_ch: SD_CH registers cache\n * @eth_poc: ET_POC registers cache\n * @oen: Output Enable register cache\n@@ -338,6 +339,7 @@ struct rzg2l_pinctrl_reg_cache {\n \tu32\t*pupd[2];\n \tu32\t*smt[2];\n \tu32\t*sr[2];\n+\tu32\t*nod[2];\n \tu8\tsd_ch[2];\n \tu8\teth_poc[2];\n \tu8\toen;\n@@ -2767,6 +2769,11 @@ static int rzg2l_pinctrl_reg_cache_alloc(struct rzg2l_pinctrl *pctrl)\n \t\tif (!cache->sr[i])\n \t\t\treturn -ENOMEM;\n \n+\t\tcache->nod[i] = devm_kcalloc(pctrl->dev, nports, sizeof(*cache->nod[i]),\n+\t\t\t\t\t GFP_KERNEL);\n+\t\tif (!cache->nod[i])\n+\t\t\treturn -ENOMEM;\n+\n \t\t/* Allocate dedicated cache. */\n \t\tdedicated_cache->iolh[i] = devm_kcalloc(pctrl->dev, n_dedicated_pins,\n \t\t\t\t\t\t\tsizeof(*dedicated_cache->iolh[i]),\n@@ -2785,6 +2792,12 @@ static int rzg2l_pinctrl_reg_cache_alloc(struct rzg2l_pinctrl *pctrl)\n \t\t\t\t\t\t GFP_KERNEL);\n \t\tif (!dedicated_cache->sr[i])\n \t\t\treturn -ENOMEM;\n+\n+\t\tdedicated_cache->nod[i] = devm_kcalloc(pctrl->dev, n_dedicated_pins,\n+\t\t\t\t\t\t sizeof(*dedicated_cache->nod[i]),\n+\t\t\t\t\t\t GFP_KERNEL);\n+\t\tif (!dedicated_cache->nod[i])\n+\t\t\treturn -ENOMEM;\n \t}\n \n \tpctrl->cache = cache;\n@@ -3016,7 +3029,7 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen\n \tstruct rzg2l_pinctrl_reg_cache *cache = pctrl->cache;\n \n \tfor (u32 port = 0; port < nports; port++) {\n-\t\tbool has_iolh, has_ien, has_pupd, has_smt, has_sr;\n+\t\tbool has_iolh, has_ien, has_pupd, has_smt, has_sr, has_nod;\n \t\tu32 off, caps;\n \t\tu8 pincnt;\n \t\tu64 cfg;\n@@ -3039,6 +3052,7 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen\n \t\thas_pupd = !!(caps & PIN_CFG_PUPD);\n \t\thas_smt = !!(caps & PIN_CFG_SMT);\n \t\thas_sr = !!(caps & PIN_CFG_SR);\n+\t\thas_nod = !!(caps & PIN_CFG_NOD);\n \n \t\tif (suspend)\n \t\t\tRZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PFC(off), cache->pfc[port]);\n@@ -3099,6 +3113,15 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen\n \t\t\t\t\t\t\t cache->sr[1][port]);\n \t\t\t}\n \t\t}\n+\n+\t\tif (has_nod) {\n+\t\t\tRZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off),\n+\t\t\t\t\t\t cache->nod[0][port]);\n+\t\t\tif (pincnt >= 4) {\n+\t\t\t\tRZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off) + 4,\n+\t\t\t\t\t\t\t cache->nod[1][port]);\n+\t\t\t}\n+\t\t}\n \t}\n }\n \n@@ -3113,7 +3136,7 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b\n \t * port offset are close together.\n \t */\n \tfor (i = 0, caps = 0; i < pctrl->data->n_dedicated_pins; i++) {\n-\t\tbool has_iolh, has_ien, has_sr;\n+\t\tbool has_iolh, has_ien, has_sr, has_nod;\n \t\tu32 off, next_off = 0;\n \t\tu64 cfg, next_cfg;\n \t\tu8 pincnt;\n@@ -3136,6 +3159,7 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b\n \t\t\t\t PIN_CFG_IOLH_C | PIN_CFG_IOLH_RZV2H));\n \t\thas_ien = !!(caps & PIN_CFG_IEN);\n \t\thas_sr = !!(caps & PIN_CFG_SR);\n+\t\thas_nod = !!(caps & PIN_CFG_NOD);\n \t\tpincnt = hweight8(FIELD_GET(RZG2L_SINGLE_PIN_BITS_MASK, cfg));\n \n \t\tif (has_iolh) {\n@@ -3150,6 +3174,10 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b\n \t\t\tRZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SR(off),\n \t\t\t\t\t\t cache->sr[0][i]);\n \t\t}\n+\t\tif (has_nod) {\n+\t\t\tRZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off),\n+\t\t\t\t\t\t cache->nod[0][i]);\n+\t\t}\n \t\tif (pincnt >= 4) {\n \t\t\tif (has_iolh) {\n \t\t\t\tRZG2L_PCTRL_REG_ACCESS32(suspend,\n@@ -3166,6 +3194,11 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b\n \t\t\t\t\t\t\t pctrl->base + SR(off) + 4,\n \t\t\t\t\t\t\t cache->sr[1][i]);\n \t\t\t}\n+\t\t\tif (has_nod) {\n+\t\t\t\tRZG2L_PCTRL_REG_ACCESS32(suspend,\n+\t\t\t\t\t\t\t pctrl->base + NOD(off) + 4,\n+\t\t\t\t\t\t\t cache->nod[1][i]);\n+\t\t\t}\n \t\t}\n \t\tcaps = 0;\n \t}\n", "prefixes": [ "v2", "4/5" ] }