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GET /api/1.1/patches/2222722/?format=api
{ "id": 2222722, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2222722/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413-waveshare-dsi-touch-v3-12-3aeb53022c32@oss.qualcomm.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260413-waveshare-dsi-touch-v3-12-3aeb53022c32@oss.qualcomm.com>", "date": "2026-04-13T14:05:35", "name": "[v3,12/21] drm/panel: jadard-jd9365da-h3: support variable DSI configuration", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "586e21354d0a1dd7c376d63f2ee3038756831498", "submitter": { "id": 90483, "url": "http://patchwork.ozlabs.org/api/1.1/people/90483/?format=api", "name": "Dmitry Baryshkov", "email": "dmitry.baryshkov@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413-waveshare-dsi-touch-v3-12-3aeb53022c32@oss.qualcomm.com/mbox/", "series": [ { "id": 499710, "url": "http://patchwork.ozlabs.org/api/1.1/series/499710/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499710", "date": "2026-04-13T14:05:24", "name": "drm/panel: support Waveshare DSI TOUCH kits", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/499710/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2222722/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2222722/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35107-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=Vs0pyw6I;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=WCuAZ6I9;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260413-waveshare-dsi-touch-v3-12-3aeb53022c32@oss.qualcomm.com>", "References": "<20260413-waveshare-dsi-touch-v3-0-3aeb53022c32@oss.qualcomm.com>", "In-Reply-To": "<20260413-waveshare-dsi-touch-v3-0-3aeb53022c32@oss.qualcomm.com>", "To": "Neil Armstrong <neil.armstrong@linaro.org>,\n Jessica Zhang <jesszhan0024@gmail.com>,\n David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,\n Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,\n Maxime Ripard <mripard@kernel.org>,\n Thomas Zimmermann <tzimmermann@suse.de>,\n Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n Cong Yang <yangcong5@huaqin.corp-partner.google.com>,\n Ondrej Jirman <megi@xff.cz>,\n Javier Martinez Canillas <javierm@redhat.com>,\n Jagan Teki <jagan@edgeble.ai>, Liam Girdwood <lgirdwood@gmail.com>,\n Mark Brown <broonie@kernel.org>, Linus Walleij <linusw@kernel.org>,\n Bartosz Golaszewski <brgl@kernel.org>,\n Jie Gan <jie.gan@oss.qualcomm.com>", "Cc": "dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,\n Riccardo Mereu <r.mereu@arduino.cc>", "X-Mailer": "b4 0.15.1", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=5137;\n i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id;\n bh=FkFZggJQ4487S25zzpLFnL1lJQsN5zZZyfnh6wkem6I=;\n b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ+adHxq2eeveiwqWcClanL2hcLHQrfJyBEPZ7hxZ4yPMC\n TWMQZc6GY1ZGBi5GGTFFFl8ClqmxmxKDvuwY2o9zCBWJpApDFycAjARAx72v0JxNX9C2ouXmS7p\n 80/WWq84y5Y3+fIxjuePXiVM/1uwPPzRvoTPCq/OXJ3m9D2JX+t+4EalHXZuK0I1KnJOTD0U0zt\n n86IkwRijIjeHlhzbnzfUjJxTTS/NPMG525fPb+an7RNmdLk0hvGdyF0WYFJg6f7sh3fACvWWfw\n 37zDbO0XLeUFOxoa3083Qp5XnMc3gr+3Y1XJPtdor+VWukev2D8SFvT+sVcw7KORcX71db/kt/q\n lbf1YywI84OsYVaKtm5HrqbszmP+HNofWD/prBr3pc/9UmvOwu6j6fsyD2WtObBSTEJ7Uf8bsza\n V29PPnZlQgGjwm3LW/eztCavCngv1NYvkZ++Yab/7V3FAA==", "X-Developer-Key": "i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp;\n fpr=8F88381DD5C873E4AE487DA5199BF1243632046A", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDEzMDEzOCBTYWx0ZWRfX7CHTnTT+iIm9\n mwlbkAxBdOkN6ywJ7ZJ5Yp4tIo47SNRQoaeQBrlODd/OVbgSIpTd19WwEHqtqXqXbSmds1rR1gX\n BvN/W4J7SdoA83PWYlsplytYzmxVwnnp4Z/cf0Ic8euGNGTb+afCy5vPMQh1pa6+xdq0hs7tZ/W\n 4cQj5WSnAyeHdmPyWP1ePxeK0BwZTDeyCIG7atvc7844HQOTS0zH95innAIcZxiFgFMZEWFFEex\n Cpeq1iXl40x2bhxq3rNdQKI2bO+BqUFsSJywZsaR6daGBlz04I2XJOJ7A+4EftsFz6rAi4+3J87\n 1PRul4rgxnsJ8MDdn+gfCbS+L9lipzNNzo7iWJ+PjYQSqcHIpktKpwp5PkjkbIir5WvcWGy9kla\n K93cqAQ1UuJfAhkwuC+09+CeLS0zBi6DTvDaY0QQEVETVtIij9oTKO30dw4s+/Xw3VLCXaCrL01\n BPAfm71bPUM1zwSA3HQ==", "X-Authority-Analysis": "v=2.4 cv=c/ibhx9l c=1 sm=1 tr=0 ts=69dcf849 cx=c_pps\n a=WJcna6AvsNCxL/DJwPP1KA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10\n a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8\n a=EUspDBNiAAAA:8 a=yD_1ZbJdsTQQo2FcdCwA:9 a=QEXdDO2ut3YA:10\n a=_Y9Zt4tPzoBS9L09Snn2:22", "X-Proofpoint-GUID": "83cuap3NATFIGfTiOi8f1Eh7Px657vtA", "X-Proofpoint-ORIG-GUID": "83cuap3NATFIGfTiOi8f1Eh7Px657vtA", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-13_03,2026-04-13_03,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 bulkscore=0 spamscore=0 adultscore=0 lowpriorityscore=0\n clxscore=1015 malwarescore=0 phishscore=0 suspectscore=0 impostorscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604130138" }, "content": "Several panels support attachment either using 4 DSI lanes or just 2. In\nsome cases, this requires a different panel mode to fulfill clock\nrequirements. Extend the driver to handle such cases by letting the\npanel description to omit lanes specification and parsing number of\nlanes from the DT.\n\nReviewed-by: Linus Walleij <linusw@kernel.org>\nTested-by: Riccardo Mereu <r.mereu@arduino.cc>\nSigned-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>\n---\n drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c | 46 +++++++++++++++++++-----\n 1 file changed, 37 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c\nindex 1884ad2404cd..796cc2368477 100644\n--- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c\n+++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c\n@@ -10,6 +10,7 @@\n \n #include <drm/drm_mipi_dsi.h>\n #include <drm/drm_modes.h>\n+#include <drm/drm_of.h>\n #include <drm/drm_panel.h>\n #include <drm/drm_print.h>\n #include <drm/drm_probe_helper.h>\n@@ -23,7 +24,8 @@\n struct jadard;\n \n struct jadard_panel_desc {\n-\tconst struct drm_display_mode mode;\n+\tconst struct drm_display_mode *mode_4ln;\n+\tconst struct drm_display_mode *mode_2ln;\n \tunsigned int lanes;\n \tenum mipi_dsi_pixel_format format;\n \tint (*init)(struct jadard *jadard);\n@@ -57,7 +59,10 @@ static void jadard_enable_standard_cmds(struct mipi_dsi_multi_context *dsi_ctx)\n \tmipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe1, 0x93);\n \tmipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe2, 0x65);\n \tmipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe3, 0xf8);\n-\tmipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03);\n+\tif (dsi_ctx->dsi->lanes == 2)\n+\t\tmipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x01);\n+\telse\n+\t\tmipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03);\n }\n \n static inline struct jadard *panel_to_jadard(struct drm_panel *panel)\n@@ -151,7 +156,10 @@ static int jadard_get_modes(struct drm_panel *panel,\n {\n \tstruct jadard *jadard = panel_to_jadard(panel);\n \n-\treturn drm_connector_helper_get_modes_fixed(connector, &jadard->desc->mode);\n+\tif (jadard->dsi->lanes == 2)\n+\t\treturn drm_connector_helper_get_modes_fixed(connector, jadard->desc->mode_2ln);\n+\telse\n+\t\treturn drm_connector_helper_get_modes_fixed(connector, jadard->desc->mode_4ln);\n }\n \n static enum drm_panel_orientation jadard_panel_get_orientation(struct drm_panel *panel)\n@@ -354,7 +362,7 @@ static int radxa_display_8hd_ad002_init_cmds(struct jadard *jadard)\n };\n \n static const struct jadard_panel_desc radxa_display_8hd_ad002_desc = {\n-\t.mode = {\n+\t.mode_4ln = &(const struct drm_display_mode) {\n \t\t.clock\t\t= 70000,\n \n \t\t.hdisplay\t= 800,\n@@ -586,7 +594,7 @@ static int cz101b4001_init_cmds(struct jadard *jadard)\n };\n \n static const struct jadard_panel_desc cz101b4001_desc = {\n-\t.mode = {\n+\t.mode_4ln = &(const struct drm_display_mode) {\n \t\t.clock\t\t= 70000,\n \n \t\t.hdisplay\t= 800,\n@@ -819,7 +827,7 @@ static int kingdisplay_kd101ne3_init_cmds(struct jadard *jadard)\n };\n \n static const struct jadard_panel_desc kingdisplay_kd101ne3_40ti_desc = {\n-\t.mode = {\n+\t.mode_4ln = &(const struct drm_display_mode) {\n \t\t.clock\t\t= (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,\n \n \t\t.hdisplay\t= 800,\n@@ -1070,7 +1078,7 @@ static int melfas_lmfbx101117480_init_cmds(struct jadard *jadard)\n };\n \n static const struct jadard_panel_desc melfas_lmfbx101117480_desc = {\n-\t.mode = {\n+\t.mode_4ln = &(const struct drm_display_mode) {\n \t\t.clock\t\t= (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,\n \n \t\t.hdisplay\t= 800,\n@@ -1326,7 +1334,7 @@ static int anbernic_rgds_init_cmds(struct jadard *jadard)\n };\n \n static const struct jadard_panel_desc anbernic_rgds_display_desc = {\n-\t.mode = {\n+\t.mode_4ln = &(const struct drm_display_mode) {\n \t\t.clock\t\t= (640 + 260 + 220 + 260) * (480 + 10 + 2 + 16) * 60 / 1000,\n \n \t\t.hdisplay\t= 640,\n@@ -1562,7 +1570,7 @@ static int taiguan_xti05101_01a_init_cmds(struct jadard *jadard)\n };\n \n static const struct jadard_panel_desc taiguan_xti05101_01a_desc = {\n-\t.mode = {\n+\t.mode_4ln = &(const struct drm_display_mode) {\n \t\t.clock\t\t= (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,\n \n \t\t.hdisplay\t= 800,\n@@ -1614,6 +1622,26 @@ static int jadard_dsi_probe(struct mipi_dsi_device *dsi)\n \n \tdsi->format = desc->format;\n \tdsi->lanes = desc->lanes;\n+\tif (!dsi->lanes) {\n+\t\tdsi->lanes = drm_of_get_data_lanes_count_remote(dsi->dev.of_node, 0, -1, 2, 4);\n+\t\tif (dsi->lanes < 0)\n+\t\t\treturn dsi->lanes;\n+\t\tif (dsi->lanes == 4) {\n+\t\t\tif (!desc->mode_4ln) {\n+\t\t\t\tdev_err(&dsi->dev, \"4-lane config is not supported\\n\");\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t} else if (dsi->lanes == 2) {\n+\t\t\tif (!desc->mode_2ln) {\n+\t\t\t\tdev_err(&dsi->dev, \"2-lane config is not supported\\n\");\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tdev_err(&dsi->dev, \"Unsupported number of lanes, %d\\n\", dsi->lanes);\n+\t\t\treturn -ENODEV;\n+\t\t}\n+\t}\n+\tdev_dbg(&dsi->dev, \"lanes: %d\\n\", dsi->lanes);\n \n \tjadard->reset = devm_gpiod_get(dev, \"reset\", GPIOD_OUT_HIGH);\n \tif (IS_ERR(jadard->reset))\n", "prefixes": [ "v3", "12/21" ] }