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GET /api/1.1/patches/2222707/?format=api
{ "id": 2222707, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2222707/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260413214549.926435-3-junjie.cao@intel.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260413214549.926435-3-junjie.cao@intel.com>", "date": "2026-04-13T21:45:47", "name": "[v3,2/4] io/channel: introduce qio_channel_pwrite{v,}_all()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d545118e3c435cf5dd4f0b34cf2564c9eaabc914", "submitter": { "id": 91537, "url": "http://patchwork.ozlabs.org/api/1.1/people/91537/?format=api", "name": "Junjie Cao", "email": "junjie.cao@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260413214549.926435-3-junjie.cao@intel.com/mbox/", "series": [ { "id": 499708, "url": "http://patchwork.ozlabs.org/api/1.1/series/499708/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499708", "date": "2026-04-13T21:45:46", "name": "io/channel: complete pread/pwrite_all API and fix multifd_file_recv_data", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/499708/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2222707/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2222707/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=lIcmUOZX;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvTGV0pTwz1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 13 Apr 2026 23:46:40 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wCHcS-00052V-TW; Mon, 13 Apr 2026 09:46:28 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <junjie.cao@intel.com>)\n id 1wCHcO-00050D-D0\n for qemu-devel@nongnu.org; Mon, 13 Apr 2026 09:46:26 -0400", "from mgamail.intel.com ([198.175.65.14])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <junjie.cao@intel.com>)\n id 1wCHcM-0002Fp-9e\n for qemu-devel@nongnu.org; Mon, 13 Apr 2026 09:46:24 -0400", "from orviesa005.jf.intel.com ([10.64.159.145])\n by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Apr 2026 06:46:21 -0700", "from junjie-optiplex-micro-plus-7010.bj.intel.com ([10.238.152.98])\n by orviesa005-auth.jf.intel.com with\n ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2026 06:46:20 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1776087982; x=1807623982;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=folrTF5beoC9lFULQ16CJB+/2zzJLPZS9SYdJ6UdO6M=;\n b=lIcmUOZXkcZjJ66AXInKSDtd03RcubRXn3UrEk3i9BVZWLZPI9JvF+jK\n 1rMOmtSIPdm28ao4bBdgOQJMMrbu7JKZG0gPDG3Kys70BLHcw2ZP53R4i\n jBbOg9EL3ps71EL7x/XqmzMSxJsBXtjqUh6L6bDIcdUmCtXOaP+AJXQtu\n /NxV7VUIl4xPyBVmddjVCTYQszWjg8wuC6EMt1QeOImsc4LrZsXQSww09\n T6ct9b1jtphqAVce8WwRS4nfl0joVqQVRvnHNgVDA/EmNqcVxX0D6tTtZ\n V2mONT86sn4LXsV3+OdJEWvzro/bfiA3C0L8A4SjbK/gy+A0bxoIJBf5B A==;", "X-CSE-ConnectionGUID": [ "1dtrLPWRRWqWSM3XDMuOZQ==", "Fy0io/UwR3KsF7LqnGC31A==" ], "X-CSE-MsgGUID": [ "DgEqc80fThWhN714Xoapmg==", "JUj+E3HsQ4qFcRY37r6ppg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11758\"; a=\"80885643\"", "E=Sophos;i=\"6.23,177,1770624000\"; d=\"scan'208\";a=\"80885643\"", "E=Sophos;i=\"6.23,177,1770624000\"; d=\"scan'208\";a=\"234770409\"" ], "X-ExtLoop1": "1", "From": "Junjie Cao <junjie.cao@intel.com>", "To": "qemu-devel@nongnu.org", "Cc": "berrange@redhat.com, peterx@redhat.com, farosas@suse.de,\n junjie.cao@intel.com", "Subject": "[PATCH v3 2/4] io/channel: introduce qio_channel_pwrite{v,}_all()", "Date": "Tue, 14 Apr 2026 05:45:47 +0800", "Message-ID": "<20260413214549.926435-3-junjie.cao@intel.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260413214549.926435-1-junjie.cao@intel.com>", "References": "<20260413214549.926435-1-junjie.cao@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=198.175.65.14;\n envelope-from=junjie.cao@intel.com;\n helo=mgamail.intel.com", "X-Spam_score_int": "-29", "X-Spam_score": "-3.0", "X-Spam_bar": "---", "X-Spam_report": "(-3.0 / 5.0 requ) BAYES_00=-1.9, DATE_IN_FUTURE_06_12=1.947,\n DKIMWL_WL_HIGH=-0.54, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1,\n DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Add positioned write helpers that retry on short writes, matching\nthe pread_all family from the previous patch.\n\n qio_channel_pwritev_all() -- retry loop; returns 0 on success,\n -1 on error.\n qio_channel_pwrite_all() -- single-buffer convenience wrapper.\n\nSigned-off-by: Junjie Cao <junjie.cao@intel.com>\n---\n include/io/channel.h | 41 +++++++++++++++++++++++++++++++++++++\n io/channel.c | 48 ++++++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 89 insertions(+)", "diff": "diff --git a/include/io/channel.h b/include/io/channel.h\nindex 47af409ede..287d10cd6f 100644\n--- a/include/io/channel.h\n+++ b/include/io/channel.h\n@@ -598,6 +598,47 @@ ssize_t qio_channel_pwritev(QIOChannel *ioc, const struct iovec *iov,\n ssize_t qio_channel_pwrite(QIOChannel *ioc, void *buf, size_t buflen,\n off_t offset, Error **errp);\n \n+/**\n+ * qio_channel_pwritev_all:\n+ * @ioc: the channel object\n+ * @iov: the array of memory regions to write data from\n+ * @niov: the length of the @iov array\n+ * @offset: the starting offset in the channel to write to\n+ * @errp: pointer to a NULL-initialized error object\n+ *\n+ * Writes @iov, possibly blocking or (if the channel is non-blocking)\n+ * yielding from the current coroutine multiple times until the entire\n+ * content is written. Otherwise behaves as qio_channel_pwritev().\n+ *\n+ * Returns: 0 if all bytes were written, or -1 on error\n+ */\n+int coroutine_mixed_fn qio_channel_pwritev_all(QIOChannel *ioc,\n+ const struct iovec *iov,\n+ size_t niov,\n+ off_t offset,\n+ Error **errp);\n+\n+/**\n+ * qio_channel_pwrite_all:\n+ * @ioc: the channel object\n+ * @buf: the memory region to write data from\n+ * @buflen: the number of bytes to write from @buf\n+ * @offset: the starting offset in the channel to write to\n+ * @errp: pointer to a NULL-initialized error object\n+ *\n+ * Writes @buflen bytes from @buf, possibly blocking or (if the\n+ * channel is non-blocking) yielding from the current coroutine\n+ * multiple times until the entire content is written. Otherwise\n+ * behaves as qio_channel_pwrite().\n+ *\n+ * Returns: 0 if all bytes were written, or -1 on error\n+ */\n+int coroutine_mixed_fn qio_channel_pwrite_all(QIOChannel *ioc,\n+ const void *buf,\n+ size_t buflen,\n+ off_t offset,\n+ Error **errp);\n+\n /**\n * qio_channel_preadv\n * @ioc: the channel object\ndiff --git a/io/channel.c b/io/channel.c\nindex 52c1abfcbc..2853dadb68 100644\n--- a/io/channel.c\n+++ b/io/channel.c\n@@ -478,6 +478,54 @@ ssize_t qio_channel_pwrite(QIOChannel *ioc, void *buf, size_t buflen,\n return qio_channel_pwritev(ioc, &iov, 1, offset, errp);\n }\n \n+int coroutine_mixed_fn qio_channel_pwritev_all(QIOChannel *ioc,\n+ const struct iovec *iov,\n+ size_t niov,\n+ off_t offset,\n+ Error **errp)\n+{\n+ int ret = -1;\n+ struct iovec *local_iov = g_new(struct iovec, niov);\n+ struct iovec *local_iov_head = local_iov;\n+ unsigned int nlocal_iov = niov;\n+\n+ nlocal_iov = iov_copy(local_iov, nlocal_iov,\n+ iov, niov,\n+ 0, iov_size(iov, niov));\n+\n+ while (nlocal_iov > 0) {\n+ ssize_t len;\n+\n+ len = qio_channel_pwritev(ioc, local_iov, nlocal_iov, offset, errp);\n+\n+ if (len == QIO_CHANNEL_ERR_BLOCK) {\n+ qio_channel_wait_cond(ioc, G_IO_OUT);\n+ continue;\n+ }\n+ if (len < 0) {\n+ goto cleanup;\n+ }\n+\n+ offset += len;\n+ iov_discard_front(&local_iov, &nlocal_iov, len);\n+ }\n+\n+ ret = 0;\n+ cleanup:\n+ g_free(local_iov_head);\n+ return ret;\n+}\n+\n+int coroutine_mixed_fn qio_channel_pwrite_all(QIOChannel *ioc,\n+ const void *buf,\n+ size_t buflen,\n+ off_t offset,\n+ Error **errp)\n+{\n+ struct iovec iov = { .iov_base = (char *)buf, .iov_len = buflen };\n+ return qio_channel_pwritev_all(ioc, &iov, 1, offset, errp);\n+}\n+\n ssize_t qio_channel_preadv(QIOChannel *ioc, const struct iovec *iov,\n size_t niov, off_t offset, Error **errp)\n {\n", "prefixes": [ "v3", "2/4" ] }