get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/1.1/patches/2222277/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2222277,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2222277/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260411043051.174309-1-rosenp@gmail.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260411043051.174309-1-rosenp@gmail.com>",
    "date": "2026-04-11T04:30:51",
    "name": "PCI: mvebu: allocate ports with pcie struct",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "abc9d829547695b4951918025bc8167bdc8163e4",
    "submitter": {
        "id": 70304,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/70304/?format=api",
        "name": "Rosen Penev",
        "email": "rosenp@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260411043051.174309-1-rosenp@gmail.com/mbox/",
    "series": [
        {
            "id": 499529,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/499529/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=499529",
            "date": "2026-04-11T04:30:51",
            "name": "PCI: mvebu: allocate ports with pcie struct",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/499529/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2222277/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2222277/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-52366-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=EDKfRRC7;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-52366-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"EDKfRRC7\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.216.47",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ft12b3zmCz1yCx\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 11 Apr 2026 14:31:19 +1000 (AEST)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id A0B6630315F6\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 11 Apr 2026 04:31:12 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6F3B12E92D2;\n\tSat, 11 Apr 2026 04:31:11 +0000 (UTC)",
            "from mail-pj1-f47.google.com (mail-pj1-f47.google.com\n [209.85.216.47])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 415C52D0602\n\tfor <linux-pci@vger.kernel.org>; Sat, 11 Apr 2026 04:31:10 +0000 (UTC)",
            "by mail-pj1-f47.google.com with SMTP id\n 98e67ed59e1d1-35da2d35eccso2137262a91.0\n        for <linux-pci@vger.kernel.org>; Fri, 10 Apr 2026 21:31:10 -0700 (PDT)",
            "from ryzen ([2601:644:8000:5b5d::8bd])\n        by smtp.gmail.com with ESMTPSA id\n 98e67ed59e1d1-35e3512f27asm8038120a91.10.2026.04.10.21.31.08\n        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n        Fri, 10 Apr 2026 21:31:08 -0700 (PDT)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775881871; cv=none;\n b=lUnP0DDnQtKnEfQCHzHvm2H1rbGiM3OSh3wD5L3oyO/E9yYKxgIMMCadNjt7W52uPsKcwE8ZKQAmmpCf8xx+i38sbxuPkDMdGYewDvIeDRL3mryl28ZVF7xXzvqHb0TgZN/kbj4GK8ShnUOEJ1YEyuW2RFqLoxfUP+Uib8J/CUY=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775881871; c=relaxed/simple;\n\tbh=rbUVWUb0Jq6cPmVmgVEV+mE+Ap478DVsTL2CSDpobZQ=;\n\th=From:To:Cc:Subject:Date:Message-ID:MIME-Version;\n b=T4EiczuGR1NoT8ZOsUEMgnA2aNWEWmuJYXm6Mh6k0DwT+rgTDVhf2bCYUmqHDJ39TmoFddh2D9QgSTMLM+dc+9aL5G9dgG7n/j2hc33rhxab88XH++hXIic+Tx0fDwXIEgLXfQupExF6R8Jm72fpZEZgbhi2R3RsSZeGVwcro3c=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=EDKfRRC7; arc=none smtp.client-ip=209.85.216.47",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=gmail.com; s=20251104; t=1775881869; x=1776486669;\n darn=vger.kernel.org;\n        h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n         :to:from:from:to:cc:subject:date:message-id:reply-to;\n        bh=BD+xwKu/bN5/gMMBjSUYvF/EGDAVlZJDs5yWBOqQPgU=;\n        b=EDKfRRC7959g4/kNN7nuhw4PvVZNGdBq8gQ4S+m6N6Wkr6132V8SOOQeuV2U1bBQt0\n         h4gb6pr2P+9iBf4H4GgxlT9KKY9IQLRjJrDbK4JL1GU4GXgO3anLY2iBdeqQX5TASdoH\n         rZWYwX01GGTUHUsDASBzgw0o+R4/R3oOTNjUoDfvIvwuhLzq4bdzO6IFPUQsdQwbnzcZ\n         RAtlw+5AG/QoHDfj/HyxQ8/4ucGIvRjsCIBuLuQWMiz6CCRAbsrjZp6uLbny/xLOYyia\n         tMJHL2A/r0zcjGdknVTIF+081F0Dd6xlv/Xf5IoR6LsyZlbaRqOaHyZswCuEoYEhJ6Y3\n         Nnww==",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20251104; t=1775881869; x=1776486669;\n        h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n         :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=BD+xwKu/bN5/gMMBjSUYvF/EGDAVlZJDs5yWBOqQPgU=;\n        b=eDHfy7DU6dNVkL8VDViSgWCs0UXZftUMI6jXAGLowJxOCla4yYKQ2xn7MP/cS4pyNl\n         ufKfY3j34HkoIevUEgmk5Sug2Z16exEZLkX4KqXH9rjOGwUjLlTJbSbnTdC5aw/moAlV\n         dBECvWfQXFBrvcHKLIPvKqv5xSRmOSr80aAFtrSgWIAiDTHFp4brIy77C5eFeUUE8brL\n         9iG7Fm7j7w3OD609amXOZ/yhm6vGuvK66IeWrJeYfyTNjkuvRq4vk/cnC++9EqGX1fDd\n         9G1boYJqAm/NYMo+jSM7bhppHAhAe4pC57OaON08zRSywFhlDBeR4oZXb7zDvQRn2Kdk\n         WFZw==",
        "X-Gm-Message-State": "AOJu0Yz0UsSVrXv19GJmWWFwug63wdgV0qaPtTtva5x8E4XldZDHUMwR\n\t/6jGQY/Iy+Rh0UibUSNp1pHe5J2pC24QHzdIpqu0zeGB+NyVdqFfRpG0blUr3cJ4",
        "X-Gm-Gg": "AeBDieueqrw5xCnVvnJt8IFjwCWu93RdxR2UV0nVRkeY8A82r+7p+OenNnGqgyThdw3\n\t2z9FaDxY3RKkWLu2ewb04Vo52iw/x7Rcat76XzbjRfJddTf00Ph2wUqTo2Cg5XW5/4t/7ZDvOIO\n\t29Veh4BfgBVV+ANTJnyRbby0hppN4fKZrHScL09+q2tlsb3DrmvRmpMZqYuS1gCSybXRRBMhN2j\n\t3Ob1h5hsjAEt3we2vsl/TOoytgynaJByPdtGuWv3GrPHnxMRtuYBQzKHHm4tp764AP6SB7O/2LC\n\tn63mWrCWhPA8gXk1l1T6CXF375hEvENx9zJPmTLIhG4qAHYebxFDrxHUuxP0mVlZTC+HPUWEkOO\n\tVySoP47ps41pCGeRRDxUir80ij4uOmQSA9XafUqv5E1UprAMmbItEJmJuhgY38QL1fceX53YXmI\n\tMRV3Y9+C19W4UZVscgFl37mtPSRVaMNWv9K/hGEHW78Qqi+J4IoFdP7N4=",
        "X-Received": "by 2002:a17:90a:dfc7:b0:35b:e52a:6fe5 with SMTP id\n 98e67ed59e1d1-35e4274e358mr5585311a91.5.1775881869282;\n        Fri, 10 Apr 2026 21:31:09 -0700 (PDT)",
        "From": "Rosen Penev <rosenp@gmail.com>",
        "To": "linux-pci@vger.kernel.org",
        "Cc": "Thomas Petazzoni <thomas.petazzoni@bootlin.com>, =?utf-8?q?Pali_Roh?=\n\t=?utf-8?q?=C3=A1r?= <pali@kernel.org>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Kees Cook <kees@kernel.org>,\n \"Gustavo A. R. Silva\" <gustavoars@kernel.org>,\n linux-arm-kernel@lists.infradead.org (moderated list:PCI DRIVER FOR MVEBU\n (Marvell Armada 370 and Ar...), linux-kernel@vger.kernel.org (open list),\n linux-hardening@vger.kernel.org (open list:KERNEL HARDENING (not covered by\n other areas):Keyword:\\b__counted_by(_le|_be)?\\b)",
        "Subject": "[PATCH] PCI: mvebu: allocate ports with pcie struct",
        "Date": "Fri, 10 Apr 2026 21:30:51 -0700",
        "Message-ID": "<20260411043051.174309-1-rosenp@gmail.com>",
        "X-Mailer": "git-send-email 2.53.0",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit"
    },
    "content": "Use a flexible array member to combine allocations and simplify\nslightly.\n\nAdd __counted_by for extra runtime analysis.\n\nNeeded to move mvebu_pcie struct below others as flexible array members\nrequire full definitions.\n\nSigned-off-by: Rosen Penev <rosenp@gmail.com>\n---\n drivers/pci/controller/pci-mvebu.c | 33 ++++++++++++------------------\n 1 file changed, 13 insertions(+), 20 deletions(-)",
    "diff": "diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c\nindex a72aa57591c0..dea50f6e88be 100644\n--- a/drivers/pci/controller/pci-mvebu.c\n+++ b/drivers/pci/controller/pci-mvebu.c\n@@ -78,18 +78,6 @@\n #define PCIE_DEBUG_CTRL         0x1a60\n #define  PCIE_DEBUG_SOFT_RESET\t\tBIT(20)\n \n-struct mvebu_pcie_port;\n-\n-/* Structure representing all PCIe interfaces */\n-struct mvebu_pcie {\n-\tstruct platform_device *pdev;\n-\tstruct mvebu_pcie_port *ports;\n-\tstruct resource io;\n-\tstruct resource realio;\n-\tstruct resource mem;\n-\tint nports;\n-};\n-\n struct mvebu_pcie_window {\n \tphys_addr_t base;\n \tphys_addr_t remap;\n@@ -125,6 +113,16 @@ struct mvebu_pcie_port {\n \tint intx_irq;\n };\n \n+/* Structure representing all PCIe interfaces */\n+struct mvebu_pcie {\n+\tstruct platform_device *pdev;\n+\tstruct resource io;\n+\tstruct resource realio;\n+\tstruct resource mem;\n+\tint nports;\n+\tstruct mvebu_pcie_port ports[] __counted_by(nports);\n+};\n+\n static inline void mvebu_writel(struct mvebu_pcie_port *port, u32 val, u32 reg)\n {\n \twritel(val, port->base + reg);\n@@ -1455,11 +1453,13 @@ static int mvebu_pcie_probe(struct platform_device *pdev)\n \tstruct device_node *child;\n \tint num, i, ret;\n \n-\tbridge = devm_pci_alloc_host_bridge(dev, sizeof(struct mvebu_pcie));\n+\tnum = of_get_available_child_count(np);\n+\tbridge = devm_pci_alloc_host_bridge(dev, struct_size(pcie, ports, num));\n \tif (!bridge)\n \t\treturn -ENOMEM;\n \n \tpcie = pci_host_bridge_priv(bridge);\n+\tpcie->nports = num;\n \tpcie->pdev = pdev;\n \tplatform_set_drvdata(pdev, pcie);\n \n@@ -1467,12 +1467,6 @@ static int mvebu_pcie_probe(struct platform_device *pdev)\n \tif (ret)\n \t\treturn ret;\n \n-\tnum = of_get_available_child_count(np);\n-\n-\tpcie->ports = devm_kcalloc(dev, num, sizeof(*pcie->ports), GFP_KERNEL);\n-\tif (!pcie->ports)\n-\t\treturn -ENOMEM;\n-\n \ti = 0;\n \tfor_each_available_child_of_node(np, child) {\n \t\tstruct mvebu_pcie_port *port = &pcie->ports[i];\n@@ -1488,7 +1482,6 @@ static int mvebu_pcie_probe(struct platform_device *pdev)\n \t\tport->dn = child;\n \t\ti++;\n \t}\n-\tpcie->nports = i;\n \n \tfor (i = 0; i < pcie->nports; i++) {\n \t\tstruct mvebu_pcie_port *port = &pcie->ports[i];\n",
    "prefixes": []
}