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GET /api/1.1/patches/2222206/?format=api
{ "id": 2222206, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2222206/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260410200628.19378-4-philmd@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260410200628.19378-4-philmd@linaro.org>", "date": "2026-04-10T20:06:22", "name": "[3/9] target/arm: Conceal MO_TE within mve_advance_vpt()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "25f83e45b03dde1910dd639410df0591d698e2fd", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/1.1/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260410200628.19378-4-philmd@linaro.org/mbox/", "series": [ { "id": 499501, "url": "http://patchwork.ozlabs.org/api/1.1/series/499501/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499501", "date": "2026-04-10T20:06:19", "name": "target/arm: Remove MO_TE to compile MVE/M helpers once", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499501/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2222206/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2222206/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=bUocy3Hu;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::32d;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n target/arm/tcg/mve_helper.c | 20 +++++++++++---------\n 1 file changed, 11 insertions(+), 9 deletions(-)", "diff": "diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c\nindex cc58e0502f5..fbb64889bf7 100644\n--- a/target/arm/tcg/mve_helper.c\n+++ b/target/arm/tcg/mve_helper.c\n@@ -160,7 +160,8 @@ static void mve_advance_vpt(CPUARMState *env)\n uint16_t eci_mask = mve_eci_mask(env); \\\n unsigned b, e; \\\n int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \\\n- MemOpIdx oi = make_memop_idx(MFLAG | MO_ALIGN, mmu_idx); \\\n+ MemOpIdx oi = make_memop_idx(MO_TE | MFLAG | MO_ALIGN, \\\n+ mmu_idx); \\\n /* \\\n * R_SXTM allows the dest reg to become UNKNOWN for abandoned \\\n * beats so we don't care if we update part of the dest and \\\n@@ -183,7 +184,8 @@ static void mve_advance_vpt(CPUARMState *env)\n uint16_t mask = mve_element_mask(env); \\\n unsigned b, e; \\\n int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \\\n- MemOpIdx oi = make_memop_idx(MFLAG | MO_ALIGN, mmu_idx); \\\n+ MemOpIdx oi = make_memop_idx(MO_TE | MFLAG | MO_ALIGN, \\\n+ mmu_idx); \\\n for (b = 0, e = 0; b < 16; b += ESIZE, e++) { \\\n if (mask & (1 << b)) { \\\n cpu_##STTYPE##_mmu(env, addr, d[H##ESIZE(e)], oi, GETPC()); \\\n@@ -194,23 +196,23 @@ static void mve_advance_vpt(CPUARMState *env)\n }\n \n DO_VLDR(vldrb, MO_UB, 1, uint8_t, ldb, 1, uint8_t)\n-DO_VLDR(vldrh, MO_TE | MO_UW, 2, uint16_t, ldw, 2, uint16_t)\n-DO_VLDR(vldrw, MO_TE | MO_UL, 4, uint32_t, ldl, 4, uint32_t)\n+DO_VLDR(vldrh, MO_UW, 2, uint16_t, ldw, 2, uint16_t)\n+DO_VLDR(vldrw, MO_UL, 4, uint32_t, ldl, 4, uint32_t)\n \n DO_VSTR(vstrb, MO_UB, 1, stb, 1, uint8_t)\n-DO_VSTR(vstrh, MO_TE | MO_UW, 2, stw, 2, uint16_t)\n-DO_VSTR(vstrw, MO_TE | MO_UL, 4, stl, 4, uint32_t)\n+DO_VSTR(vstrh, MO_UW, 2, stw, 2, uint16_t)\n+DO_VSTR(vstrw, MO_UL, 4, stl, 4, uint32_t)\n \n DO_VLDR(vldrb_sh, MO_SB, 1, int8_t, ldb, 2, int16_t)\n DO_VLDR(vldrb_sw, MO_SB, 1, int8_t, ldb, 4, int32_t)\n DO_VLDR(vldrb_uh, MO_UB, 1, uint8_t, ldb, 2, uint16_t)\n DO_VLDR(vldrb_uw, MO_UB, 1, uint8_t, ldb, 4, uint32_t)\n-DO_VLDR(vldrh_sw, MO_TE | MO_SW, 2, int16_t, ldw, 4, int32_t)\n-DO_VLDR(vldrh_uw, MO_TE | MO_UW, 2, uint16_t, ldw, 4, uint32_t)\n+DO_VLDR(vldrh_sw, MO_SW, 2, int16_t, ldw, 4, int32_t)\n+DO_VLDR(vldrh_uw, MO_UW, 2, uint16_t, ldw, 4, uint32_t)\n \n DO_VSTR(vstrb_h, MO_UB, 1, stb, 2, int16_t)\n DO_VSTR(vstrb_w, MO_UB, 1, stb, 4, int32_t)\n-DO_VSTR(vstrh_w, MO_TE | MO_UW, 2, stw, 4, int32_t)\n+DO_VSTR(vstrh_w, MO_UW, 2, stw, 4, int32_t)\n \n #undef DO_VLDR\n #undef DO_VSTR\n", "prefixes": [ "3/9" ] }