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GET /api/1.1/patches/2221627/?format=api
{ "id": 2221627, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2221627/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260410020012.98778-1-james.hilliard1@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260410020012.98778-1-james.hilliard1@gmail.com>", "date": "2026-04-10T02:00:12", "name": "[v2,1/1] linux-user/mips: sync k0 TLS for EF_MIPS_MACH_OCTEON userlands", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e9f330539deda739bfafde3b574d406b6084057d", "submitter": { "id": 66301, "url": "http://patchwork.ozlabs.org/api/1.1/people/66301/?format=api", "name": "James Hilliard", "email": "james.hilliard1@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260410020012.98778-1-james.hilliard1@gmail.com/mbox/", "series": [ { "id": 499378, "url": "http://patchwork.ozlabs.org/api/1.1/series/499378/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499378", "date": "2026-04-10T02:00:12", "name": "[v2,1/1] linux-user/mips: sync k0 TLS for EF_MIPS_MACH_OCTEON userlands", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/499378/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221627/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221627/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=KNZXGOSR;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-oi1-x232.google.com", "X-Spam_score_int": "-17", "X-Spam_score": "-1.8", "X-Spam_bar": "-", "X-Spam_report": "(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Cavium Octeon userspace is not following a generic MIPS Linux TLS\nABI rule here. Older Octeon glibc uses the k0 register as the fast\nthread pointer, while newer Octeon2 and Octeon3 glibc variants use\nthe normal rdhwr $29 path.\n\nlinux-user already updates CP0_UserLocal for cpu_set_tls() and\nTARGET_NR_set_thread_area, but it does not keep gpr[26]\nsynchronized. That leaves EF_MIPS_MACH_OCTEON userlands able to\ncomplete set_thread_area() and still reach pthread startup or\npthread_self() with a stale k0 value.\n\nUse the existing MIPS ELF machine flags from linux-user/elfload.c and\nmirror CP0_UserLocal into gpr[26] only for EF_MIPS_MACH_OCTEON.\n\nSigned-off-by: James Hilliard <james.hilliard1@gmail.com>\n---\nChanges v1 -> v2:\n - only enable on EF_MIPS_MACH_OCTEON\n---\n linux-user/elfload.c | 3 +++\n linux-user/mips/target_cpu.h | 5 +++++\n linux-user/qemu.h | 1 +\n linux-user/syscall.c | 2 +-\n 4 files changed, 10 insertions(+), 1 deletion(-)", "diff": "diff --git a/linux-user/elfload.c b/linux-user/elfload.c\nindex 59b543f740..0e757787d2 100644\n--- a/linux-user/elfload.c\n+++ b/linux-user/elfload.c\n@@ -1476,6 +1476,9 @@ static void load_elf_image(const char *image_name, const ImageSource *src,\n /* Usual start for brk is after all sections of the main executable. */\n info->brk = TARGET_PAGE_ALIGN(hiaddr + load_bias);\n info->elf_flags = ehdr->e_flags;\n+#ifdef TARGET_MIPS\n+ info->use_k0_tls = (ehdr->e_flags & EF_MIPS_MACH) == EF_MIPS_MACH_OCTEON;\n+#endif\n \n prot_exec = PROT_EXEC;\n #ifdef TARGET_AARCH64\ndiff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h\nindex c375616c55..2bbd0a81c5 100644\n--- a/linux-user/mips/target_cpu.h\n+++ b/linux-user/mips/target_cpu.h\n@@ -35,7 +35,12 @@ static inline void cpu_clone_regs_parent(CPUMIPSState *env, unsigned flags)\n \n static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls)\n {\n+ TaskState *ts = get_task_state(env_cpu(env));\n+\n env->active_tc.CP0_UserLocal = newtls;\n+ if (ts->info->use_k0_tls) {\n+ env->active_tc.gpr[26] = newtls;\n+ }\n }\n \n static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state)\ndiff --git a/linux-user/qemu.h b/linux-user/qemu.h\nindex cfe5f45fc4..7f98fb2607 100644\n--- a/linux-user/qemu.h\n+++ b/linux-user/qemu.h\n@@ -65,6 +65,7 @@ struct image_info {\n uint32_t note_flags;\n \n #ifdef TARGET_MIPS\n+ bool use_k0_tls;\n int fp_abi;\n int interp_fp_abi;\n #endif\ndiff --git a/linux-user/syscall.c b/linux-user/syscall.c\nindex f4b74ad350..8e96cc26db 100644\n--- a/linux-user/syscall.c\n+++ b/linux-user/syscall.c\n@@ -13216,7 +13216,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,\n #ifdef TARGET_NR_set_thread_area\n case TARGET_NR_set_thread_area:\n #if defined(TARGET_MIPS)\n- cpu_env->active_tc.CP0_UserLocal = arg1;\n+ cpu_set_tls(cpu_env, arg1);\n return 0;\n #elif defined(TARGET_I386) && defined(TARGET_ABI32)\n return do_set_thread_area(cpu_env, arg1);\n", "prefixes": [ "v2", "1/1" ] }