get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/1.1/patches/2221606/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2221606,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2221606/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260409235122.436749-2-grzegorz.nitka@intel.com/",
    "project": {
        "id": 46,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/46/?format=api",
        "name": "Intel Wired Ethernet development",
        "link_name": "intel-wired-lan",
        "list_id": "intel-wired-lan.osuosl.org",
        "list_email": "intel-wired-lan@osuosl.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260409235122.436749-2-grzegorz.nitka@intel.com>",
    "date": "2026-04-09T23:51:15",
    "name": "[v6,net-next,1/8] dpll: add new DPLL type for transmit clock (TXC) usage",
    "commit_ref": null,
    "pull_url": null,
    "state": "handled-elsewhere",
    "archived": false,
    "hash": "c799b3e36f5ad318cbacf048a4e2341f7804ed00",
    "submitter": {
        "id": 82711,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/82711/?format=api",
        "name": "Nitka, Grzegorz",
        "email": "grzegorz.nitka@intel.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260409235122.436749-2-grzegorz.nitka@intel.com/mbox/",
    "series": [
        {
            "id": 499370,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/499370/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=499370",
            "date": "2026-04-09T23:51:14",
            "name": "dpll/ice: Add TXC DPLL type and full TX reference clock control for E825",
            "version": 6,
            "mbox": "http://patchwork.ozlabs.org/series/499370/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2221606/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2221606/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "<intel-wired-lan-bounces@osuosl.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "intel-wired-lan@lists.osuosl.org"
        ],
        "Delivered-To": [
            "patchwork-incoming@legolas.ozlabs.org",
            "intel-wired-lan@lists.osuosl.org"
        ],
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=Z+eZUo4j;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.136; helo=smtp3.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=patchwork.ozlabs.org)"
        ],
        "Received": [
            "from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fsGyX21yVz1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Apr 2026 09:55:16 +1000 (AEST)",
            "from localhost (localhost [127.0.0.1])\n\tby smtp3.osuosl.org (Postfix) with ESMTP id B8D2560B6D;\n\tThu,  9 Apr 2026 23:55:13 +0000 (UTC)",
            "from smtp3.osuosl.org ([127.0.0.1])\n by localhost (smtp3.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id jLSd5uWohSRo; Thu,  9 Apr 2026 23:55:13 +0000 (UTC)",
            "from lists1.osuosl.org (lists1.osuosl.org [140.211.166.142])\n\tby smtp3.osuosl.org (Postfix) with ESMTP id E7A2A60674;\n\tThu,  9 Apr 2026 23:55:12 +0000 (UTC)",
            "from smtp1.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n by lists1.osuosl.org (Postfix) with ESMTP id 75137237\n for <intel-wired-lan@lists.osuosl.org>; Thu,  9 Apr 2026 23:55:11 +0000 (UTC)",
            "from localhost (localhost [127.0.0.1])\n by smtp1.osuosl.org (Postfix) with ESMTP id 5AB8880A8A\n for <intel-wired-lan@lists.osuosl.org>; Thu,  9 Apr 2026 23:55:11 +0000 (UTC)",
            "from smtp1.osuosl.org ([127.0.0.1])\n by localhost (smtp1.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id XJmjYXjJq5Ug for <intel-wired-lan@lists.osuosl.org>;\n Thu,  9 Apr 2026 23:55:10 +0000 (UTC)",
            "from mgamail.intel.com (mgamail.intel.com [192.198.163.11])\n by smtp1.osuosl.org (Postfix) with ESMTPS id 5B2C080A55\n for <intel-wired-lan@lists.osuosl.org>; Thu,  9 Apr 2026 23:55:10 +0000 (UTC)",
            "from orviesa008.jf.intel.com ([10.64.159.148])\n by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Apr 2026 16:55:10 -0700",
            "from gklab-003-001.igk.intel.com ([10.91.173.48])\n by orviesa008.jf.intel.com with ESMTP; 09 Apr 2026 16:55:06 -0700"
        ],
        "X-Virus-Scanned": [
            "amavis at osuosl.org",
            "amavis at osuosl.org"
        ],
        "X-Comment": "SPF check N/A for local connections - client-ip=140.211.166.142;\n helo=lists1.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=<UNKNOWN> ",
        "DKIM-Filter": [
            "OpenDKIM Filter v2.11.0 smtp3.osuosl.org E7A2A60674",
            "OpenDKIM Filter v2.11.0 smtp1.osuosl.org 5B2C080A55"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=osuosl.org;\n\ts=default; t=1775778913;\n\tbh=SF1r8rOhaK4S1MYNvNbUxXs8DuzMEFbLpjmPxstdVAc=;\n\th=From:To:Date:In-Reply-To:References:Subject:List-Id:\n\t List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe:\n\t Cc:From;\n\tb=Z+eZUo4jPsdfFUhdPEbK/StIib2OO/wW87xtE/KG+lPSojvMUzWqlHeWWgGWJUzUH\n\t qfYK0NvXyM/+dWtPDQjHDgyGH7d56gv9JdQUYlY567HMLF6uJZAivsna6UOj7YKT5z\n\t pCPgs2xpl2ukKktDoYibds8wpdk5GuhMbUDyOfUQXhYm+n+nUrAwdMZUF/fccZDmTF\n\t h5MCsel8VY95VmiklnFqzc/E/0XKqD5MqVupSbKQLp4alksL32Jj5j7z64AtriwGE2\n\t 4bVe3RfRtNIqEVzjifYRzGOK9E1Oz3K2hsrNKeKm7aeW0zUXT2wColKHK2qD+zBwph\n\t 3nRdNzRZDvPdw==",
        "Received-SPF": "Pass (mailfrom) identity=mailfrom; client-ip=192.198.163.11;\n helo=mgamail.intel.com; envelope-from=grzegorz.nitka@intel.com;\n receiver=<UNKNOWN>",
        "DMARC-Filter": "OpenDMARC Filter v1.4.2 smtp1.osuosl.org 5B2C080A55",
        "X-CSE-ConnectionGUID": [
            "jIdTPuu6R12IQJs2W0bMeA==",
            "S7vgBXxrSfe0xids/UhARw=="
        ],
        "X-CSE-MsgGUID": [
            "B0VJcEdmQeajHcDIhlKNrg==",
            "1YxCmhM5SWSQfsKWgBcFqQ=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6800,10657,11754\"; a=\"87424036\"",
            "E=Sophos;i=\"6.23,170,1770624000\"; d=\"scan'208\";a=\"87424036\"",
            "E=Sophos;i=\"6.23,170,1770624000\"; d=\"scan'208\";a=\"228859705\""
        ],
        "X-ExtLoop1": "1",
        "From": "Grzegorz Nitka <grzegorz.nitka@intel.com>",
        "To": "netdev@vger.kernel.org",
        "Date": "Fri, 10 Apr 2026 01:51:15 +0200",
        "Message-Id": "<20260409235122.436749-2-grzegorz.nitka@intel.com>",
        "X-Mailer": "git-send-email 2.39.3",
        "In-Reply-To": "<20260409235122.436749-1-grzegorz.nitka@intel.com>",
        "References": "<20260409235122.436749-1-grzegorz.nitka@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775778911; x=1807314911;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=C5JnC501kAXn3wVLgMrthehP/YSXfC3I237eaYYXsTU=;\n b=KhcBe+NZn+6mJL0+zPhYL72L5XWhREXHgqCKi5vXQ4AqQgutx1Xwqm5a\n f3hy5IisRRnsj3QL5XlB3eik9/F2VMw5Y+mlKwQU0AMfc6iH32xH43q6N\n FrUVNPl9eDfn+DMwjNuTk99VKm0umAqDSO8LvtKYkE+Znor+23ZhHLCfC\n XxMOyFmj2vy+ty3UVtv+TY20V0R8V1W1ai/7fmceB8LZmL0iQF3F6q5xf\n JOCerlM92w8GQc/RPAlq9wET+wvY80rDeWtLa59pN+93qk752ipilGfpz\n 8mdFVm5etJ1BcOR4er+qaUjLDiSP0S4h7t7Whs8WIdmSIVLTX2aU3kJw+\n g==;",
        "X-Mailman-Original-Authentication-Results": [
            "smtp1.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com",
            "smtp1.osuosl.org;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.a=rsa-sha256 header.s=Intel header.b=KhcBe+NZ"
        ],
        "Subject": "[Intel-wired-lan] [PATCH v6 net-next 1/8] dpll: add new DPLL type\n for transmit clock (TXC) usage",
        "X-BeenThere": "intel-wired-lan@osuosl.org",
        "X-Mailman-Version": "2.1.30",
        "Precedence": "list",
        "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>",
        "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>",
        "List-Post": "<mailto:intel-wired-lan@osuosl.org>",
        "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>",
        "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>",
        "Cc": "ivecera@redhat.com, vadim.fedorenko@linux.dev, kuba@kernel.org,\n jiri@resnulli.us, edumazet@google.com, przemyslaw.kitszel@intel.com,\n richardcochran@gmail.com, donald.hunter@gmail.com,\n linux-kernel@vger.kernel.org, arkadiusz.kubalewski@intel.com,\n Aleksandr Loktionov <aleksandr.loktionov@intel.com>, andrew+netdev@lunn.ch,\n intel-wired-lan@lists.osuosl.org, horms@kernel.org,\n Prathosh.Satish@microchip.com, anthony.l.nguyen@intel.com, pabeni@redhat.com,\n davem@davemloft.net, Jiri Pirko <jiri@nvidia.com>",
        "Errors-To": "intel-wired-lan-bounces@osuosl.org",
        "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>"
    },
    "content": "Extend the DPLL subsystem with a new DPLL type, DPLL_TYPE_TXC,\nrepresenting devices that drive a transmit reference clock. Certain\nPHYs, MACs and SerDes blocks use a dedicated TX reference clock for\nlink operation, and this clock domain is distinct from PPS- and\nEEC-driven synchronization sources. Defining a dedicated type allows\nuser space and drivers to correctly classify and configure DPLLs\nintended for TX clock generation.\n\nThe corresponding netlink specification is updated to expose \"txc\".\n\nReviewed-by: Jiri Pirko <jiri@nvidia.com>\nReviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>\nReviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>\nSigned-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>\n---\n Documentation/netlink/specs/dpll.yaml | 3 +++\n drivers/dpll/dpll_nl.c                | 2 +-\n include/uapi/linux/dpll.h             | 2 ++\n 3 files changed, 6 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml\nindex 40465a3d7fc2..69e907850c01 100644\n--- a/Documentation/netlink/specs/dpll.yaml\n+++ b/Documentation/netlink/specs/dpll.yaml\n@@ -138,6 +138,9 @@ definitions:\n       -\n         name: eec\n         doc: dpll drives the Ethernet Equipment Clock\n+      -\n+        name: txc\n+        doc: dpll drives Tx reference clock\n     render-max: true\n   -\n     type: enum\ndiff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c\nindex 1e652340a5d7..9a3b70ea3ae0 100644\n--- a/drivers/dpll/dpll_nl.c\n+++ b/drivers/dpll/dpll_nl.c\n@@ -34,7 +34,7 @@ const struct nla_policy dpll_reference_sync_nl_policy[DPLL_A_PIN_STATE + 1] = {\n static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = {\n \t[DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, },\n \t[DPLL_A_CLOCK_ID] = { .type = NLA_U64, },\n-\t[DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),\n+\t[DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),\n };\n \n /* DPLL_CMD_DEVICE_GET - do */\ndiff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h\nindex 871685f7c353..b2045cb0a779 100644\n--- a/include/uapi/linux/dpll.h\n+++ b/include/uapi/linux/dpll.h\n@@ -109,10 +109,12 @@ enum dpll_clock_quality_level {\n  * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute\n  * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal\n  * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock\n+ * @DPLL_TYPE_TXC: dpll drives Tx reference clock\n  */\n enum dpll_type {\n \tDPLL_TYPE_PPS = 1,\n \tDPLL_TYPE_EEC,\n+\tDPLL_TYPE_TXC,\n \n \t/* private: */\n \t__DPLL_TYPE_MAX,\n",
    "prefixes": [
        "v6",
        "net-next",
        "1/8"
    ]
}