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GET /api/1.1/patches/2221587/?format=api
{ "id": 2221587, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2221587/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/CAMe9rOr8BGAgU-gZsYhjrBZC7hZjNE6ys01ddNZfEXQ7yV6RRQ@mail.gmail.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<CAMe9rOr8BGAgU-gZsYhjrBZC7hZjNE6ys01ddNZfEXQ7yV6RRQ@mail.gmail.com>", "date": "2026-04-09T20:58:30", "name": "[v5] x86: Rewrite ix86_find_max_used_stack_alignment", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "c5fed58e18022c70a9acef62b248e6c7755d95bd", "submitter": { "id": 4387, "url": "http://patchwork.ozlabs.org/api/1.1/people/4387/?format=api", "name": "H.J. Lu", "email": "hjl.tools@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/CAMe9rOr8BGAgU-gZsYhjrBZC7hZjNE6ys01ddNZfEXQ7yV6RRQ@mail.gmail.com/mbox/", "series": [ { "id": 499360, "url": "http://patchwork.ozlabs.org/api/1.1/series/499360/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=499360", "date": "2026-04-09T20:58:30", "name": "[v5] x86: Rewrite ix86_find_max_used_stack_alignment", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/499360/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221587/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221587/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=Fivt9WMq;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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Thu, 09 Apr 2026\n 13:59:07 -0700 (PDT)", "MIME-Version": "1.0", "References": "\n <CAMe9rOqehAHY1DjMoco_vDqoPSY4-o=q=Ty6Yro9uDHOy+2CBg@mail.gmail.com>\n <CAMe9rOp-EFNdwdahM9m3y-2GneOQ2BF2P6mhkkjgXUybQXb2XA@mail.gmail.com>\n <CAMe9rOpVU1ppyO=3UfTWS8dTnbhYWmSiP0_ZsvTwo9zv8EEkoQ@mail.gmail.com>\n <nn314941-07qo-54n3-4o6s-48rnpo5r3199@fhfr.qr>\n <CAMe9rOrVGwKbHdofQ9TqBAXYObL5Yu+J4ZnTeb5bD+pNve3zPw@mail.gmail.com>\n <0305rr41-n79q-q3po-222p-0p6468979827@fhfr.qr>\n <CAMe9rOrtsUqu1AgU=M9rgV1jcUB8YO12Aaekev+o5zFfi5PQNQ@mail.gmail.com>\n <8900r718-2q5q-7613-nsp5-o0s313r8p007@fhfr.qr>\n <CAMe9rOpyurp8_kBu00epcBvtpN+wHzWRu3W6jr-7qu3+xwp=Ww@mail.gmail.com>\n <CAFiYyc3VgmggpbTkY0d+JcWyTALcHpMJWFt9W819VYdj=86xzg@mail.gmail.com>\n <CAMe9rOpioAjEe1Y-5MRm1vjaGW0DLKUpasj4_XfGb8u8-7Vc1A@mail.gmail.com>\n <4369013r-62p8-s3n6-7s47-3rss9r034304@fhfr.qr>\n <CAMe9rOqQ0MHB5FWCZM+gZZc-S=bHY5=w6D707EdsPNvLAWWLTA@mail.gmail.com>\n <16nn5044-ooro-2sos-1o7o-9rnr833no6or@fhfr.qr>", "In-Reply-To": "<16nn5044-ooro-2sos-1o7o-9rnr833no6or@fhfr.qr>", "From": "\"H.J. Lu\" <hjl.tools@gmail.com>", "Date": "Fri, 10 Apr 2026 04:58:30 +0800", "X-Gm-Features": "AQROBzDVkp8-2vQftheZrBmiAqkgdUFC7PqtVu7cmLNtV-dGKqusrSd5M4DAxu4", "Message-ID": "\n <CAMe9rOr8BGAgU-gZsYhjrBZC7hZjNE6ys01ddNZfEXQ7yV6RRQ@mail.gmail.com>", "Subject": "[PATCH v5] x86: Rewrite ix86_find_max_used_stack_alignment", "To": "Richard Biener <rguenther@suse.de>", "Cc": "GCC Patches <gcc-patches@gcc.gnu.org>, Uros Bizjak <ubizjak@gmail.com>,\n Hongtao Liu <hongtao.liu@intel.com>, Sam James <sam@gentoo.org>,\n Richard Sandiford <rdsandiford@googlemail.com>", "Content-Type": "multipart/mixed; boundary=\"0000000000009301e9064f0d4904\"", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "On Thu, Apr 9, 2026 at 5:13 PM Richard Biener <rguenther@suse.de> wrote:\n>\n> On Thu, 9 Apr 2026, H.J. Lu wrote:\n>\n> > On Wed, Apr 8, 2026 at 7:46 PM Richard Biener <rguenther@suse.de> wrote:\n> > >\n> > > On Wed, 8 Apr 2026, H.J. Lu wrote:\n> > >\n> > > > On Wed, Apr 8, 2026 at 2:00 AM Richard Biener\n> > > > <richard.guenther@gmail.com> wrote:\n> > > > >\n> > > > > On Tue, Apr 7, 2026 at 5:18 PM H.J. Lu <hjl.tools@gmail.com> wrote:\n> > > > > >\n> > > > ...\n> > > > > > How about something like this:\n> > > > > >\n> > > > > > /* Update the maximum stack slot alignment from memory alignment if\n> > > > > > OP is stack memory. */\n> > > > > >\n> > > > > > static void\n> > > > > > ix86_update_stack_alignment_2 (const_rtx op, unsigned int &alignment)\n> > > > > > {\n> > > > > > /* Skip if OP is a memory operand with SYMBOLIC_CONST. */\n> > > > > > rtx x = XEXP (op, 0);\n> > > > > > if (SYMBOLIC_CONST (x))\n> > > > > > return;\n> > > > > >\n> > > > > > unsigned int mem_align = MEM_ALIGN (op);\n> > > > > > tree mem_expr = MEM_EXPR (op);\n> > > > > > if (!mem_expr)\n> > > > > > {\n> > > > > > /* If MEM_EXPR is NULL, assume that OP is a memory operand. */\n> > > > > > check_alignment:\n> > > > > > if (mem_align > alignment)\n> > > > > > alignment = mem_align;\n> > > > > > return;\n> > > > > > }\n> > > > > >\n> > > > > > tree var = get_base_address (mem_expr);\n> > > > > >\n> > > > > > /* Skip if OP references an argument passed on stack. */\n> > > > > > if (TREE_CODE (var) == PARM_DECL)\n> > > > > > return;\n> > > > > >\n> > > > > > if (TREE_CODE (var) == MEM_REF || TREE_CODE (var) == TARGET_MEM_REF)\n> > > > > > {\n> > > > > > var = TREE_OPERAND (var, 0);\n> > > > > > /* Skip if OP is a memory operand from SSA_NAME. */\n> > > > > > if (TREE_CODE (var) == SSA_NAME)\n> > > > > > return;\n> > > > > > goto check_alignment;\n> > > > > > }\n> > > > > >\n> > > > > > if (!VAR_P (var) || !DECL_RTL_SET_P (var))\n> > > > > > goto check_alignment;\n> > > > > >\n> > > > > > x = DECL_RTL (var);\n> > > > > > if (!MEM_P (x))\n> > > > > > goto check_alignment;\n> > > > > >\n> > > > > > x = XEXP (x, 0);\n> > > > > > if (SYMBOLIC_CONST (x))\n> > > > > > return;\n> > > > > >\n> > > > > > goto check_alignment;\n> > > > > > }\n> > > > > >\n> > > > > > /* Update the maximum stack slot alignment from memory alignment if\n> > > > > > SET references stack memory. */\n> > > > > >\n> > > > > > static void\n> > > > > > ix86_update_stack_alignment_1 (rtx set, unsigned int &alignment)\n> > > > > > {\n> > > > > > rtx dest = SET_DEST (set);\n> > > > > >\n> > > > > > if (MEM_P (dest))\n> > > > > > return ix86_update_stack_alignment_2 (dest, alignment);\n> > > > > >\n> > > > > > const_rtx src = SET_SRC (set);\n> > > > > >\n> > > > > > subrtx_iterator::array_type array;\n> > > > > > FOR_EACH_SUBRTX (iter, array, src, ALL)\n> > > > > > {\n> > > > > > auto op = *iter;\n> > > > > >\n> > > > > > if (MEM_P (op))\n> > > > > > return ix86_update_stack_alignment_2 (op, alignment);\n> > > > > > }\n> > > > > > }\n> > > > > >\n> > > > > > /* Update the maximum stack slot alignment from memory alignment if\n> > > > > > INSN references stack memory. */\n> > > > > >\n> > > > > > static void\n> > > > > > ix86_update_stack_alignment (rtx_insn *insn, unsigned int &alignment)\n> > > > > > {\n> > > > > > rtx set = single_set (insn);\n> > > > > > if (set)\n> > > > > > return ix86_update_stack_alignment_1 (set, alignment);\n> > > > > >\n> > > > > > rtx pat = PATTERN (insn);\n> > > > > > if (GET_CODE (pat) != PARALLEL)\n> > > > > > return;\n> > > > > >\n> > > > > > for (int i = 0; i < XVECLEN (pat, 0); i++)\n> > > > > > {\n> > > > > > rtx exp = XVECEXP (pat, 0, i);\n> > > > > >\n> > > > > > if (GET_CODE (exp) == SET)\n> > > > > > ix86_update_stack_alignment_1 (exp, alignment);\n> > > > > > }\n> > > > > > }\n> > > > > >\n> > > > > > /* Set stack_frame_required to false if stack frame isn't required.\n> > > > > > Update STACK_ALIGNMENT to the largest alignment, in bits, of stack\n> > > > > > slot used if stack frame is required and CHECK_STACK_SLOT is true. */\n> > > > > >\n> > > > > > static void\n> > > > > > ix86_find_max_used_stack_alignment (unsigned int &stack_alignment,\n> > > > > > bool check_stack_slot)\n> > > > > > {\n> > > > > > HARD_REG_SET set_up_by_prologue, prologue_used;\n> > > > > > basic_block bb;\n> > > > > >\n> > > > > > CLEAR_HARD_REG_SET (prologue_used);\n> > > > > > CLEAR_HARD_REG_SET (set_up_by_prologue);\n> > > > > > add_to_hard_reg_set (&set_up_by_prologue, Pmode, STACK_POINTER_REGNUM);\n> > > > > > add_to_hard_reg_set (&set_up_by_prologue, Pmode, ARG_POINTER_REGNUM);\n> > > > > > add_to_hard_reg_set (&set_up_by_prologue, Pmode,\n> > > > > > HARD_FRAME_POINTER_REGNUM);\n> > > > > >\n> > > > > > bool require_stack_frame = false;\n> > > > > >\n> > > > > > /* The preferred stack alignment is the minimum stack alignment. */\n> > > > > > if (check_stack_slot\n> > > > > > && stack_alignment > crtl->preferred_stack_boundary)\n> > > > > > stack_alignment = crtl->preferred_stack_boundary;\n> > > > > >\n> > > > > > FOR_EACH_BB_FN (bb, cfun)\n> > > > > > {\n> > > > > > rtx_insn *insn;\n> > > > > > FOR_BB_INSNS (bb, insn)\n> > > > > > if (NONDEBUG_INSN_P (insn))\n> > > > > > {\n> > > > > > if (!require_stack_frame\n> > > > > > && requires_stack_frame_p (insn, prologue_used,\n> > > > > > set_up_by_prologue))\n> > > > > > {\n> > > > > > require_stack_frame = true;\n> > > > > >\n> > > > > > /* Stop if we don't need to check stack slot. */\n> > > > > > if (!check_stack_slot)\n> > > > > > break;\n> > > > > > }\n> > > > > >\n> > > > > > if (!check_stack_slot || !NONJUMP_INSN_P (insn))\n> > > > > > continue;\n> > > > > >\n> > > > > > ix86_update_stack_alignment (insn, stack_alignment);\n> > > > > > }\n> > > > > > }\n> > > > > >\n> > > > > > cfun->machine->stack_frame_required = require_stack_frame;\n> > > > > > }\n> > > > >\n> > > > > AFAICS this considers almost all MEMs to be stack accesses and thus\n> > > > > should be conservative. The tracking of which regs point to the stack\n> > > > > is gone?\n> > > >\n> > > > Yes.\n> > > >\n> > > > > FOR_EACH_BB_FN visits block in no particular order, init_alias_analysis\n> > > > > properly iterates to compute what a reg points to, but with multiple defs\n> > > > > I belive it gives up. But it is probably most closely equivalent to what\n> > > > > your current code does (just more correct and faster).\n> > > > >\n> > > >\n> > > > Here is the patch to rewrite ix86_find_max_used_stack_alignment.\n> > > > There are no regressions.\n> > > >\n> > > > OK for master?\n> > >\n> > > if (TREE_CODE (var) == MEM_REF || TREE_CODE (var) == TARGET_MEM_REF)\n> > > {\n> > > var = TREE_OPERAND (var, 0);\n> > > /* Skip if OP is a memory operand from SSA_NAME. */\n> > > if (TREE_CODE (var) == SSA_NAME)\n> > > return;\n> > >\n> > > So this seems wrong, we ignore all indirect memory accesses as\n> > > not belonging to the stack here.\n> > >\n> > > The \"else\" should be unreachable due to how get_base_address\n> > > works.\n> > >\n> > > goto check_alignment;\n> > > }\n> > >\n> > > if (!VAR_P (var) || !DECL_RTL_SET_P (var))\n> > > goto check_alignment;\n> > >\n> > > The gotos are ugly, some else if / nesting should get rid of\n> > > them with duplicating the check_alignment out at the end.\n> > >\n> > > I do wonder whether the above would be more precise written as\n> > >\n> > > static void\n> > > ix86_update_stack_alignment_2 (const_rtx op, unsigned int &alignment)\n> > > {\n> > > rtx base = find_base_term (XEXP (op, 0));\n> > >\n> > > /* Skip if OP references an argument slot. */\n> > > if (base == static_reg_base_value[ARG_POINTER_REGNUM])\n> > > return;\n> > >\n> > > if (!base\n> > ^^^^^^^^^^^^^^^\n> >\n> > For\n> >\n> > char c, d;\n> > _BitInt(2048) b;\n> >\n> > void\n> > foo (__int128, _BitInt(1024) a)\n> > {\n> > b *= 0;\n> > c %= (char)(a ?: d);\n> > }\n> >\n> > we got\n> >\n> > (gdb) call debug (insn)\n> > (insn 14 12 65 3 (set (mem:V4DI (reg:DI 0 ax [orig:112 ivtmp.23 ]\n> > [112]) [1 MEM <vector(4) unsigned long> [(_BitInt(2048) *)_34]+0 S32\n> > A256])\n> > (reg:V4DI 20 xmm0 [117])) \"x.c\":7:5 discrim 33280 2461\n> > {movv4di_internal}\n> > (nil))\n> > (gdb)\n> >\n> > and\n> >\n> > (gdb) call debug (op)\n> > (mem:V4DI (reg:DI 0 ax [orig:112 ivtmp.23 ] [112]) [1 MEM <vector(4)\n> > unsigned long> [(_BitInt(2048) *)_34]+0 S32 A256])\n> > (gdb) next\n> > 8607 if (base != static_reg_base_value[ARG_POINTER_REGNUM]\n> > (gdb) p base\n> > $4 = (rtx) 0x0\n> > (gdb)\n> >\n> > if base is 0, we can't assume that it accesses stack.\n>\n> Well, base == 0 means \"don't know\", so we have to conservatively\n> _assume_ it accesses the stack, no? Similar to your\n> SSA_NAME early out I commented on.\n>\n> But sure, RTL points-to analysis leaves a lot to be desired.\n>\n> > > || base == static_reg_base_value[STACK_POINTER_REGNUM]\n> > > || base == static_reg_base_value[FRAME_POINTER_REGNUM])\n> > > alignment = MAX (MEM_ALIGN (op), alignment);\n> > > }\n> > >\n> > > using RTL points-to. I belive that is what your ix86_find_all_reg_uses\n> > > attempted to compute.\n> > >\n> > > Note find_base_term and friends are not exported from alias.cc so\n> > > the predicate part would need to be split out into a new predicate\n> > > there, alongside the existing may_be_sp_based_p (). As said you'll\n> > > need to call init_alias_analysis from the pass the above is\n> >\n> > Isn't init_alias_analysis called from backend_init_target?\n> > Why should it be called again?\n>\n> Because the RTL IL changes and reg_base_value[] needs to be computed\n> to get accurate (and correct) info.\n>\n> Richard.\n\nRevert changes in ix86_find_max_used_stack_alignment\n\n7b39d7b3b84 Correct x86: Call ix86_access_stack_p only for larger alignment\nc8a84242e4b Update x86: Call ix86_access_stack_p only for larger alignment\nf511bf93f94 x86: Call ix86_access_stack_p only for larger alignment\na7cce1afee8 x86: Call ix86_access_stack_p only with symbolic constant load\nb54533a2863 x86: Update stack alignment only if stack is used\nb9ea3b2ef98 x86: Properly find the maximum stack slot alignment\n\nRewrite ix86_find_max_used_stack_alignment based on RTL points-to info\nwith find_base_term and static_reg_base_value. If RTL points-to info\nisn't available,\n\n1. Use ix86_decompose_address to check for symbolic displacement.\n2. Check MEM_EXPR for stack argument reference, memory reference and\nlocal variable reference.\n\nUpdate the maximum stack slot alignment from memory alignment only if its\nbase may point to stack or frame pointers.\n\nThe compile times of PR target/124165 and PR target/124684 test are\nunchanged.\n\nPR target/109780\nPR target/109093\nPR target/123210\nPR target/124098\nPR target/124165\nPR target/124684\nPR target/124759\nPR target/124789\n* alias.cc (static_reg_base_value): Moved to rtl.h.\n(find_base_term): Remove static.\n* function.cc (thread_prologue_and_epilogue_insns): Call\ninit_alias_analysis and end_alias_analysis.\n* rtl.h (static_reg_base_value): Moved from alias.cc.\n(find_base_term): New prototype.\n* config/i386/i386.cc (stack_access_data): Removed.\n(ix86_find_all_reg_uses_1): Likewise.\n(ix86_find_all_reg_uses): Likewise.\n(ix86_access_stack_p): Likewise.\n(ix86_need_alignment_p_2): Likewise.\n(ix86_need_alignment_p_1): Likewise.\n(ix86_need_alignment_p): Likewise.\n(ix86_update_stack_alignment_2): New function.\n(ix86_update_stack_alignment_1): Likewise.\n(ix86_update_stack_alignment): Rewrite.\n(ix86_find_max_used_stack_alignment): If check_stack_slot is\ntrue, call ix86_update_stack_alignment on each INSN.\n\nSigned-off-by: H.J. Lu <hjl.tools@gmail.com>\nCo-Authored-By: Richard Biener <rguenther@suse.de>", "diff": "From a37126b0691403afa318a4af0f7f5d6989040774 Mon Sep 17 00:00:00 2001\nFrom: \"H.J. Lu\" <hjl.tools@gmail.com>\nDate: Tue, 7 Apr 2026 23:16:38 +0800\nSubject: [PATCH v5] x86: Rewrite ix86_find_max_used_stack_alignment\n\nRevert changes in ix86_find_max_used_stack_alignment\n\n7b39d7b3b84 Correct x86: Call ix86_access_stack_p only for larger alignment\nc8a84242e4b Update x86: Call ix86_access_stack_p only for larger alignment\nf511bf93f94 x86: Call ix86_access_stack_p only for larger alignment\na7cce1afee8 x86: Call ix86_access_stack_p only with symbolic constant load\nb54533a2863 x86: Update stack alignment only if stack is used\nb9ea3b2ef98 x86: Properly find the maximum stack slot alignment\n\nRewrite ix86_find_max_used_stack_alignment based on RTL points-to info\nwith find_base_term and static_reg_base_value. If RTL points-to info\nisn't available,\n\n1. Use ix86_decompose_address to check for symbolic displacement.\n2. Check MEM_EXPR for stack argument reference, memory reference and\nlocal variable reference.\n\nUpdate the maximum stack slot alignment from memory alignment only if its\nbase may point to stack or frame pointers.\n\nThe compile times of PR target/124165 and PR target/124684 test are\nunchanged.\n\n\tPR target/109780\n\tPR target/109093\n\tPR target/123210\n\tPR target/124098\n\tPR target/124165\n\tPR target/124684\n\tPR target/124759\n\tPR target/124789\n\t* alias.cc (static_reg_base_value): Moved to rtl.h.\n\t(find_base_term): Remove static.\n\t* function.cc (thread_prologue_and_epilogue_insns): Call\n\tinit_alias_analysis and end_alias_analysis.\n\t* rtl.h (static_reg_base_value): Moved from alias.cc.\n\t(find_base_term): New prototype.\n\t* config/i386/i386.cc (stack_access_data): Removed.\n\t(ix86_find_all_reg_uses_1): Likewise.\n\t(ix86_find_all_reg_uses): Likewise.\n\t(ix86_access_stack_p): Likewise.\n\t(ix86_need_alignment_p_2): Likewise.\n\t(ix86_need_alignment_p_1): Likewise.\n\t(ix86_need_alignment_p): Likewise.\n\t(ix86_update_stack_alignment_2): New function.\n\t(ix86_update_stack_alignment_1): Likewise.\n\t(ix86_update_stack_alignment): Rewrite.\n\t(ix86_find_max_used_stack_alignment): If check_stack_slot is\n\ttrue, call ix86_update_stack_alignment on each INSN.\n\nSigned-off-by: H.J. Lu <hjl.tools@gmail.com>\nCo-Authored-By: Richard Biener <rguenther@suse.de>\n---\n gcc/alias.cc | 5 +-\n gcc/config/i386/i386.cc | 392 ++++++++++++----------------------------\n gcc/function.cc | 6 +\n gcc/rtl.h | 3 +\n 4 files changed, 123 insertions(+), 283 deletions(-)\n\ndiff --git a/gcc/alias.cc b/gcc/alias.cc\nindex 6e16b21327f..cc70ce5ce40 100644\n--- a/gcc/alias.cc\n+++ b/gcc/alias.cc\n@@ -232,9 +232,6 @@ static GTY((deletable)) vec<rtx, va_gc> *old_reg_base_value;\n #define UNIQUE_BASE_VALUE_FP\t-3\n #define UNIQUE_BASE_VALUE_HFP\t-4\n \n-#define static_reg_base_value \\\n- (this_target_rtl->x_static_reg_base_value)\n-\n #define REG_BASE_VALUE(X)\t\t\t\t\t\\\n (REGNO (X) < vec_safe_length (reg_base_value)\t\t\t\\\n ? (*reg_base_value)[REGNO (X)] : 0)\n@@ -2065,7 +2062,7 @@ find_base_term (rtx x, vec<std::pair<cselib_val *,\n /* Wrapper around the worker above which removes locs from visited VALUEs\n to avoid visiting them multiple times. We unwind that changes here. */\n \n-static rtx\n+rtx\n find_base_term (rtx x)\n {\n auto_vec<std::pair<cselib_val *, struct elt_loc_list *>, 32> visited_vals;\ndiff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc\nindex 9d1a2af7064..8bccce7e720 100644\n--- a/gcc/config/i386/i386.cc\n+++ b/gcc/config/i386/i386.cc\n@@ -8598,221 +8598,124 @@ output_probe_stack_range (rtx reg, rtx end)\n return \"\";\n }\n \n-/* Data passed to ix86_update_stack_alignment. */\n-struct stack_access_data\n-{\n- /* The stack access register. */\n- const_rtx reg;\n- /* Pointer to stack alignment. */\n- unsigned int *stack_alignment;\n-};\n-\n-/* Return true if OP references an argument passed on stack. */\n-\n-static bool\n-ix86_argument_passed_on_stack_p (const_rtx op)\n-{\n- tree mem_expr = MEM_EXPR (op);\n- if (mem_expr)\n- {\n- tree var = get_base_address (mem_expr);\n- return TREE_CODE (var) == PARM_DECL;\n- }\n- return false;\n-}\n-\n-/* Update the maximum stack slot alignment from memory alignment in PAT. */\n+/* Update the maximum stack slot alignment from memory alignment if\n+ OP is stack memory. */\n \n static void\n-ix86_update_stack_alignment (rtx, const_rtx pat, void *data)\n+ix86_update_stack_alignment_2 (const_rtx op, unsigned int &alignment)\n {\n- /* This insn may reference stack slot. Update the maximum stack slot\n- alignment if the memory is referenced by the stack access register. */\n- stack_access_data *p = (stack_access_data *) data;\n-\n- subrtx_iterator::array_type array;\n- FOR_EACH_SUBRTX (iter, array, pat, ALL)\n- {\n- auto op = *iter;\n- if (MEM_P (op))\n-\t{\n-\t /* NB: Ignore arguments passed on stack since caller is\n-\t responsible to align the outgoing stack for arguments\n-\t passed on stack. */\n-\t if (reg_mentioned_p (p->reg, XEXP (op, 0))\n-\t && !ix86_argument_passed_on_stack_p (op))\n-\t {\n-\t unsigned int alignment = MEM_ALIGN (op);\n+ unsigned int mem_align = MEM_ALIGN (op);\n+ if (mem_align <= alignment)\n+ return;\n \n-\t if (alignment > *p->stack_alignment)\n-\t\t*p->stack_alignment = alignment;\n-\t break;\n-\t }\n-\t else\n-\t iter.skip_subrtxes ();\n-\t}\n- }\n-}\n+ /* Skip if OP is a memory operand with CONST_INT in\n \n-/* Helper function for ix86_find_all_reg_uses. */\n+ (set (mem/v:SI (const_int 0 [0]) [14 MEM[(int *)0B]+0 S4 A256])\n+\t (const_int 0 [0]))\n \n-static void\n-ix86_find_all_reg_uses_1 (HARD_REG_SET ®set,\n-\t\t\t rtx set, unsigned int regno,\n-\t\t\t auto_bitmap &worklist)\n-{\n- rtx dest = SET_DEST (set);\n-\n- if (!REG_P (dest))\n- return;\n+ or SYMBOLIC_CONST in\n \n- /* Reject non-Pmode modes. */\n- if (GET_MODE (dest) != Pmode)\n+ (set (reg:SI 0 ax [orig:118 _2 ] [118])\n+\t (sign_extend:SI (mem/c:QI (symbol_ref:DI (\"c\") [flags 0x2] <var_decl 0x7fffe960de40 c>) [0 c+0 S1 A8])))\n+ */\n+ rtx x = XEXP (op, 0);\n+ if (CONST_INT_P (x) || SYMBOLIC_CONST (x))\n return;\n \n- unsigned int dst_regno = REGNO (dest);\n-\n- if (TEST_HARD_REG_BIT (regset, dst_regno))\n- return;\n+ /* Skip if OP is function result on stack in\n \n- const_rtx src = SET_SRC (set);\n-\n- subrtx_iterator::array_type array;\n- FOR_EACH_SUBRTX (iter, array, src, ALL)\n+ (set (mem/c:TI (reg/f:SI 0 ax [orig:99 .result_ptr ] [99]) [2 <retval>+0 S16 A128])\n+\t (reg:TI 20 xmm0 [orig:100 x ] [100]))\n+ */\n+ tree result_decl = DECL_RESULT (current_function_decl);\n+ if (result_decl && DECL_RTL_SET_P (result_decl))\n {\n- auto op = *iter;\n-\n- if (MEM_P (op))\n-\titer.skip_subrtxes ();\n-\n- if (REG_P (op) && REGNO (op) == regno)\n-\t{\n-\t /* Add this register to register set. */\n-\t add_to_hard_reg_set (®set, Pmode, dst_regno);\n-\t bitmap_set_bit (worklist, dst_regno);\n-\t break;\n-\t}\n+ rtx result_rtl = DECL_RTL (result_decl);\n+ if (MEM_P (result_rtl) && XEXP (result_rtl, 0) == x)\n+\treturn;\n }\n-}\n-\n-/* Find all registers defined with register REGNO. */\n \n-static void\n-ix86_find_all_reg_uses (HARD_REG_SET ®set,\n-\t\t\tunsigned int regno, auto_bitmap &worklist)\n-{\n- for (df_ref ref = DF_REG_USE_CHAIN (regno);\n- ref != NULL;\n- ref = DF_REF_NEXT_REG (ref))\n+ /* Check RTL points-to info. */\n+ rtx base = find_base_term (XEXP (op, 0));\n+ if (!base)\n {\n- if (DF_REF_IS_ARTIFICIAL (ref))\n-\tcontinue;\n+ bool ok;\n+ struct ix86_address parts;\n+ ok = ix86_decompose_address (XEXP (op, 0), &parts);\n+ gcc_assert (ok);\n \n- rtx_insn *insn = DF_REF_INSN (ref);\n+ /* Skip if displacement is SYMBOLIC_CONST in\n \n- if (!NONJUMP_INSN_P (insn))\n-\tcontinue;\n+\t (set (mem:V16QI (plus:SI (reg:SI 2 cx [orig:105 niters_vector_mult_vf.6 ] [105])\n+\t\t\t\t (symbol_ref:SI (\"perm\") [flags 0x2] <var_decl 0x7fffe9613130 perm>)) [0 MEM <vector(16) char> [(char *)vectp_perm.21_69]+0 S16 A256])\n+\t (reg:V16QI 20 xmm0 [orig:179 vect__13.18_68 ] [179]))\n \n- unsigned int ref_regno = DF_REF_REGNO (ref);\n+\t from gcc.target/i386/pr109780-1.c. */\n+ if (parts.disp && SYMBOLIC_CONST (parts.disp))\n+\treturn;\n \n- rtx set = single_set (insn);\n- if (set)\n+ tree mem_expr = MEM_EXPR (op);\n+ if (mem_expr)\n \t{\n-\t ix86_find_all_reg_uses_1 (regset, set,\n-\t\t\t\t ref_regno, worklist);\n-\t continue;\n-\t}\n-\n- rtx pat = PATTERN (insn);\n- if (GET_CODE (pat) != PARALLEL)\n-\tcontinue;\n+\t tree var = get_base_address (mem_expr);\n+\t /* Skip if OP references an argument passed on stack. */\n+\t if (TREE_CODE (var) == PARM_DECL)\n+\t return;\n \n- for (int i = 0; i < XVECLEN (pat, 0); i++)\n-\t{\n-\t rtx exp = XVECEXP (pat, 0, i);\n+\t /* Skip if OP is a memory operand of memory reference in\n \n-\t if (GET_CODE (exp) == SET)\n-\t ix86_find_all_reg_uses_1 (regset, exp,\n-\t\t\t\t ref_regno, worklist);\n-\t}\n- }\n-}\n+\t (set (mem:V4DI (reg:DI 0 ax [orig:112 ivtmp.23 ] [112]) [1 MEM <vector(4) unsigned long> [(_BitInt(2048) *)_34]+0 S32 A256])\n+\t\t (reg:V4DI 20 xmm0 [117]))\n \n-/* Return true if the hard register REGNO used for a stack access is\n- defined in a basic block that dominates the block where it is used. */\n+\t from gcc.target/i386/pr124098.c,\n \n-static bool\n-ix86_access_stack_p (unsigned int regno, basic_block bb,\n-\t\t HARD_REG_SET &set_up_by_prologue,\n-\t\t HARD_REG_SET &prologue_used,\n-\t\t auto_bitmap reg_dominate_bbs_known[],\n-\t\t auto_bitmap reg_dominate_bbs[])\n-{\n- if (bitmap_bit_p (reg_dominate_bbs_known[regno], bb->index))\n- return bitmap_bit_p (reg_dominate_bbs[regno], bb->index);\n-\n- bitmap_set_bit (reg_dominate_bbs_known[regno], bb->index);\n-\n- /* Get all BBs which set REGNO and dominate the current BB from all\n- DEFs of REGNO. */\n- for (df_ref def = DF_REG_DEF_CHAIN (regno);\n- def;\n- def = DF_REF_NEXT_REG (def))\n- if (!DF_REF_IS_ARTIFICIAL (def)\n-\t&& !DF_REF_FLAGS_IS_SET (def, DF_REF_MAY_CLOBBER)\n-\t&& !DF_REF_FLAGS_IS_SET (def, DF_REF_MUST_CLOBBER))\n- {\n-\tbasic_block set_bb = DF_REF_BB (def);\n-\tif (dominated_by_p (CDI_DOMINATORS, bb, set_bb))\n-\t {\n-\t rtx_insn *insn = DF_REF_INSN (def);\n-\t /* Return true if INSN requires stack. */\n-\t if (requires_stack_frame_p (insn, prologue_used,\n-\t\t\t\t\tset_up_by_prologue))\n-\t {\n-\t\tbitmap_set_bit (reg_dominate_bbs[regno], bb->index);\n-\t\treturn true;\n-\t }\n-\t }\n- }\n+\t (set (reg:V2DI 20 xmm0 [orig:103 MEM[(const __m128i * {ref-all})s_1(D) & 4294967280B] ] [103])\n+\t\t (mem:V2DI (reg:SI 0 ax [102]) [0 MEM[(const __m128i * {ref-all})s_1(D) & 4294967280B]+0 S16 A128]))\n \n- /* When we get here, REGNO used in the current BB doesn't access\n- stack. */\n- return false;\n-}\n+\t from gcc.target/i386/pr53907.c and\n \n-/* Return true if OP isn't a memory operand with SYMBOLIC_CONST and\n- needs alignment > ALIGNMENT. */\n+\t (set (reg:CCC 17 flags)\n+\t\t (compare:CCC (plus:DI (mem:DI (reg:DI 2 cx [103]) [4 MEM[(<address-space-1> __int128 *)0B]+0 S8 A128 AS1])\n+\t\t\t\t\t (const_int 8192 [0x2000]))\n+\t\t (mem:DI (reg:DI 2 cx [103]) [4 MEM[(<address-space-1> __int128 *)0B]+0 S8 A128 AS1])))\n \n-static bool\n-ix86_need_alignment_p_2 (const_rtx op, unsigned int alignment)\n-{\n- bool need_alignment = MEM_ALIGN (op) > alignment;\n- tree mem_expr = MEM_EXPR (op);\n- if (!mem_expr)\n- return need_alignment;\n+\t from gcc.target/i386/apx-ndd-seg-1.c. */\n+\t if (TREE_CODE (var) == MEM_REF\n+\t || TREE_CODE (var) == TARGET_MEM_REF)\n+\t return;\n+\t else if (VAR_P (var) && DECL_RTL_SET_P (var))\n+\t {\n+\t /* Handle the case that OP is a stack memory operand in\n \n- tree var = get_base_address (mem_expr);\n- if (!VAR_P (var) || !DECL_RTL_SET_P (var))\n- return need_alignment;\n+\t\t (set (mem/c:V16QI (reg/f:DI 1 dx [114]) [0 MEM <char[1:80]> [(void *)&k]+0 S16 A128])\n+\t\t (reg:V16QI 21 xmm1 [orig:116 MEM <char[1:80]> [(void *)&k] ] [116]))\n \n- rtx x = DECL_RTL (var);\n- if (!MEM_P (x))\n- return need_alignment;\n+\t\t from gcc.target/i386/pr109093-1.c. */\n+\t rtx x = DECL_RTL (var);\n+\t if (MEM_P (x))\n+\t\tbase = find_base_term (XEXP (x, 0));\n+\t }\n+\t}\n+ }\n \n- x = XEXP (x, 0);\n- return !SYMBOLIC_CONST (x) && need_alignment;\n+ /* If RTL points-to info isn't available, assume that OP accesses\n+ stack. */\n+ if (!base\n+ || base == static_reg_base_value[STACK_POINTER_REGNUM]\n+ || base == static_reg_base_value[FRAME_POINTER_REGNUM])\n+ alignment = mem_align;\n }\n \n-/* Return true if SET needs alignment > ALIGNMENT. */\n+/* Update the maximum stack slot alignment from memory alignment if\n+ SET references stack memory. */\n \n-static bool\n-ix86_need_alignment_p_1 (rtx set, unsigned int alignment)\n+static void\n+ix86_update_stack_alignment_1 (rtx set, unsigned int &alignment)\n {\n rtx dest = SET_DEST (set);\n \n if (MEM_P (dest))\n- return ix86_need_alignment_p_2 (dest, alignment);\n+ return ix86_update_stack_alignment_2 (dest, alignment);\n \n const_rtx src = SET_SRC (set);\n \n@@ -8822,35 +8725,31 @@ ix86_need_alignment_p_1 (rtx set, unsigned int alignment)\n auto op = *iter;\n \n if (MEM_P (op))\n-\treturn ix86_need_alignment_p_2 (op, alignment);\n+\treturn ix86_update_stack_alignment_2 (op, alignment);\n }\n-\n- return false;\n }\n \n-/* Return true if INSN needs alignment > ALIGNMENT. */\n+/* Update the maximum stack slot alignment from memory alignment if\n+ INSN references stack memory. */\n \n-static bool\n-ix86_need_alignment_p (rtx_insn *insn, unsigned int alignment)\n+static void\n+ix86_update_stack_alignment (rtx_insn *insn, unsigned int &alignment)\n {\n rtx set = single_set (insn);\n if (set)\n- return ix86_need_alignment_p_1 (set, alignment);\n+ return ix86_update_stack_alignment_1 (set, alignment);\n \n rtx pat = PATTERN (insn);\n if (GET_CODE (pat) != PARALLEL)\n- return false;\n+ return;\n \n for (int i = 0; i < XVECLEN (pat, 0); i++)\n {\n rtx exp = XVECEXP (pat, 0, i);\n \n- if (GET_CODE (exp) == SET\n-\t && ix86_need_alignment_p_1 (exp, alignment))\n-\treturn true;\n+ if (GET_CODE (exp) == SET)\n+\tix86_update_stack_alignment_1 (exp, alignment);\n }\n-\n- return false;\n }\n \n /* Set stack_frame_required to false if stack frame isn't required.\n@@ -8871,103 +8770,38 @@ ix86_find_max_used_stack_alignment (unsigned int &stack_alignment,\n add_to_hard_reg_set (&set_up_by_prologue, Pmode,\n \t\t HARD_FRAME_POINTER_REGNUM);\n \n- bool require_stack_frame = false;\n+ cfun->machine->stack_frame_required = false;\n+\n+ /* The preferred stack alignment is the minimum stack alignment. */\n+ if (check_stack_slot\n+ && stack_alignment > crtl->preferred_stack_boundary)\n+ stack_alignment = crtl->preferred_stack_boundary;\n \n FOR_EACH_BB_FN (bb, cfun)\n {\n rtx_insn *insn;\n FOR_BB_INSNS (bb, insn)\n-\tif (NONDEBUG_INSN_P (insn)\n-\t && requires_stack_frame_p (insn, prologue_used,\n-\t\t\t\t set_up_by_prologue))\n+\tif (NONDEBUG_INSN_P (insn))\n \t {\n-\t require_stack_frame = true;\n-\t break;\n-\t }\n- }\n-\n- cfun->machine->stack_frame_required = require_stack_frame;\n-\n- /* Stop if we don't need to check stack slot. */\n- if (!check_stack_slot)\n- return;\n-\n- /* The preferred stack alignment is the minimum stack alignment. */\n- if (stack_alignment > crtl->preferred_stack_boundary)\n- stack_alignment = crtl->preferred_stack_boundary;\n-\n- HARD_REG_SET stack_slot_access;\n- CLEAR_HARD_REG_SET (stack_slot_access);\n-\n- /* Stack slot can be accessed by stack pointer, frame pointer or\n- registers defined by stack pointer or frame pointer. */\n- auto_bitmap worklist;\n-\n- add_to_hard_reg_set (&stack_slot_access, Pmode, STACK_POINTER_REGNUM);\n- bitmap_set_bit (worklist, STACK_POINTER_REGNUM);\n-\n- if (frame_pointer_needed)\n- {\n- add_to_hard_reg_set (&stack_slot_access, Pmode,\n-\t\t\t HARD_FRAME_POINTER_REGNUM);\n- bitmap_set_bit (worklist, HARD_FRAME_POINTER_REGNUM);\n- }\n-\n- /* Registers on HARD_STACK_SLOT_ACCESS always access stack. */\n- HARD_REG_SET hard_stack_slot_access = stack_slot_access;\n-\n- calculate_dominance_info (CDI_DOMINATORS);\n-\n- unsigned int regno;\n-\n- do\n- {\n- regno = bitmap_clear_first_set_bit (worklist);\n- ix86_find_all_reg_uses (stack_slot_access, regno, worklist);\n- }\n- while (!bitmap_empty_p (worklist));\n-\n- hard_reg_set_iterator hrsi;\n- stack_access_data data;\n-\n- auto_bitmap reg_dominate_bbs_known[FIRST_PSEUDO_REGISTER];\n- auto_bitmap reg_dominate_bbs[FIRST_PSEUDO_REGISTER];\n-\n- data.stack_alignment = &stack_alignment;\n-\n- EXECUTE_IF_SET_IN_HARD_REG_SET (stack_slot_access, 0, regno, hrsi)\n- {\n- for (df_ref ref = DF_REG_USE_CHAIN (regno);\n-\t ref != NULL;\n-\t ref = DF_REF_NEXT_REG (ref))\n-\t{\n-\t if (DF_REF_IS_ARTIFICIAL (ref))\n-\t continue;\n+\t if (!cfun->machine->stack_frame_required\n+\t\t&& requires_stack_frame_p (insn, prologue_used,\n+\t\t\t\t\t set_up_by_prologue))\n+\t {\n+\t\t/* Set stack_frame_required before calling\n+\t\t ix86_update_stack_alignment. */\n+\t\tcfun->machine->stack_frame_required = true;\n \n-\t rtx_insn *insn = DF_REF_INSN (ref);\n+\t\t/* Stop if we don't need to check stack slot. */\n+\t\tif (!check_stack_slot)\n+\t\t break;\n+\t }\n \n-\t if (!NONJUMP_INSN_P (insn))\n-\t continue;\n+\t if (!check_stack_slot || !NONJUMP_INSN_P (insn))\n+\t continue;\n \n-\t /* Call ix86_access_stack_p only if INSN needs alignment >\n-\t STACK_ALIGNMENT. */\n-\t if (ix86_need_alignment_p (insn, stack_alignment)\n-\t && (TEST_HARD_REG_BIT (hard_stack_slot_access, regno)\n-\t\t || ix86_access_stack_p (regno, BLOCK_FOR_INSN (insn),\n-\t\t\t\t\t set_up_by_prologue,\n-\t\t\t\t\t prologue_used,\n-\t\t\t\t\t reg_dominate_bbs_known,\n-\t\t\t\t\t reg_dominate_bbs)))\n-\t {\n-\t /* Update stack alignment if REGNO is used for stack\n-\t\t access. */\n-\t data.reg = DF_REF_REG (ref);\n-\t note_stores (insn, ix86_update_stack_alignment, &data);\n-\t }\n-\t}\n+\t ix86_update_stack_alignment (insn, stack_alignment);\n+\t }\n }\n-\n- free_dominance_info (CDI_DOMINATORS);\n }\n \n /* Finalize stack_realign_needed and frame_pointer_needed flags, which\ndiff --git a/gcc/function.cc b/gcc/function.cc\nindex 109821c16fc..dc08dc1d58a 100644\n--- a/gcc/function.cc\n+++ b/gcc/function.cc\n@@ -6091,6 +6091,9 @@ make_epilogue_seq (void)\n void\n thread_prologue_and_epilogue_insns (void)\n {\n+ /* We need alias. */\n+ init_alias_analysis ();\n+\n df_analyze ();\n \n /* Can't deal with multiple successors of the entry block at the\n@@ -6323,6 +6326,9 @@ thread_prologue_and_epilogue_insns (void)\n df_update_entry_block_defs ();\n df_update_exit_block_uses ();\n }\n+\n+ /* Clean up. */\n+ end_alias_analysis ();\n }\n \n /* Reposition the prologue-end and epilogue-begin notes after\ndiff --git a/gcc/rtl.h b/gcc/rtl.h\nindex eebcc18a4f1..e1ec027db81 100644\n--- a/gcc/rtl.h\n+++ b/gcc/rtl.h\n@@ -4010,6 +4010,8 @@ extern struct target_rtl *this_target_rtl;\n (this_target_rtl->x_top_of_stack)\n #define mode_mem_attrs \\\n (this_target_rtl->x_mode_mem_attrs)\n+#define static_reg_base_value \\\n+ (this_target_rtl->x_static_reg_base_value)\n \n /* All references to certain hard regs, except those created\n by allocating pseudo regs into them (when that's possible),\n@@ -4557,6 +4559,7 @@ extern rtx get_reg_known_value (unsigned int);\n extern bool get_reg_known_equiv_p (unsigned int);\n extern rtx get_reg_base_value (unsigned int);\n extern rtx extract_mem_from_operand (rtx);\n+extern rtx find_base_term (rtx);\n \n #ifdef STACK_REGS\n extern bool stack_regs_mentioned (const_rtx insn);\n-- \n2.53.0\n\n", "prefixes": [ "v5" ] }