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GET /api/1.1/patches/2221189/?format=api
{ "id": 2221189, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2221189/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260408042149.1902796-3-brian.cain@oss.qualcomm.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260408042149.1902796-3-brian.cain@oss.qualcomm.com>", "date": "2026-04-08T04:21:41", "name": "[v4,2/9] hw/hexagon: Add global register tracing", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0172a0b9e476fd76de297bf161bb7a0a9e16880d", "submitter": { "id": 89839, "url": "http://patchwork.ozlabs.org/api/1.1/people/89839/?format=api", "name": "Brian Cain", "email": "brian.cain@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260408042149.1902796-3-brian.cain@oss.qualcomm.com/mbox/", "series": [ { "id": 499184, "url": "http://patchwork.ozlabs.org/api/1.1/series/499184/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499184", "date": "2026-04-08T04:21:47", "name": "Hexagon system emulation - Part 3/3", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/499184/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221189/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221189/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n 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=?utf-8?q?Daniel_P=2E_Be?=\n\t=?utf-8?q?rrang=C3=A9?= <berrange@redhat.com>", "Subject": "[PATCH v4 2/9] hw/hexagon: Add global register tracing", "Date": "Tue, 7 Apr 2026 21:21:41 -0700", "Message-Id": "<20260408042149.1902796-3-brian.cain@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260408042149.1902796-1-brian.cain@oss.qualcomm.com>", "References": "<20260408042149.1902796-1-brian.cain@oss.qualcomm.com>", "MIME-Version": "1.0", "Content-Type": [ "text/plain; charset=UTF-8", "text/plain; charset=\"utf-8\"" ], "Content-Transfer-Encoding": "base64", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDA4MDAzNiBTYWx0ZWRfX3KufGbahvXOA\n yaZ+RaRx1EpdB9iZLF4qD/hdtGHT5nlYA73jtIje+mkHYViPx7Auxn1FcxktkzZZLgjbEBtJUM1\n Pv4/inRqXE0LoRIReuB7U7aKHTNUPulRWSSahI0ZaUVS8mZ39pBzwinGasZTKRHAgyZ+GaxrKUl\n 2b6/wM+7bS1iYUg4CoFu4ZDAPyuOIa2V+iDrKvIjDukH3cDw2skmlMvsusJdziT+oPLoqubEsbP\n PP7hEFJgXRAgjpsBWfuT5m8sHUYjaZAb9TlztGrjYLpgtlfABGfuXU9Q+lOJaEn2Za2ekkSiLP7\n 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lowpriorityscore=0 priorityscore=1501\n suspectscore=0 clxscore=1015 impostorscore=0 bulkscore=0 adultscore=0\n spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound\n adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000\n definitions=main-2604080036", "Received-SPF": "pass client-ip=205.220.180.131;\n envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com", "X-Spam_score_int": "-27", "X-Spam_score": "-2.8", "X-Spam_bar": "--", "X-Spam_report": "(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nSigned-off-by: Brian Cain <brian.cain@oss.qualcomm.com>\n---\n meson.build | 1 +\n hw/hexagon/trace.h | 2 +\n hw/hexagon/hexagon_globalreg.c | 73 ++++++++++++++++++++++++++++++++++\n hw/hexagon/trace-events | 3 ++\n 4 files changed, 79 insertions(+)\n create mode 100644 hw/hexagon/trace.h\n create mode 100644 hw/hexagon/trace-events", "diff": "diff --git a/meson.build b/meson.build\nindex daa58e46a3c..063c668cce5 100644\n--- a/meson.build\n+++ b/meson.build\n@@ -3625,6 +3625,7 @@ if have_system\n 'hw/display',\n 'hw/dma',\n 'hw/fsi',\n+ 'hw/hexagon',\n 'hw/hyperv',\n 'hw/i2c',\n 'hw/i3c',\ndiff --git a/hw/hexagon/trace.h b/hw/hexagon/trace.h\nnew file mode 100644\nindex 00000000000..9e0b39f3c66\n--- /dev/null\n+++ b/hw/hexagon/trace.h\n@@ -0,0 +1,2 @@\n+/* SPDX-License-Identifier: GPL-2.0-or-later */\n+#include \"trace/trace-hw_hexagon.h\"\ndiff --git a/hw/hexagon/hexagon_globalreg.c b/hw/hexagon/hexagon_globalreg.c\nindex 634d3b169fd..34a4ca9f2b2 100644\n--- a/hw/hexagon/hexagon_globalreg.c\n+++ b/hw/hexagon/hexagon_globalreg.c\n@@ -16,11 +16,82 @@\n #include \"target/hexagon/cpu.h\"\n #include \"target/hexagon/hex_regs.h\"\n #include \"qemu/log.h\"\n+#include \"trace.h\"\n #include \"qapi/error.h\"\n \n #define IMMUTABLE (~0)\n #define INVALID_REG_VAL 0xdeadbeef\n \n+static const char *hex_sreg_names[] = {\n+ [HEX_SREG_SGP0] = \"sgp0\",\n+ [HEX_SREG_SGP1] = \"sgp1\",\n+ [HEX_SREG_STID] = \"stid\",\n+ [HEX_SREG_ELR] = \"elr\",\n+ [HEX_SREG_BADVA0] = \"badva0\",\n+ [HEX_SREG_BADVA1] = \"badva1\",\n+ [HEX_SREG_SSR] = \"ssr\",\n+ [HEX_SREG_CCR] = \"ccr\",\n+ [HEX_SREG_HTID] = \"htid\",\n+ [HEX_SREG_BADVA] = \"badva\",\n+ [HEX_SREG_IMASK] = \"imask\",\n+ [HEX_SREG_GEVB] = \"gevb\",\n+ [HEX_SREG_EVB] = \"evb\",\n+ [HEX_SREG_MODECTL] = \"modectl\",\n+ [HEX_SREG_SYSCFG] = \"syscfg\",\n+ [HEX_SREG_IPENDAD] = \"ipendad\",\n+ [HEX_SREG_VID] = \"vid\",\n+ [HEX_SREG_VID1] = \"vid1\",\n+ [HEX_SREG_BESTWAIT] = \"bestwait\",\n+ [HEX_SREG_IEL] = \"iel\",\n+ [HEX_SREG_SCHEDCFG] = \"schedcfg\",\n+ [HEX_SREG_IAHL] = \"iahl\",\n+ [HEX_SREG_CFGBASE] = \"cfgbase\",\n+ [HEX_SREG_DIAG] = \"diag\",\n+ [HEX_SREG_REV] = \"rev\",\n+ [HEX_SREG_PCYCLELO] = \"pcyclelo\",\n+ [HEX_SREG_PCYCLEHI] = \"pcyclehi\",\n+ [HEX_SREG_ISDBST] = \"isdbst\",\n+ [HEX_SREG_ISDBCFG0] = \"isdbcfg0\",\n+ [HEX_SREG_ISDBCFG1] = \"isdbcfg1\",\n+ [HEX_SREG_LIVELOCK] = \"livelock\",\n+ [HEX_SREG_BRKPTPC0] = \"brkptpc0\",\n+ [HEX_SREG_BRKPTCFG0] = \"brkptcfg0\",\n+ [HEX_SREG_BRKPTPC1] = \"brkptpc1\",\n+ [HEX_SREG_BRKPTCFG1] = \"brkptcfg1\",\n+ [HEX_SREG_ISDBMBXIN] = \"isdbmbxin\",\n+ [HEX_SREG_ISDBMBXOUT] = \"isdbmbxout\",\n+ [HEX_SREG_ISDBEN] = \"isdben\",\n+ [HEX_SREG_ISDBGPR] = \"isdbgpr\",\n+ [HEX_SREG_PMUCNT4] = \"pmucnt4\",\n+ [HEX_SREG_PMUCNT5] = \"pmucnt5\",\n+ [HEX_SREG_PMUCNT6] = \"pmucnt6\",\n+ [HEX_SREG_PMUCNT7] = \"pmucnt7\",\n+ [HEX_SREG_PMUCNT0] = \"pmucnt0\",\n+ [HEX_SREG_PMUCNT1] = \"pmucnt1\",\n+ [HEX_SREG_PMUCNT2] = \"pmucnt2\",\n+ [HEX_SREG_PMUCNT3] = \"pmucnt3\",\n+ [HEX_SREG_PMUEVTCFG] = \"pmuevtcfg\",\n+ [HEX_SREG_PMUSTID0] = \"pmustid0\",\n+ [HEX_SREG_PMUEVTCFG1] = \"pmuevtcfg1\",\n+ [HEX_SREG_PMUSTID1] = \"pmustid1\",\n+ [HEX_SREG_TIMERLO] = \"timerlo\",\n+ [HEX_SREG_TIMERHI] = \"timerhi\",\n+ [HEX_SREG_PMUCFG] = \"pmucfg\",\n+ [HEX_SREG_S59] = \"s59\",\n+ [HEX_SREG_S60] = \"s60\",\n+ [HEX_SREG_S61] = \"s61\",\n+ [HEX_SREG_S62] = \"s62\",\n+ [HEX_SREG_S63] = \"s63\",\n+};\n+\n+static const char *get_sreg_name(uint32_t reg)\n+{\n+ if (reg < ARRAY_SIZE(hex_sreg_names) && hex_sreg_names[reg]) {\n+ return hex_sreg_names[reg];\n+ }\n+ return \"UNKNOWN\";\n+}\n+\n /* Global system register mutability masks */\n static const uint32_t global_sreg_immut_masks[NUM_SREGS] = {\n [HEX_SREG_EVB] = 0x000000ff,\n@@ -75,6 +146,7 @@ uint32_t hexagon_globalreg_read(HexagonGlobalRegState *s, uint32_t reg,\n \n value = s->regs[reg];\n \n+ trace_hexagon_globalreg_read(htid, get_sreg_name(reg), value);\n return value;\n }\n \n@@ -85,6 +157,7 @@ void hexagon_globalreg_write(HexagonGlobalRegState *s, uint32_t reg,\n g_assert(reg < NUM_SREGS);\n g_assert(reg >= HEX_SREG_GLB_START);\n s->regs[reg] = value;\n+ trace_hexagon_globalreg_write(htid, get_sreg_name(reg), value);\n }\n \n uint32_t hexagon_globalreg_masked_value(HexagonGlobalRegState *s, uint32_t reg,\ndiff --git a/hw/hexagon/trace-events b/hw/hexagon/trace-events\nnew file mode 100644\nindex 00000000000..5d623ed2516\n--- /dev/null\n+++ b/hw/hexagon/trace-events\n@@ -0,0 +1,3 @@\n+# Hexagon global register access\n+hexagon_globalreg_read(uint32_t htid, const char *reg_name, uint32_t value) \"htid=%u reg=%s value=0x%x\"\n+hexagon_globalreg_write(uint32_t htid, const char *reg_name, uint32_t value) \"htid=%u reg=%s value=0x%x\"\n", "prefixes": [ "v4", "2/9" ] }