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GET /api/1.1/patches/2221115/?format=api
{ "id": 2221115, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2221115/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260407215900.63390-5-philmd@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260407215900.63390-5-philmd@linaro.org>", "date": "2026-04-07T21:58:58", "name": "[PATCH-for-11.0,4/6] ati-vga: Fix setting CRTC_OFFSET", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e4d92ee879822805fcacd54ece50c73a4c7a5137", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/1.1/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260407215900.63390-5-philmd@linaro.org/mbox/", "series": [ { "id": 499182, "url": "http://patchwork.ozlabs.org/api/1.1/series/499182/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499182", "date": "2026-04-07T21:58:54", "name": "[PATCH-for-11.0,1/6] docs/about/removed-features: Replace 'since' -> 'removed in'", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499182/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221115/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221115/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=csyioh4U;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::336;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: BALATON Zoltan <balaton@eik.bme.hu>\n\nOffset (display start address) should also be updated when changing\nthe register value not only on mode change. Fix the register write\nmask to hard code bits 0:2 to 0 as the chip docs say and update the\nstart address on register write. This fixes virtual screen panning for\nscreens larger than displayed resolution.\n\nAs this register allows values that cannot be handled by the VBE_DISPI\nX and Y offsets (which is restricted by line length) we add a function\nto set it directly not through the VBE offsets.\n\nSigned-off-by: BALATON Zoltan <balaton@eik.bme.hu>\nTested-by: Chad Jablonski <chad@jablonski.xyz>\nReviewed-by: Chad Jablonski <chad@jablonski.xyz>\nMessage-ID: <2b8af6022aba06aa98a249ae67922de29d82d86f.1775228029.git.balaton@eik.bme.hu>\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n hw/display/ati.c | 34 +++++++++++++++++-----------------\n 1 file changed, 17 insertions(+), 17 deletions(-)", "diff": "diff --git a/hw/display/ati.c b/hw/display/ati.c\nindex 97d871b1e22..a283afbfff5 100644\n--- a/hw/display/ati.c\n+++ b/hw/display/ati.c\n@@ -48,6 +48,19 @@ static const struct {\n \n enum { VGA_MODE, EXT_MODE };\n \n+static void ati_vga_set_offset(VGACommonState *vga, uint32_t offs)\n+{\n+ int bypp = DIV_ROUND_UP(vga->vbe_regs[VBE_DISPI_INDEX_BPP], BITS_PER_BYTE);\n+\n+ if (!bypp ||\n+ vga->vbe_regs[VBE_DISPI_INDEX_YRES] *\n+ vga->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH] * bypp + offs >\n+ vga->vbe_size) {\n+ return;\n+ }\n+ vga->vbe_start_addr = offs / 4;\n+}\n+\n static void ati_vga_switch_mode(ATIVGAState *s)\n {\n DPRINTF(\"%d -> %d\\n\",\n@@ -109,26 +122,12 @@ static void ati_vga_switch_mode(ATIVGAState *s)\n vbe_ioport_write_data(&s->vga, 0, VBE_DISPI_ENABLED |\n VBE_DISPI_LFB_ENABLED | VBE_DISPI_NOCLEARMEM |\n (s->regs.dac_cntl & DAC_8BIT_EN ? VBE_DISPI_8BIT_DAC : 0));\n- /* now set offset and stride after enable as that resets these */\n+ /* now set offset and stride because enable resets these */\n if (stride) {\n- int bypp = DIV_ROUND_UP(bpp, BITS_PER_BYTE);\n-\n vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_VIRT_WIDTH);\n vbe_ioport_write_data(&s->vga, 0, stride);\n- stride *= bypp;\n- if (offs % stride) {\n- DPRINTF(\"CRTC offset is not multiple of pitch\\n\");\n- vbe_ioport_write_index(&s->vga, 0,\n- VBE_DISPI_INDEX_X_OFFSET);\n- vbe_ioport_write_data(&s->vga, 0, offs % stride / bypp);\n- }\n- vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_Y_OFFSET);\n- vbe_ioport_write_data(&s->vga, 0, offs / stride);\n- DPRINTF(\"VBE offset (%d,%d), vbe_start_addr=%x\\n\",\n- s->vga.vbe_regs[VBE_DISPI_INDEX_X_OFFSET],\n- s->vga.vbe_regs[VBE_DISPI_INDEX_Y_OFFSET],\n- s->vga.vbe_start_addr);\n }\n+ ati_vga_set_offset(&s->vga, offs);\n }\n } else {\n /* VGA mode enabled */\n@@ -737,7 +736,8 @@ static void ati_mm_write(void *opaque, hwaddr addr,\n s->regs.crtc_v_sync_strt_wid = data & 0x9f0fff;\n break;\n case CRTC_OFFSET:\n- s->regs.crtc_offset = data & 0xc7ffffff;\n+ s->regs.crtc_offset = data & 0x87fffff8;\n+ ati_vga_set_offset(&s->vga, s->regs.crtc_offset & 0x07ffffff);\n break;\n case CRTC_OFFSET_CNTL:\n s->regs.crtc_offset_cntl = data; /* FIXME */\n", "prefixes": [ "PATCH-for-11.0", "4/6" ] }