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GET /api/1.1/patches/2220946/?format=api
{ "id": 2220946, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220946/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260408091136.2794546-8-varadarajan.narayanan@oss.qualcomm.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260408091136.2794546-8-varadarajan.narayanan@oss.qualcomm.com>", "date": "2026-04-08T09:11:34", "name": "[v1,7/9] mach-snapdragon: Add initial support for IPQ5210 SPL", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "026196e0313cfa00676032d34529e700c23e1077", "submitter": { "id": 92283, "url": "http://patchwork.ozlabs.org/api/1.1/people/92283/?format=api", "name": "Varadarajan Narayanan", "email": "varadarajan.narayanan@oss.qualcomm.com" }, "delegate": { "id": 151538, "url": "http://patchwork.ozlabs.org/api/1.1/users/151538/?format=api", "username": "kcxt", "first_name": "Casey", "last_name": "Connolly", "email": "casey.connolly@linaro.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260408091136.2794546-8-varadarajan.narayanan@oss.qualcomm.com/mbox/", "series": [ { "id": 499137, "url": "http://patchwork.ozlabs.org/api/1.1/series/499137/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=499137", "date": "2026-04-08T09:11:27", "name": "Qualcomm IPQ5210 SoC bringup", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499137/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220946/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220946/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=hXP0Mhdl;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=UVeCP9Fr;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"hXP0Mhdl\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"UVeCP9Fr\";\n\tdkim-atps=neutral", "phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com", "phobos.denx.de; spf=pass\n smtp.mailfrom=varadarajan.narayanan@oss.qualcomm.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4frNPN1XMqz1yD3\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 08 Apr 2026 22:56:56 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 4FFD3841DF;\n\tWed, 8 Apr 2026 14:55:33 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 9D68A838BB; Wed, 8 Apr 2026 11:13:13 +0200 (CEST)", "from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id D437580433\n for <u-boot@lists.denx.de>; Wed, 8 Apr 2026 11:13:10 +0200 (CEST)", "from pps.filterd (m0279869.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 6388rp9b2412265\n for <u-boot@lists.denx.de>; Wed, 8 Apr 2026 09:13:09 GMT", "from mail-pl1-f200.google.com (mail-pl1-f200.google.com\n [209.85.214.200])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dd61vb10p-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for <u-boot@lists.denx.de>; Wed, 08 Apr 2026 09:13:09 +0000 (GMT)", "by mail-pl1-f200.google.com with SMTP id\n d9443c01a7336-2adef9d486bso88629055ad.2\n for <u-boot@lists.denx.de>; Wed, 08 Apr 2026 02:13:08 -0700 (PDT)", "from hu-varada-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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"snlakshm@qti.qualcomm.com, gopinath.sekar@oss.qualcomm.com", "Subject": "[PATCH v1 7/9] mach-snapdragon: Add initial support for IPQ5210 SPL", "Date": "Wed, 8 Apr 2026 14:41:34 +0530", "Message-Id": "<20260408091136.2794546-8-varadarajan.narayanan@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260408091136.2794546-1-varadarajan.narayanan@oss.qualcomm.com>", "References": "<20260408091136.2794546-1-varadarajan.narayanan@oss.qualcomm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDA4MDA4MiBTYWx0ZWRfX88y7HHPVP1SV\n GIIsrTv55Inkw0mpq/3xtnkNhpHn2NdK93d4B6uAU+huprfmdmTZNA80JgCE9bDKli/WxrwqfpR\n LbDrjGHa+LsGJy5dIaxBOa16GXYKkUrtvvUTom0ArhrhNrUUejghcZ+zU42WNYwdx5vnsCCL0EX\n sFDzhTbWyqZjoddMCIaV4Hin85paGtKxaNi82nbP8R2bLdbqwYmV9SFkZLGuJvj+KBJ1kGSvvlo\n 3DfVfCGqulYW1aX76WMzOGkqUSEaAj2WQtM6q7q2xz+Jti2BxhqUMPJYctaCIRjdZTEZohdmToK\n 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0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add basic SPL infrastructure for IPQ5210 SoC. This handles basic serial\nconsole init, identifying the boot media, loading the additional\nfirmware binaries to setup DDR, TFA and eventually jump to U-Boot.\n\nSigned-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>\n---\n arch/arm/Kconfig | 5 +-\n arch/arm/mach-snapdragon/Makefile | 3 +\n arch/arm/mach-snapdragon/spl.c | 701 ++++++++++++++++++++++++++++++\n include/smem.h | 3 +\n 4 files changed, 710 insertions(+), 2 deletions(-)\n create mode 100644 arch/arm/mach-snapdragon/spl.c", "diff": "diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\nindex cd6a454fd60..19d403515ff 100644\n--- a/arch/arm/Kconfig\n+++ b/arch/arm/Kconfig\n@@ -1132,12 +1132,13 @@ config ARCH_SNAPDRAGON\n \tselect SPMI\n \tselect BOARD_LATE_INIT\n \tselect OF_BOARD\n-\tselect SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK\n-\tselect LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK\n+\tselect SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK && !SPL\n+\tselect LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK && !SPL\n \tselect SYSRESET\n \tselect SYSRESET_PSCI\n \tselect ANDROID_BOOT_IMAGE_IGNORE_BLOB_ADDR\n \tselect MMU_PGPROT\n+\tselect SUPPORT_SPL\n \timply OF_UPSTREAM\n \timply CMD_DM\n \timply DM_USB_GADGET\ndiff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile\nindex 343e825c6fd..70a2ce585f2 100644\n--- a/arch/arm/mach-snapdragon/Makefile\n+++ b/arch/arm/mach-snapdragon/Makefile\n@@ -2,6 +2,9 @@\n #\n # (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>\n \n+ifndef CONFIG_XPL_BUILD\n obj-y += board.o\n obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += capsule_update.o\n obj-$(CONFIG_OF_LIVE) += of_fixup.o\n+endif\n+obj-$(CONFIG_SPL_BUILD) += spl.o\ndiff --git a/arch/arm/mach-snapdragon/spl.c b/arch/arm/mach-snapdragon/spl.c\nnew file mode 100644\nindex 00000000000..b54817db8f6\n--- /dev/null\n+++ b/arch/arm/mach-snapdragon/spl.c\n@@ -0,0 +1,701 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.\n+ */\n+#include <hang.h>\n+#include <cpu_func.h>\n+#include <init.h>\n+#include <image.h>\n+#include <spl.h>\n+#include <spl_load.h>\n+#include <asm/io.h>\n+#include <asm/system.h>\n+#include <asm/sections.h>\n+#include <smem.h>\n+#include <atf_common.h>\n+#include <linux/err.h>\n+#include <dm/device-internal.h>\n+#include <part.h>\n+#include <blk.h>\n+#include <dm/uclass.h>\n+\n+#define QCOM_SPL_TCSR_REG_ADDR\t\t0x195c100\n+#define QCOM_SPL_DLOAD_MASK\t\tGENMASK(4, 4)\n+#define QCOM_SPL_DLOAD_SHFT\t\t0x4\n+\n+#define QCOM_SPL_IS_DLOAD_BIT_SET\t((readl(QCOM_SPL_TCSR_REG_ADDR) & \\\n+\t\t\t\t\tQCOM_SPL_DLOAD_MASK) >> \\\n+\t\t\t\t\tQCOM_SPL_DLOAD_SHFT)\n+\n+#define QCOM_SPL_FIT_IMG_PARTITION\t\"0:BOOTLDR\"\n+\n+#define MAGIC_KEY\t\t\t\"QCLIB_CB\"\n+#define MAX_ENTRIES\t\t\t0xF\n+#define IF_TABLE_VERSION\t\t0x1\n+#define QCCONFIG\t\t\t\"qc_config\"\n+#define QCSDI\t\t\t\t\"qcsdi\"\n+\n+/**\n+ * struct interface_table_entry - Meta data for blobs in QCLIB interface\n+ * @entry_name:\tName of the data blob (e.g., \"dcb_settings\").\n+ * @address:\tAddress of the data blob.\n+ * @size:\tSize of the data blob.\n+ * @attributes:\tAttributes for the blob (e.g., save to storage).\n+ */\n+struct interface_table_entry {\n+\tchar entry_name[24];\n+\tu64 address;\n+\tu32 size;\n+\tu32 attributes;\n+};\n+\n+/**\n+ * struct interface_table - QCLIB Interface table header\n+ * @magic_key:\t\tMagic key for validation (\"QCLIB_CB\").\n+ * @version:\t\tInterface table version.\n+ * @num_entries:\tNumber of valid entries.\n+ * @max_entries:\tMaximum allowable entries.\n+ * @global_attributes:\tFlags for global attributes (e.g., SDI path).\n+ * @reserved1:\t\tReserved for future use.\n+ * @reserved2:\t\tReserved for future use.\n+ * @if_table_entries:\tArray of interface table entries.\n+ */\n+struct interface_table {\n+\tchar magic_key[8];\n+\tu32 version;\n+\tu32 num_entries;\n+\tu32 max_entries;\n+\tu32 global_attributes;\n+\tu32 reserved1;\n+\tu32 reserved2;\n+\tstruct interface_table_entry if_table_entries[MAX_ENTRIES];\n+};\n+\n+/**\n+ * qcom_spl_jump_img_entry_t - Type definition for image entry point functions.\n+ * @arg1:\tFirst argument passed to the entry point.\n+ * @arg2:\tSecond argument passed to the entry point.\n+ */\n+typedef void (*qcom_spl_jump_img_entry_t)(void *arg1, void *arg2);\n+\n+/*\n+ * Global QCSDI address populated by qclib_post_process_from_spl\n+ * Placed in .data section to ensure it persists\n+ */\n+static u64 g_qcsdi_address __section(\".data\");\n+\n+/**\n+ * lowlevel_init() - Early low-level initialization.\n+ *\n+ * This function performs very early hardware initialization,\n+ * specifically disabling the MMU if enabled by PBL.\n+ */\n+void lowlevel_init(void)\n+{\n+\tunsigned long sctlr;\n+\n+\tsctlr = get_sctlr();\n+\tset_sctlr(sctlr & ~(CR_M));\t/* Early disable the MMU */\n+}\n+\n+/**\n+ * qcom_spl_error_handler() - Centralized SPL error handler.\n+ * @arg:\tGeneric argument (unused).\n+ *\n+ * This function is invoked upon critical errors during the SPL boot process.\n+ */\n+void qcom_spl_error_handler(void *arg)\n+{\n+\tpr_err(\"Entered the SPL Error Handler\\n\");\n+\thang();\n+}\n+\n+/**\n+ * qcom_spl_malloc_init_f() - Initialize malloc for SPL.\n+ *\n+ * This function initializes the malloc subsystem using the memory region\n+ */\n+void qcom_spl_malloc_init_f(void)\n+{\n+\tif (!CONFIG_IS_ENABLED(SYS_MALLOC_F))\n+\t\treturn;\n+\t/*\n+\t * Set up by crt0.S\n+\t */\n+\tassert(gd->malloc_base);\n+\tgd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);\n+\tgd->malloc_ptr = 0;\n+\n+\tmem_malloc_init(gd->malloc_base, gd->malloc_limit);\n+\tgd->flags |= GD_FLG_FULL_MALLOC_INIT;\n+}\n+\n+/**\n+ * qcom_spl_get_fit_img_entry_point() - Get entry point from FIT image node.\n+ * @fit:\tPointer to the FIT image blob.\n+ * @node:\tNode ID within the FIT image.\n+ * @entry_point:Pointer to store the retrieved entry point.\n+ *\n+ * Return: 0 on success, or a negative error code on failure.\n+ */\n+static int qcom_spl_get_fit_img_entry_point(void *fit, int node,\n+\t\t\t\t\t u64 *entry_point)\n+{\n+\tint ret;\n+\n+\tif (!fit) {\n+\t\tpr_err(\"FIT image blob is NULL\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tif (node <= 0) {\n+\t\tpr_err(\"Invalid FIT node ID %d\\n\", node);\n+\t\treturn -EINVAL;\n+\t}\n+\tif (!entry_point) {\n+\t\tpr_err(\"Entry point pointer is NULL\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tret = fit_image_get_entry(fit, node, (ulong *)entry_point);\n+\tif (ret) {\n+\t\tpr_debug(\"No entry point for node %d, trying load address\\n\",\n+\t\t\t node);\n+\t\tret = fit_image_get_load(fit, node, (ulong *)entry_point);\n+\t\tif (ret)\n+\t\t\tpr_err(\"No load address for node %d (%d)\\n\", node, ret);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+#if IS_ENABLED(CONFIG_SPL_SMEM)\n+/**\n+ * qcom_spl_populate_smem() - Populate shared memory (SMEM) information.\n+ * @ctx:\tPointer to the global SPL context.\n+ *\n+ * This function initializes and populates various SMEM items with boot-related\n+ * information, such as flash type, try-mode status, and ATF enable status.\n+ * Return: 0 on success, or a negative error code on failure.\n+ */\n+static int qcom_spl_populate_smem(void *ctx)\n+{\n+\tint ret;\n+\tsize_t size;\n+\tstruct udevice *smem;\n+\tu32 *fltype, *trymode, *atf_en;\n+\n+\tret = uclass_get_device(UCLASS_SMEM, 0, &smem);\n+\tif (ret) {\n+\t\tpr_err(\"Failed to find SMEM node (%d)\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tsize = sizeof(u32);\n+\tret = smem_alloc(smem, -1, SMEM_BOOT_FLASH_TYPE, size);\n+\tif (ret) {\n+\t\tpr_err(\"Failed to alloc item: SMEM_BOOT_FLASH_TYPE (%d)\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tfltype = (u32 *)smem_get(smem, -1, SMEM_BOOT_FLASH_TYPE, &size);\n+\tif (!fltype) {\n+\t\tpr_err(\"Failed to get item: SMEM_BOOT_FLASH_TYPE\\n\");\n+\t\treturn -ENOENT;\n+\t}\n+\n+\tif (IS_ENABLED(CONFIG_SPL_MMC))\n+\t\t*fltype = SMEM_BOOT_MMC_FLASH;\n+\treturn 0;\n+}\n+#endif /* IS_ENABLED(CONFIG_SPL_SMEM) */\n+/**\n+ * qcom_spl_get_iftbl_entry_by_name() - Get an interface table entry by name.\n+ * @if_tbl:\tPointer to the QCLIB interface table.\n+ * @name:\tName of the entry to find.\n+ * @entry:\tPointer to a buffer where the found entry will be copied.\n+ *\n+ * Return: 0 on success, or a negative error code on failure.\n+ */\n+static int qcom_spl_get_iftbl_entry_by_name(struct interface_table *if_tbl,\n+\t\t\t\t\t char *name,\n+\t\t\t\t\t struct interface_table_entry *entry)\n+{\n+\tu8 uc_index;\n+\n+\tif (!if_tbl) {\n+\t\tpr_err(\"Invalid interface table\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tif (!name) {\n+\t\tpr_err(\"Invalid name\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tif (!entry) {\n+\t\tpr_err(\"Invalid entry pointer\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfor (uc_index = 0; uc_index < MAX_ENTRIES; uc_index++) {\n+\t\tif (strcmp(if_tbl->if_table_entries[uc_index].entry_name,\n+\t\t\t name) == 0) {\n+\t\t\tmemcpy(entry,\n+\t\t\t &if_tbl->if_table_entries[uc_index],\n+\t\t\t sizeof(struct interface_table_entry));\n+\t\t\treturn 0;\n+\t\t}\n+\t}\n+\tpr_err(\"Interface table entry '%s' not found\\n\", name);\n+\n+\treturn -ENOENT;\n+}\n+\n+/**\n+ * qclib_post_process_from_spl() - Post-process QCLIB image from SPL FIT address\n+ *\n+ * This function performs the same operations as qclib_post_process() but\n+ * takes no arguments. It gets the FIT image from CONFIG_SPL_LOAD_FIT_ADDRESS\n+ * and finds the qclib_1 node automatically.\n+ *\n+ * Return: 0 on success, or a negative error code on failure.\n+ */\n+int qclib_post_process_from_spl(void)\n+{\n+\tint ret;\n+\tint entry_idx;\n+\tint images_node;\n+\tint qcconfig_node;\n+\tint qclib_node;\n+\tconst void *fit;\n+\tstruct interface_table if_tbl;\n+\tstruct interface_table_entry qcsdi_entry;\n+\tqcom_spl_jump_img_entry_t qclib_entry;\n+\tu64 entry_point;\n+\n+\t/* Get FIT image from SPL load address */\n+\tfit = (const void *)CONFIG_SPL_LOAD_FIT_ADDRESS;\n+\n+\tif (!fit) {\n+\t\tpr_err(\"FIT image not found at CONFIG_SPL_LOAD_FIT_ADDRESS\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tpr_debug(\"QCLIB post-processing from SPL: fit=%p\\n\", fit);\n+\n+\t/*\n+\t * Find \"images\" node in FIT (get it once and reuse)\n+\t */\n+\timages_node = fdt_subnode_offset(fit, 0, \"images\");\n+\tif (images_node < 0) {\n+\t\tpr_err(\"Failed to find images node in FIT\\n\");\n+\t\treturn -ENOENT;\n+\t}\n+\n+\t/*\n+\t * Find \"qcconfig_1\" image node\n+\t */\n+\tqcconfig_node = fdt_subnode_offset(fit, images_node, \"qcconfig_1\");\n+\tif (qcconfig_node < 0) {\n+\t\tpr_err(\"Failed to find qcconfig_1 node in FIT\\n\");\n+\t\treturn -ENOENT;\n+\t}\n+\n+\t/*\n+\t * Find \"qclib_1\" image node\n+\t */\n+\tqclib_node = fdt_subnode_offset(fit, images_node, \"qclib_1\");\n+\tif (qclib_node < 0) {\n+\t\tpr_err(\"Failed to find qclib_1 node in FIT\\n\");\n+\t\treturn -ENOENT;\n+\t}\n+\n+\t/*\n+\t * Initialize the local interface table\n+\t */\n+\tmemset(&if_tbl, 0, sizeof(struct interface_table));\n+\tmemcpy(if_tbl.magic_key, MAGIC_KEY, strlen(MAGIC_KEY));\n+\n+\tif_tbl.version = IF_TABLE_VERSION;\n+\tif_tbl.num_entries = 0;\n+\tif_tbl.max_entries = MAX_ENTRIES;\n+\n+\t/*\n+\t * Add QCCONFIG entry to the interface table\n+\t */\n+\tentry_idx = 0;\n+\tmemcpy(if_tbl.if_table_entries[entry_idx].entry_name,\n+\t QCCONFIG, strlen(QCCONFIG));\n+\n+\tret = qcom_spl_get_fit_img_entry_point((void *)fit,\n+\t\t\t\t\t qcconfig_node,\n+\t\t\t\t\t &if_tbl.if_table_entries[entry_idx].address);\n+\tif (ret) {\n+\t\tpr_err(\"Failed to get qcconfig_1 entry point (%d)\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\tif_tbl.if_table_entries[entry_idx].attributes = 0;\n+\tif_tbl.num_entries = entry_idx + 1;\n+\n+\t/*\n+\t * Add QCSDI entry to the interface table\n+\t */\n+\tentry_idx++;\n+\tmemcpy(if_tbl.if_table_entries[entry_idx].entry_name,\n+\t QCSDI, strlen(QCSDI));\n+\n+\tif_tbl.if_table_entries[entry_idx].address = 0;\n+\tif_tbl.if_table_entries[entry_idx].attributes = 0;\n+\tif_tbl.num_entries = entry_idx + 1;\n+\n+\t/*\n+\t * Get qclib_1 entry point\n+\t */\n+\tret = qcom_spl_get_fit_img_entry_point((void *)fit,\n+\t\t\t\t\t qclib_node,\n+\t\t\t\t\t &entry_point);\n+\tif (ret) {\n+\t\tpr_err(\"Failed to get qclib_1 entry point (%d)\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tqclib_entry = (qcom_spl_jump_img_entry_t)entry_point;\n+\n+\tpr_info(\"Jumping to qclib_1 at 0x%llx\\n\", entry_point);\n+\tqclib_entry(&if_tbl, NULL);\n+\n+\t/* Parse the interface table to extract QCSDI address */\n+\tret = qcom_spl_get_iftbl_entry_by_name(&if_tbl, QCSDI, &qcsdi_entry);\n+\tif (ret) {\n+\t\tpr_err(\"Failed to get QCSDI entry from interface table (%d)\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tg_qcsdi_address = qcsdi_entry.address;\n+\tpr_info(\"QCSDI address: 0x%llx\\n\", g_qcsdi_address);\n+\n+\treturn 0;\n+}\n+\n+#if IS_ENABLED(CONFIG_SPL_SMEM)\n+/**\n+ * spl_board_prepare_for_boot() - Prepare board for boot\n+ *\n+ * This function is called by SPL before jumping to the next stage.\n+ * It populates SMEM during coldboot.\n+ */\n+void spl_board_prepare_for_boot(void)\n+{\n+\tint ret;\n+\n+\t/*\n+\t * Populate SMEM in coldboot (Dload bit not set)\n+\t */\n+\tif (!QCOM_SPL_IS_DLOAD_BIT_SET) {\n+\t\tprintf(\"Populating SMEM\\n\");\n+\t\tret = qcom_spl_populate_smem(NULL);\n+\t\tif (ret) {\n+\t\t\tpr_err(\"Failed to populate SMEM (%d)\\n\", ret);\n+\t\t\tqcom_spl_error_handler(NULL);\n+\t\t}\n+\t}\n+}\n+#endif /* IS_ENABLED(CONFIG_SPL_SMEM) */\n+\n+/**\n+ * spl_get_load_buffer() - Allocate a cache-aligned buffer for image loading.\n+ * @offset:\tOffset (unused, typically 0 for SPL).\n+ * @size:\tSize of the buffer to allocate.\n+ *\n+ * Return: Pointer to the allocated buffer, or NULL on failure.\n+ */\n+struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)\n+{\n+\treturn (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS);\n+}\n+\n+/**\n+ * board_spl_fit_buffer_addr() - Get the address of the FIT image buffer.\n+ * @fit_size:\tSize of the FIT image.\n+ * @sectors:\tNumber of sectors.\n+ * @bl_len:\tBlock length.\n+ *\n+ * Return: Address of the FIT image buffer.\n+ */\n+void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)\n+{\n+\tvoid *buffer = spl_get_load_buffer(0, sectors * bl_len);\n+\n+\tif (!buffer) {\n+\t\tpr_err(\"Failed to get FIT load buffer\\n\");\n+\t\tqcom_spl_error_handler(NULL);\n+\t}\n+\n+\treturn buffer;\n+}\n+\n+/**\n+ * bl2_plat_get_bl31_params_v2() - Retrieve and fixup BL31 parameters.\n+ * @bl32_entry:\tEntry point for BL32 (OP-TEE).\n+ * @bl33_entry:\tEntry point for BL33 (U-Boot/kernel).\n+ * @fdt_addr:\tAddress of the Device Tree Blob (FDT).\n+ *\n+ * Return: Pointer to the populated BL31 parameters structure.\n+ */\n+struct bl_params *bl2_plat_get_bl31_params_v2(uintptr_t bl32_entry,\n+\t\t\t\t\t uintptr_t bl33_entry,\n+\t\t\t\t\t uintptr_t fdt_addr)\n+{\n+\tstruct bl_params *bl_params;\n+\tstruct bl_params_node *node;\n+\n+\t/*\n+\t * Populate the bl31 params with default values.\n+\t */\n+\tbl_params = bl2_plat_get_bl31_params_v2_default(bl32_entry, bl33_entry,\n+\t\t\t\t\t\t\tfdt_addr);\n+\n+\t/*\n+\t * Fixup the bl31 params based on platform requirements.\n+\t */\n+\tfor_each_bl_params_node(bl_params, node) {\n+\t\tif (node->image_id == ATF_BL31_IMAGE_ID) {\n+\t\t\t/*\n+\t\t\t * Pass QCSDI address to BL31 via arg0\n+\t\t\t * This address was populated by qclib_post_process()\n+\t\t\t */\n+\t\t\tif (g_qcsdi_address == 0)\n+\t\t\t\tpr_warn(\"QCSDI address not set, BL31 may not function correctly\\n\");\n+\n+\t\t\tnode->ep_info->args.arg0 = g_qcsdi_address;\n+\t\t\tpr_debug(\"Setting BL31 arg0 to QCSDI address: 0x%llx\\n\", g_qcsdi_address);\n+\t\t}\n+\t}\n+\n+\treturn bl_params;\n+}\n+\n+/**\n+ * qcom_spl_loader_pre_ddr() - SPL loader for pre-DDR stage.\n+ * @boot_device:Type of boot device.\n+ *\n+ * Return: 0 on success, or a negative error code on failure.\n+ */\n+static int qcom_spl_loader_pre_ddr(u8 boot_device)\n+{\n+\tstruct spl_image_loader *loader, *drv;\n+\tstruct spl_image_info spl_image = { 0 };\n+\tstruct spl_boot_device boot_dev = { .boot_device = boot_device, };\n+\tint ret = -ENODEV, n_ents;\n+\n+\tdrv = ll_entry_start(struct spl_image_loader, spl_image_loader);\n+\tn_ents = ll_entry_count(struct spl_image_loader, spl_image_loader);\n+\n+\tfor (loader = drv; loader && (loader != drv + n_ents); loader++) {\n+\t\tif (boot_device != loader->boot_device)\n+\t\t\tcontinue;\n+\n+\t\tret = loader->load_image(&spl_image, &boot_dev);\n+\t\tif (!ret)\n+\t\t\tbreak;\n+\n+\t\tprintf(\"%s: Error: %d\\n\", __func__, ret);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * spl_find_partition_info() - Find partition information by name\n+ * @uclass_id: Device class ID (UCLASS_MMC)\n+ * @device_num: Device number within the class\n+ * @part_name: Name of the partition to find\n+ * @info: Pointer to store partition information\n+ *\n+ * This function provides partition lookup logic for MMC.\n+ * Return: Partition number on success, negative error code on failure\n+ */\n+static int spl_find_partition_info(enum uclass_id uclass_id, int device_num,\n+\t\t\t\t const char *part_name,\n+\t\t\t\t struct disk_partition *info)\n+{\n+\tint ret;\n+\tstruct blk_desc *desc;\n+\n+\tif (!part_name || !info) {\n+\t\tprintf(\"Invalid parameters for partition lookup\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/*\n+\t * Get block device descriptor\n+\t */\n+\tdesc = blk_get_devnum_by_uclass_id(uclass_id, device_num);\n+\tif (!desc) {\n+\t\tprintf(\"Block device not found for class %d, device %d\\n\",\n+\t\t uclass_id, device_num);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\t/*\n+\t * Initialize partition table if needed\n+\t */\n+\tif (desc->part_type == PART_TYPE_UNKNOWN) {\n+\t\tprintf(\"Initializing partition table\\n\");\n+\t\t/*\n+\t\t * Prefer EFI/GPT\n+\t\t */\n+\t\tdesc->part_type = PART_TYPE_EFI;\n+\t}\n+\n+\t/*\n+\t * Find partition by name\n+\t */\n+\tret = part_get_info_by_name(desc, part_name, info);\n+\tif (ret < 0) {\n+\t\tprintf(\"Partition '%s' not found\\n\", part_name);\n+\t\treturn -ENOENT;\n+\t}\n+\n+\tprintf(\"Found partition '%s' at partition number %d\\n\", part_name, ret);\n+\treturn ret;\n+}\n+\n+#if CONFIG_IS_ENABLED(MMC)\n+/**\n+ * spl_mmc_boot_mode() - Determine the boot mode for MMC\n+ * @mmc:\tPointer to the MMC device\n+ * @boot_device:\tBoot device ID\n+ *\n+ * Return: MMCSD_MODE_RAW to use raw partition access\n+ */\n+u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)\n+{\n+\treturn MMCSD_MODE_RAW;\n+}\n+\n+/**\n+ * spl_mmc_boot_partition() - Determine which partition to boot from\n+ * @boot_device:\tBoot device ID\n+ *\n+ * Return: Partition number to boot from, or default partition on error\n+ */\n+int spl_mmc_boot_partition(const u32 boot_device)\n+{\n+\tint ret;\n+\tstruct disk_partition info;\n+\n+\t/*\n+\t * Use common partition lookup function\n+\t */\n+\tret = spl_find_partition_info(UCLASS_MMC, 0, QCOM_SPL_FIT_IMG_PARTITION, &info);\n+\tif (ret < 0) {\n+\t\tprintf(\"Using default MMC partition %d\\n\",\n+\t\t CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);\n+\t\treturn CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * spl_mmc_get_uboot_raw_sector() - Find the raw sector offset\n+ * @mmc:\tPointer to the MMC device\n+ * @raw_sect:\tSector\n+ *\n+ * Return: 0 if the image is at the starting of the partition without any offset.\n+ */\n+unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, ulong raw_sect)\n+{\n+\treturn 0;\n+}\n+#endif /* CONFIG_IS_ENABLED(MMC) */\n+\n+/**\n+ * spl_boot_device() - Determine the boot device.\n+ *\n+ * Return: The mapped boot device type,\n+ *\t or BOOT_DEVICE_NONE if the device is invalid.\n+ */\n+u32 spl_boot_device(void)\n+{\n+\tif (IS_ENABLED(CONFIG_SPL_MMC)) {\n+\t\tprintf(\"Selected boot device: MMC\\n\");\n+\t\treturn BOOT_DEVICE_MMC1;\n+\t}\n+\n+\tpr_err(\"No boot device configured\\n\");\n+\treturn BOOT_DEVICE_NONE;\n+}\n+\n+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_FRAMEWORK_BOARD_INIT_F)\n+/**\n+ * board_init_f() - Main entry point for SPL.\n+ * @dummy:\tDummy argument (unused).\n+ */\n+void board_init_f(ulong dummy)\n+{\n+\tint ret;\n+\n+\tmemset(__bss_start, 0, __bss_end - __bss_start); /* Clear BSS */\n+\n+\tqcom_spl_malloc_init_f();\n+\n+\tret = spl_early_init();\n+\tif (ret) {\n+\t\tpr_debug(\"spl_early_init() failed (%d)\\n\", ret);\n+\t\tgoto fail;\n+\t}\n+\n+\tpreloader_console_init();\n+\n+\tret = qcom_spl_loader_pre_ddr(spl_boot_device());\n+\tif (ret) {\n+\t\tpr_debug(\"qcom_spl_loader_pre_ddr() failed (%d)\\n\", ret);\n+\t\tgoto fail;\n+\t}\n+\n+\tqclib_post_process_from_spl();\n+\n+\tboard_init_r(NULL, 0);\n+\n+fail:\n+\tif (ret)\n+\t\tqcom_spl_error_handler(NULL);\n+}\n+#endif /* CONFIG_SPL_BUILD && !defined(CONFIG_SPL_FRAMEWORK_BOARD_INIT_F) */\n+\n+int board_fit_config_name_match(const char *name)\n+{\n+\t/*\n+\t * SPL loads the pre-HLOS images from bootldr FIT image\n+\t * as below\n+\t *\n+\t * In board_init_f() - Matches \"pre-ddr\" configuration node and\n+\t * load the images mentioned in its <loadables>\n+\t *\n+\t * In board_init_r() - Matches \"post-ddr\" configuration node and\n+\t * load the images mentioned in its <loadables>\n+\t *\n+\t */\n+\tif (!(gd->flags & GD_FLG_SPL_INIT)) {\n+\t\tif (!strcmp(name, \"pre-ddr\")) {\n+\t\t\tprintf(\"Selected FIT Config: %s\\n\", name);\n+\t\t\treturn 0;\n+\t\t}\n+\t} else {\n+\t\tif (!strcmp(name, \"post-ddr\")) {\n+\t\t\tprintf(\"Selected FIT Config: %s\\n\", name);\n+\t\t\treturn 0;\n+\t\t}\n+\t}\n+\n+\treturn -EINVAL;\n+}\n+\n+int board_fdt_blob_setup(void **fdtp)\n+{\n+\treturn 0;\n+}\n+\n+void reset_cpu(void)\n+{\n+}\ndiff --git a/include/smem.h b/include/smem.h\nindex b19c534ebc4..f16ba7d63dc 100644\n--- a/include/smem.h\n+++ b/include/smem.h\n@@ -87,4 +87,7 @@ void *smem_get(struct udevice *dev, unsigned int host, unsigned int item, size_t\n */\n int smem_get_free_space(struct udevice *dev, unsigned int host);\n \n+#define SMEM_BOOT_FLASH_TYPE\t\t\t498\n+#define SMEM_BOOT_MMC_FLASH\t\t\t5\n+\n #endif /* _smem_h_ */\n", "prefixes": [ "v1", "7/9" ] }