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GET /api/1.1/patches/2220878/?format=api
{ "id": 2220878, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220878/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260408110026.3841268-2-kishan@linux.ibm.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260408110026.3841268-2-kishan@linux.ibm.com>", "date": "2026-04-08T11:00:27", "name": "rs6000: Add -mcpu=future support and built-in gating infrastructure", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "4e3a56f6b928555f42f15d52cf196523149b9d81", "submitter": { "id": 90920, "url": "http://patchwork.ozlabs.org/api/1.1/people/90920/?format=api", "name": "Kishan Parmar", "email": "kishan@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260408110026.3841268-2-kishan@linux.ibm.com/mbox/", "series": [ { "id": 499118, "url": "http://patchwork.ozlabs.org/api/1.1/series/499118/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=499118", "date": "2026-04-08T11:00:27", "name": "rs6000: Add -mcpu=future support and built-in gating infrastructure", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499118/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220878/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220878/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=B3DQ3Mvw;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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a=rsa-sha256; d=sourceware.org; s=key; t=1775646065; cv=none;\n b=YzCki4DWOu3fI7aWOknu4bmhZbZ7hQzosEkUowZf1iZs1YTlSxvpUMX7qm6MRE81ZaX0JzFZW8jMaippgsX1NDHOZm/MjidB+j8n0OkQM6TecUZZTE3jD4SeQiZgBQqBqI44tPTuLfpEDo6r25IRXjxkPpWg4e/YBnALKDfJbbo=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1775646065; c=relaxed/simple;\n bh=5wOtk3VyFzJciC8lW5x/zeNbphh5G9/8/ArFC671ESs=;\n h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version;\n b=MeB7bz9TdTyer75c4FZz4QvZxXlvpKRArvek6IByCd4vHSANSZpspuUHzrdGcN7F/Emf6BvCAusyLXOvISg2J302/6uXX4IO6OabikP1uojBrLoZzX/IbLZBBkPQTK6jZ9Emo9sfsX2WzLMRqASkFuYyv/PCh++AO2ZpATvFYvU=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc\n :content-transfer-encoding:date:from:message-id:mime-version\n :subject:to; s=pp1; bh=vzpoYS97jRtJGO8sPmwZjWs2rOLCXKDwGsHqMEloR\n lo=; b=B3DQ3Mvw5US2x9y7RKs+2zyn2C45STC3VnDejfDnMT2DGDUanP/XlY6rl\n aL8ugGxG8pLnrnNIvLc/cQanYD5hHW09drtIJPoaCHX2eeh3CYynX4xwOMi/tKPs\n DqxX9FVBehJJdWiGAMe0m7r6j82bkXXZms06Poz5fiJ7rThwqOXK9jBr7BqsciDG\n UzEsqnUUq8hmZjR2NyAejgmbG2Ow9twb5UeBMInozLDl+qnffQK2mod1jsC7QSK2\n q/ytggtvXKVqoVnXhsvFhmwHWBtiXfZVEcFUODoaP+Lh9KdnAZlP5LzR/2HKJ4dR\n 4KFGBAxlTXZdZoDxccwOrxuvKnYlA==", "From": "Kishan Parmar <kishan@linux.ibm.com>", "To": "meissner@linux.ibm.com, jskumari@linux.ibm.com", "Cc": "segher@kernel.crashing.org, mmatti@linux.ibm.com, gcc-patches@gcc.gnu.org,\n avinashd@linux.ibm.com, vijay@linux.ibm.com,\n Kishan Parmar <kishanparmar@ibm.com>", "Subject": "[PATCH] rs6000: Add -mcpu=future support and built-in gating\n infrastructure", "Date": "Wed, 8 Apr 2026 16:30:27 +0530", "Message-ID": "<20260408110026.3841268-2-kishan@linux.ibm.com>", "X-Mailer": "git-send-email 2.47.3", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-TM-AS-GCONF": "00", "X-Authority-Analysis": "v=2.4 cv=FKArAeos c=1 sm=1 tr=0 ts=69d6356f cx=c_pps\n a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22\n a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=z6p5yyXHg3596L_sHI4A:9", "X-Proofpoint-ORIG-GUID": "dxX1R0zp4DFkUoEdR3I4FqObbQP5Gdt4", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDA4MDA5OSBTYWx0ZWRfXyaZhAEn/x9gW\n RV31y/cseFCeF3LIqv7Fu1/t8/iPfYxpAt/NKlEN/S03oRDj4TqUC9xG9pCUtB4KbhrNnQNKchM\n Peo3CvWwIw1XZq0pFXlRojySQuofy+PbM15ZVWxTTBdMgLtkqdZ5HWjXI25ggPwB58NYZoM5aSp\n 5/mSVRr7NGqK915jA1hoEocQDth0p8tICVujoQbziPOuJGmk6FWDBN4Icmrkj0+QwpyFDl4BWAu\n kIk004PkRw1VY3hUW/k/t/Xic4QwTjiZEyJVvLxXhbHuhwdsIwksIkATK2kPD+cz7kFWe/hUU6V\n g6tWgghzOS1E9GCGeE9iLrM7j4PYKmHAtWSQK9TxHtvM/QGKU3foPrCP36WEfkxn8+uIji+j0dN\n f9K/jZa2PSPdM6/eaEjV19f0N2ipAMSYpjHWSZAvPxh4QC9bbEDYvwesrGYZIw4qCqGxfW02Ziy\n EAPG57mkEUGjgU/Zj3w==", "X-Proofpoint-GUID": "dxX1R0zp4DFkUoEdR3I4FqObbQP5Gdt4", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-08_03,2026-04-08_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 bulkscore=0\n suspectscore=0 priorityscore=1501 impostorscore=0 spamscore=0 phishscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604080099", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "From: Kishan Parmar <kishanparmar@ibm.com>\n\nHello,\n\nThis patch introduces support for the -mcpu=future option, intended to\nenable experimental processor features that may or may not be included\nin future Power processors. The option serves as a placeholder for\ndevelopment and evaluation purposes, and may be renamed if a\ncorresponding processor is defined.\n\nIn addition, this change adds support for gating rs6000 built-ins using a\nnew target predicate \"future\", corresponding to -mcpu=future. This\nextends rs6000-gen-builtins.cc and rs6000-builtin.cc to recognize\n[future] as a valid predicate, allowing new built-ins defined in .bif\nfiles to be conditionally enabled.\n\nBootstrapped and Regtested on Power10 little-endian system, using the\n--with-cpu=future configuration option.\n\n2026-04-08 Kishan Parmar <kishan@linux.ibm.com>\n\ngcc/\n\t* config.gcc (powerpc*-*-*): Add support for supporting\n\t--with-cpu=future.\n\t* config/rs6000/aix71.h (ASM_CPU_SPEC): Pass -mfuture to the assembler\n\tif the user used the -mcpu=future option.\n\t* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.\n\t* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.\n\t* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle\n\tENB_FUTURE and issue diagnostic requiring -mcpu=future.\n\t(rs6000_builtin_is_supported): Return TARGET_FUTURE for\n\tENB_FUTURE built-ins.\n\t* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define\n\t_ARCH_FUTURE if -mcpu=future.\n\t* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.\n\t(POWERPC_MASKS): Add OPTION_MASK_FUTURE.\n\t(rs6000_cpu_opt_value): New entry for 'future' via the RS6000_CPU macro.\n\t* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add\n\tBSTZ_FUTURE for future.\n\t(write_decls): Add ENB_FUTURE in bif_enable enum of generated header\n\tfile.\n\t* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.\n\t* config/rs6000/rs6000-tables.opt: Regenerate.\n\t* config/rs6000/rs6000.cc (rs6000_machine_from_flags) If -mcpu=future,\n\tset the .machine directive to \"future\".\n\t(rs6000_opt_masks): Add entry for -mfuture.\n\t* config/rs6000/rs6000.h (ASM_CPU_SPEC): Pass -mfuture to the assembler\n\tif the user used the -mcpu=future option.\n\t* config/rs6000/rs6000.opt (-mfuture): New option.\n\t* doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document\n\t-mcpu=future.\n---\n gcc/config.gcc | 4 ++--\n gcc/config/rs6000/aix71.h | 1 +\n gcc/config/rs6000/aix72.h | 1 +\n gcc/config/rs6000/aix73.h | 1 +\n gcc/config/rs6000/rs6000-builtin.cc | 5 +++++\n gcc/config/rs6000/rs6000-c.cc | 2 ++\n gcc/config/rs6000/rs6000-cpus.def | 6 ++++++\n gcc/config/rs6000/rs6000-gen-builtins.cc | 10 ++++++---\n gcc/config/rs6000/rs6000-opts.h | 2 ++\n gcc/config/rs6000/rs6000-tables.opt | 11 ++++++----\n gcc/config/rs6000/rs6000.cc | 3 +++\n gcc/config/rs6000/rs6000.h | 1 +\n gcc/config/rs6000/rs6000.opt | 4 ++++\n gcc/doc/invoke.texi | 4 ++--\n gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +++++++++++\n gcc/testsuite/gcc.target/powerpc/future-2.c | 24 +++++++++++++++++++++\n 16 files changed, 81 insertions(+), 11 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/powerpc/future-1.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/future-2.c", "diff": "diff --git a/gcc/config.gcc b/gcc/config.gcc\nindex 34591bff970..42772b69dc8 100644\n--- a/gcc/config.gcc\n+++ b/gcc/config.gcc\n@@ -555,7 +555,7 @@ powerpc*-*-*)\n \textra_headers=\"${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h\"\n \textra_headers=\"${extra_headers} amo.h\"\n \tcase x$with_cpu in\n-\t xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)\n+\t xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xfuture|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)\n \t\tcpu_is_64bit=yes\n \t\t;;\n \tesac\n@@ -5846,7 +5846,7 @@ case \"${target}\" in\n \t\t\t\teval \"with_$which=405\"\n \t\t\t\t;;\n \t\t\t\"\" | common | native \\\n-\t\t\t| power[3456789] | power1[01] | power5+ | power6x \\\n+\t\t\t| power[3456789] | power1[01] | future | power5+ | power6x \\\n \t\t\t| powerpc | powerpc64 | powerpc64le \\\n \t\t\t| rs64 \\\n \t\t\t| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \\\ndiff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h\nindex 3093de62088..2331004344f 100644\n--- a/gcc/config/rs6000/aix71.h\n+++ b/gcc/config/rs6000/aix71.h\n@@ -79,6 +79,7 @@ do {\t\t\t\t\t\t\t\t\t\\\n #undef ASM_CPU_SPEC\n #define ASM_CPU_SPEC \\\n \"%{mcpu=native: %(asm_cpu_native); \\\n+ mcpu=future: -mfuture; \\\n mcpu=power11: -mpwr11; \\\n mcpu=power10: -mpwr10; \\\n mcpu=power9: -mpwr9; \\\ndiff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h\nindex 515eeebe5aa..9105f4254d0 100644\n--- a/gcc/config/rs6000/aix72.h\n+++ b/gcc/config/rs6000/aix72.h\n@@ -79,6 +79,7 @@ do {\t\t\t\t\t\t\t\t\t\\\n #undef ASM_CPU_SPEC\n #define ASM_CPU_SPEC \\\n \"%{mcpu=native: %(asm_cpu_native); \\\n+ mcpu=future: -mfuture; \\\n mcpu=power11: -mpwr11; \\\n mcpu=power10: -mpwr10; \\\n mcpu=power9: -mpwr9; \\\ndiff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h\nindex d89a4a197b3..8316decceae 100644\n--- a/gcc/config/rs6000/aix73.h\n+++ b/gcc/config/rs6000/aix73.h\n@@ -79,6 +79,7 @@ do {\t\t\t\t\t\t\t\t\t\\\n #undef ASM_CPU_SPEC\n #define ASM_CPU_SPEC \\\n \"%{mcpu=native: %(asm_cpu_native); \\\n+ mcpu=future: -mfuture; \\\n mcpu=power11: -mpwr11; \\\n mcpu=power10: -mpwr10; \\\n mcpu=power9: -mpwr9; \\\ndiff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc\nindex bbf60de3b1b..7661147d05c 100644\n--- a/gcc/config/rs6000/rs6000-builtin.cc\n+++ b/gcc/config/rs6000/rs6000-builtin.cc\n@@ -139,6 +139,9 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)\n case ENB_MMA:\n error (\"%qs requires the %qs option\", name, \"-mmma\");\n break;\n+ case ENB_FUTURE:\n+ error (\"%qs requires the %qs option\", name, \"-mcpu=future\");\n+ break;\n default:\n case ENB_ALWAYS:\n gcc_unreachable ();\n@@ -194,6 +197,8 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)\n return TARGET_HTM;\n case ENB_MMA:\n return TARGET_MMA;\n+ case ENB_FUTURE:\n+ return TARGET_FUTURE;\n default:\n gcc_unreachable ();\n }\ndiff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc\nindex b230d9a7345..2e29e4ada21 100644\n--- a/gcc/config/rs6000/rs6000-c.cc\n+++ b/gcc/config/rs6000/rs6000-c.cc\n@@ -437,6 +437,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)\n rs6000_define_or_undefine_macro (define_p, \"_ARCH_PWR10\");\n if ((flags & OPTION_MASK_POWER11) != 0)\n rs6000_define_or_undefine_macro (define_p, \"_ARCH_PWR11\");\n+ if ((flags & OPTION_MASK_FUTURE) != 0)\n+ rs6000_define_or_undefine_macro (define_p, \"_ARCH_FUTURE\");\n if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)\n rs6000_define_or_undefine_macro (define_p, \"_SOFT_FLOAT\");\n if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)\ndiff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def\nindex 36be338493e..a110860acce 100644\n--- a/gcc/config/rs6000/rs6000-cpus.def\n+++ b/gcc/config/rs6000/rs6000-cpus.def\n@@ -83,6 +83,10 @@\n #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER\t\t\t\\\n \t\t\t | OPTION_MASK_POWER11)\n \n+/* -mcpu=future flags. */\n+#define FUTURE_MASKS_SERVER\t(POWER11_MASKS_SERVER\t\t\t\\\n+\t\t\t\t | OPTION_MASK_FUTURE)\n+\n /* Flags that need to be turned off if -mno-vsx. */\n #define OTHER_VSX_VECTOR_MASKS\t(OPTION_MASK_EFFICIENT_UNALIGNED_VSX\t\\\n \t\t\t\t | OPTION_MASK_FLOAT128_KEYWORD\t\t\\\n@@ -121,6 +125,7 @@\n \t\t\t\t | OPTION_MASK_FPRND\t\t\t\\\n \t\t\t\t | OPTION_MASK_POWER10\t\t\t\\\n \t\t\t\t | OPTION_MASK_POWER11\t\t\t\\\n+\t\t\t\t | OPTION_MASK_FUTURE\t\t\t\\\n \t\t\t\t | OPTION_MASK_P10_FUSION\t\t\\\n \t\t\t\t | OPTION_MASK_HTM\t\t\t\\\n \t\t\t\t | OPTION_MASK_ISEL\t\t\t\\\n@@ -249,6 +254,7 @@ RS6000_CPU (\"power9\", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER\n \t | OPTION_MASK_HTM)\n RS6000_CPU (\"power10\", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER)\n RS6000_CPU (\"power11\", PROCESSOR_POWER11, MASK_POWERPC64 | POWER11_MASKS_SERVER)\n+RS6000_CPU (\"future\", PROCESSOR_FUTURE, MASK_POWERPC64 | FUTURE_MASKS_SERVER)\n RS6000_CPU (\"powerpc\", PROCESSOR_POWERPC, 0)\n RS6000_CPU (\"powerpc64\", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT\n \t | MASK_POWERPC64)\ndiff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc b/gcc/config/rs6000/rs6000-gen-builtins.cc\nindex c7ae5899c5c..7436404cff5 100644\n--- a/gcc/config/rs6000/rs6000-gen-builtins.cc\n+++ b/gcc/config/rs6000/rs6000-gen-builtins.cc\n@@ -232,6 +232,7 @@ enum bif_stanza\n BSTZ_P10,\n BSTZ_P10_64,\n BSTZ_MMA,\n+ BSTZ_FUTURE,\n NUMBIFSTANZAS\n };\n \n@@ -265,7 +266,8 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] =\n { \"htm\",\t\tBSTZ_HTM\t},\n { \"power10\",\tBSTZ_P10\t},\n { \"power10-64\",\tBSTZ_P10_64\t},\n- { \"mma\",\t\tBSTZ_MMA\t}\n+ { \"mma\",\t\tBSTZ_MMA\t},\n+ { \"future\",\tBSTZ_FUTURE\t}\n };\n \n static const char *enable_string[NUMBIFSTANZAS] =\n@@ -290,7 +292,8 @@ static const char *enable_string[NUMBIFSTANZAS] =\n \"ENB_HTM\",\n \"ENB_P10\",\n \"ENB_P10_64\",\n- \"ENB_MMA\"\n+ \"ENB_MMA\",\n+ \"ENB_FUTURE\"\n };\n \n /* Function modifiers provide special handling for const, pure, and fpmath\n@@ -2249,7 +2252,8 @@ write_decls (void)\n fprintf (header_file, \" ENB_HTM,\\n\");\n fprintf (header_file, \" ENB_P10,\\n\");\n fprintf (header_file, \" ENB_P10_64,\\n\");\n- fprintf (header_file, \" ENB_MMA\\n\");\n+ fprintf (header_file, \" ENB_MMA,\\n\");\n+ fprintf (header_file, \" ENB_FUTURE\\n\");\n fprintf (header_file, \"};\\n\\n\");\n \n fprintf (header_file, \"#define PPC_MAXRESTROPNDS 3\\n\");\ndiff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h\nindex db308065a43..c98cdc7d5c8 100644\n--- a/gcc/config/rs6000/rs6000-opts.h\n+++ b/gcc/config/rs6000/rs6000-opts.h\n@@ -71,6 +71,8 @@ enum processor_type\n PROCESSOR_TITAN\n };\n \n+/* Make -mtune=future use the same tuning decisions as -mtune=power11. */\n+#define PROCESSOR_FUTURE\tPROCESSOR_POWER11\n \n /* Types of costly dependences. */\n enum rs6000_dependence_cost\ndiff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt\nindex 040c246c2f6..efc55260b2a 100644\n--- a/gcc/config/rs6000/rs6000-tables.opt\n+++ b/gcc/config/rs6000/rs6000-tables.opt\n@@ -189,14 +189,17 @@ EnumValue\n Enum(rs6000_cpu_opt_value) String(power11) Value(53)\n \n EnumValue\n-Enum(rs6000_cpu_opt_value) String(powerpc) Value(54)\n+Enum(rs6000_cpu_opt_value) String(future) Value(54)\n \n EnumValue\n-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55)\n+Enum(rs6000_cpu_opt_value) String(powerpc) Value(55)\n \n EnumValue\n-Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)\n+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56)\n \n EnumValue\n-Enum(rs6000_cpu_opt_value) String(rs64) Value(57)\n+Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57)\n+\n+EnumValue\n+Enum(rs6000_cpu_opt_value) String(rs64) Value(58)\n \ndiff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc\nindex 42a4d7bb622..c79a505914c 100644\n--- a/gcc/config/rs6000/rs6000.cc\n+++ b/gcc/config/rs6000/rs6000.cc\n@@ -5913,6 +5913,8 @@ rs6000_machine_from_flags (void)\n flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL\n \t | OPTION_MASK_ALTIVEC);\n \n+ if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0)\n+ return \"future\";\n if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)\n return \"power11\";\n if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)\n@@ -24466,6 +24468,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =\n { \"fprnd\",\t\t\tOPTION_MASK_FPRND,\t\tfalse, true },\n { \"power10\",\t\t\tOPTION_MASK_POWER10,\t\tfalse, true },\n { \"power11\",\t\t\tOPTION_MASK_POWER11,\t\tfalse, false },\n+ { \"future\",\t\t\tOPTION_MASK_FUTURE,\t\tfalse, false },\n { \"hard-dfp\",\t\t\tOPTION_MASK_DFP,\t\tfalse, true },\n { \"htm\",\t\t\tOPTION_MASK_HTM,\t\tfalse, true },\n { \"isel\",\t\t\tOPTION_MASK_ISEL,\t\tfalse, true },\ndiff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h\nindex 2b90694cef1..2d3016db513 100644\n--- a/gcc/config/rs6000/rs6000.h\n+++ b/gcc/config/rs6000/rs6000.h\n@@ -101,6 +101,7 @@\n you make changes here, make them also there. */\n #define ASM_CPU_SPEC \\\n \"%{mcpu=native: %(asm_cpu_native); \\\n+ mcpu=future: -mfuture; \\\n mcpu=power11: -mpower11; \\\n mcpu=power10: -mpower10; \\\n mcpu=power9: -mpower9; \\\ndiff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt\nindex 2eeb45a4b71..2b6ec5222fc 100644\n--- a/gcc/config/rs6000/rs6000.opt\n+++ b/gcc/config/rs6000/rs6000.opt\n@@ -595,6 +595,10 @@ Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved\n mpower11\n Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved\n \n+;; Potential future machine\n+mfuture\n+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>, use %<-mcpu=future>)\n+\n mprefixed\n Target Mask(PREFIXED) Var(rs6000_isa_flags)\n Generate (do not generate) prefixed memory instructions.\ndiff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi\nindex b01787d29fc..46adb9945f4 100644\n--- a/gcc/doc/invoke.texi\n+++ b/gcc/doc/invoke.texi\n@@ -31570,8 +31570,8 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},\n @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},\n @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},\n @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},\n-@samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc}, @samp{powerpc64},\n-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.\n+@samp{power9}, @samp{power10}, @samp{power11}, @samp{future}, @samp{powerpc},\n+@samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}.\n \n @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and\n @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either\ndiff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c b/gcc/testsuite/gcc.target/powerpc/future-1.c\nnew file mode 100644\nindex 00000000000..7bd8e5ddbd0\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/future-1.c\n@@ -0,0 +1,13 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+/* Basic check to see if the compiler supports -mcpu=future and if it defines\n+ _ARCH_FUTURE. */\n+\n+#ifndef _ARCH_FUTURE\n+#error \"-mcpu=future is not supported\"\n+#endif\n+\n+void foo (void)\n+{\n+}\ndiff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c b/gcc/testsuite/gcc.target/powerpc/future-2.c\nnew file mode 100644\nindex 00000000000..5552cefa3c2\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/future-2.c\n@@ -0,0 +1,24 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+\n+/* Check if we can set the future target via a target attribute. */\n+\n+__attribute__((__target__(\"cpu=power9\")))\n+void foo_p9 (void)\n+{\n+}\n+\n+__attribute__((__target__(\"cpu=power10\")))\n+void foo_p10 (void)\n+{\n+}\n+\n+__attribute__((__target__(\"cpu=power11\")))\n+void foo_p11 (void)\n+{\n+}\n+\n+__attribute__((__target__(\"cpu=future\")))\n+void foo_future (void)\n+{\n+}\n", "prefixes": [] }