Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2220827/?format=api
{ "id": 2220827, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220827/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260408072123.7543-2-dave.patel@riscstar.com/", "project": { "id": 67, "url": "http://patchwork.ozlabs.org/api/1.1/projects/67/?format=api", "name": "OpenSBI development", "link_name": "opensbi", "list_id": "opensbi.lists.infradead.org", "list_email": "opensbi@lists.infradead.org", "web_url": "https://github.com/riscv/opensbi", "scm_url": "", "webscm_url": "" }, "msgid": "<20260408072123.7543-2-dave.patel@riscstar.com>", "date": "2026-04-08T07:21:21", "name": "[1/3] lib: sbi: Add RISC-V vector context save/restore support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5f3c88b42279a7118ed4d2f865f90d6a0ed2f872", "submitter": { "id": 92617, "url": "http://patchwork.ozlabs.org/api/1.1/people/92617/?format=api", "name": "Dave Patel", "email": "dave.patel@riscstar.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260408072123.7543-2-dave.patel@riscstar.com/mbox/", "series": [ { "id": 499083, "url": "http://patchwork.ozlabs.org/api/1.1/series/499083/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=499083", "date": "2026-04-08T07:21:21", "name": "Add eager FP and RISC-V vector context switching support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499083/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220827/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220827/checks/", "tags": {}, "headers": { "Return-Path": "\n <opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=OhQeNtUp;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=riscstar-com.20251104.gappssmtp.com\n header.i=@riscstar-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=Z7/eVcEo;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org;\n envelope-from=opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n [IPv6:2607:7c80:54:3::133])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4frDzy1v6Yz1yD6\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 08 Apr 2026 17:22:54 +1000 (AEST)", "from localhost ([::1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux))\n\tid 1wANFR-00000008PnG-1W9u;\n\tWed, 08 Apr 2026 07:22:49 +0000", "from mail-wr1-x435.google.com ([2a00:1450:4864:20::435])\n\tby bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux))\n\tid 1wANFP-00000008Pls-1KTv\n\tfor opensbi@lists.infradead.org;\n\tWed, 08 Apr 2026 07:22:48 +0000", "by mail-wr1-x435.google.com with SMTP id\n ffacd0b85a97d-43b8982c2f4so3465192f8f.2\n for <opensbi@lists.infradead.org>;\n Wed, 08 Apr 2026 00:22:46 -0700 (PDT)", "from Dev-EliteBook.Home (97e782b0.skybroadband.com.\n [151.231.130.176])\n by smtp.gmail.com with ESMTPSA id\n ffacd0b85a97d-43d1e2c5419sm66188083f8f.11.2026.04.08.00.22.44\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 08 Apr 2026 00:22:45 -0700 (PDT)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=os1q14frXl0OpunAERs7ypaRzq2vg0OKWh2OV/Zr7us=; b=OhQeNtUpzjlNOZ\n\tEWu6TPHxDEIYQND52fkb3+K++oS84g3Q749AORvRAIt/HsrP6b7Rb2KsbqVcHWGFgM5bwXYd/LtqN\n\tbYfOeOQqTQJd3wXmFiw4cSzFuXeHC/vRZzsNihiCTFtwNHIP9VtPTiz0H7gsbPCOCUPQpn8OlFhIX\n\toDqrAs+eBwkAC0VzcmU9QU0FPEcM4ki5fgOHWyUJTPkPP7z8HE+qWqmNNYQ9Yg6sf7Cqn4EB5lJZC\n\tYTWwgM9ympoOPTNxmw2eQUdSeCX/EJ07s7G+6uvD+CeUbUOsnh/PD/4IeoMrPch6uyQmjJ70lFuD1\n\twgUtE7QuQkKTfNCbbC6A==;", "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=riscstar-com.20251104.gappssmtp.com; s=20251104; t=1775632965;\n x=1776237765; darn=lists.infradead.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=nK9rfztKkhPGJpFGgQFavtgEmuz7EN7UhKwEArnlm9E=;\n b=Z7/eVcEo0rZ9mp6BhRkLW4YMALpgah9dTSmXxSzv4K2KAZzf5Ft26YN7MDT9DPxPDI\n pj+5p92G2whDuehTPMzX+DG78gnYMij+iJrRtFUeDsEqBxaLcvUsuCE0UIUrHBwqbrOv\n nj7/XRFbJFoH1MkNiWfoO0YlrPnFYN0wBiC8J69AVBMI/wJKz5D5KRCrr+3Fpm1gve//\n MJC2Eu7Nm1gmzykoDPNFWLHqjD0jbLlr9mWEBf9/jhG4m9vEZnsAzGyiK+AX4gxbZMQf\n Cgy4ZGLqMYx3iHJrmloF3kp0ZPCAOKFARUoCRhFNnZFkxokPaeBNTdYA8lqrZ4v7Nsak\n 9MKg==" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1775632965; x=1776237765;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=nK9rfztKkhPGJpFGgQFavtgEmuz7EN7UhKwEArnlm9E=;\n b=AlxkQUHKX6RlagF/oUwDNt+iQgqyB3JZFw5beMqYEKGIRyKRy7BwhLQI4JIbNS/Tuv\n 0CEEnEl3B6lln7pT0ixEPTxhJ5/SbBmqSet0mMMu4RA7XMFinFJ6YFlUwyeRqNum7xLi\n D0U3fTe8K8fkEAPqNxcWB5wB8e4dyiIJIEmqHTpyVgNyKiKD0BhjeZvdDQQlZXhDe/8Z\n sEvBpiJ81Lb4LKKmZuw+mlwbwnBpMsd/leUPau6a8ChGN35dS1VP8pT/9vjtv7JlYvfr\n lG7KI4w91LECcrKaYsTvRJFjvrh2RAXAHSrYhz3ON3+rjuiPuSiJIbgrvgfQJ3df++sg\n 72wA==", "X-Forwarded-Encrypted": "i=1;\n AJvYcCUDx+xCg2MhZE1WFyOBuf6EKh81IXTmELhHOzrO2OeoF2+gSQASfKBikb19Q/kuYt1gXimLCFl1@lists.infradead.org", "X-Gm-Message-State": "AOJu0YxBFLy7H7BH+TK1EIiK8lzczh5wf8JG9jEWf++EGGE1N2er68Ww\n\tRg1/lLcr1PQHCQyudu1pD0f5twSm0yR6NAnaUGOaxh+YdKBVz8IiY4xganSy0TlqwcU=", "X-Gm-Gg": "AeBDietv0+zDqKnQHkt41Iw8X/O0oMRybH2f7Ek7VOKzLPap74PA8ZclkuJPXA+0XsV\n\tFRrzFiTzkBw1lvqE1G7Dz3kpDNvhbJTUaBKjrGCXfSpl07k63j4vC0z9sp+oVa5ohqaBZHvUgoF\n\tmxD+qZ3UNWZmXVCuNewIyLsOk7J/M6g7O4wZ8N08CsGO2pslcNEKpJSPoTz3/jq6Prx/651lH57\n\tiAM2yVzTl1TOrx50UMjjOPZQQIoJBLW2+hRtSG/ABSxaqMW6qzHz10qXjr1F9K9BLmyWad9lYee\n\tLCjsaztqWS6OxjTbafYXiTWCTZ+/kF9DLs07G3p+n8VfaBJ1ucre6bouY+R3NWybGc/eqxScg+o\n\tyvMZHBswhDCoLt7UM3tiScLM2/xhEjDPa6Sd8w2WgMhZn5uFnUSNvCJq3/88DdXcIJ0Gg/Jnpyv\n\tzMMNzeZoDxfgxgdLsxdHtO3kNS4h6+mFgfDL4cRZUaYedkjeGIqXENBpEWKk/XP5UeZNk=", "X-Received": "by 2002:a05:6000:2582:b0:43c:fde6:212e with SMTP id\n ffacd0b85a97d-43d292d33bfmr28411135f8f.24.1775632965500;\n Wed, 08 Apr 2026 00:22:45 -0700 (PDT)", "From": "dave.patel@riscstar.com", "To": "Samuel Holland <samuel.holland@sifive.com>", "Cc": "Scott Bambrough <scott@riscstar.com>,\n\tRobin Randhawa <robin.randhawa@sifive.com>,\n\tAnup Patel <anup.patel@qti.qualcomm.com>,\n\tDave Patel <dave.patel@riscstar.com>,\n\tRay Mao <raymond.mao@riscstar.com>,\n\tAnup Patel <anuppate@qti.qualcomm.com>,\n\tDhaval <dhaval@rivosinc.com>,\n\tPeter Lin <peter.lin@sifive.com>,\n\topensbi@lists.infradead.org,\n\tradim.krcmar@oss.qualcomm.com", "Subject": "[PATCH 1/3] lib: sbi: Add RISC-V vector context save/restore support", "Date": "Wed, 8 Apr 2026 08:21:21 +0100", "Message-ID": "<20260408072123.7543-2-dave.patel@riscstar.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260408072123.7543-1-dave.patel@riscstar.com>", "References": "<20260408072123.7543-1-dave.patel@riscstar.com>", "MIME-Version": "1.0", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260408_002247_387674_AB8FD2FC ", "X-CRM114-Status": "GOOD ( 16.14 )", "X-Spam-Score": "-1.9 (-)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: From: Dave Patel <dave.patel@riscstar.com> Eager context\n switch:\n Add support for saving and restoring RISC-V vector extension state in\n OpenSBI.\n This introduces a per-hart vector context structure and helper routines to\n perform full context sav [...]\n Content analysis details: (-1.9 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2a00:1450:4864:20:0:0:0:435 listed in]\n [list.dnswl.org]\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]", "X-BeenThere": "opensbi@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<opensbi.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/opensbi/>", "List-Post": "<mailto:opensbi@lists.infradead.org>", "List-Help": "<mailto:opensbi-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>", "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "From: Dave Patel <dave.patel@riscstar.com>\n\nEager context switch: Add support for saving and restoring RISC-V vector\nextension state in OpenSBI. This introduces a per-hart vector context\nstructure and helper routines to perform full context save and restore.\n\nThe vector context includes vcsr CSRs along with storage for all 32 vector\nregisters. The register state is saved and restored using byte-wise vector\nload/store instructions (vs8r/vl8r).\n\nThe implementation follows an eager context switching model where the entire\nvector state is saved and restored on every context switch. This provides a\nsimple and deterministic mechanism without requiring lazy trap-based\nmanagement.\n\nNotes:\n- The SBI_MAX_VLENB is configured using CONFIG_SBI_MAX_VLENB.\n\nSigned-off-by: Dave Patel <dave.patel@riscstar.com>\n---\n include/sbi/sbi_vector.h | 30 ++++++++\n lib/sbi/Kconfig | 4 +\n lib/sbi/objects.mk | 1 +\n lib/sbi/sbi_vector.c | 155 +++++++++++++++++++++++++++++++++++++++\n 4 files changed, 190 insertions(+)\n create mode 100644 include/sbi/sbi_vector.h\n create mode 100644 lib/sbi/sbi_vector.c\n\n--\n2.43.0", "diff": "diff --git a/include/sbi/sbi_vector.h b/include/sbi/sbi_vector.h\nnew file mode 100644\nindex 00000000..3b63b02c\n--- /dev/null\n+++ b/include/sbi/sbi_vector.h\n@@ -0,0 +1,30 @@\n+/*\n+ * SPDX-License-Identifier: BSD-2-Clause\n+ *\n+ * Copyright (c) 2026 RISCstar Solutions.\n+ *\n+ * Authors:\n+ * Dave Patel <dave.patel@riscstar.com>\n+ */\n+\n+#ifndef __SBI_VECTOR_H__\n+#define __SBI_VECTOR_H__\n+\n+#include <sbi/sbi_types.h>\n+\n+#define SBI_MAX_VLENB CONFIG_SBI_MAX_VLENB\n+\n+struct sbi_vector_context {\n+\tunsigned long vcsr;\n+\tunsigned long vstart;\n+\n+\t/* size depends on VLEN */\n+\tuint8_t vregs[32 * SBI_MAX_VLENB];\n+};\n+\n+void sbi_vector_save(struct sbi_vector_context *dst);\n+void sbi_vector_restore(const struct sbi_vector_context *src);\n+int sbi_vector_domain_init(void);\n+\n+#endif //__SBI_VECTOR_H__\n+\ndiff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig\nindex 8479f861..b2432150 100644\n--- a/lib/sbi/Kconfig\n+++ b/lib/sbi/Kconfig\n@@ -74,4 +74,8 @@ config SBI_ECALL_VIRQ\n \tbool \"VIRQ extension\"\n \tdefault y\n\n+config SBI_MAX_VLENB\n+\tint \"Vector VLENB size\"\n+\tdefault 256\n+\n endmenu\ndiff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk\nindex 68fc2036..ecb2b54e 100644\n--- a/lib/sbi/objects.mk\n+++ b/lib/sbi/objects.mk\n@@ -109,3 +109,4 @@ libsbi-objs-y += sbi_trap_v_ldst.o\n libsbi-objs-y += sbi_unpriv.o\n libsbi-objs-y += sbi_expected_trap.o\n libsbi-objs-y += sbi_cppc.o\n+libsbi-objs-y += sbi_vector.o\ndiff --git a/lib/sbi/sbi_vector.c b/lib/sbi/sbi_vector.c\nnew file mode 100644\nindex 00000000..29434e2e\n--- /dev/null\n+++ b/lib/sbi/sbi_vector.c\n@@ -0,0 +1,155 @@\n+/*\n+ * SPDX-License-Identifier: BSD-2-Clause\n+ *\n+ * Copyright (c) 2026 RISCstar Solutions.\n+ *\n+ * Authors:\n+ *\t Dave Patel <dave.patel@riscstar.com>\n+ */\n+\n+#include <sbi/sbi_domain.h>\n+#include <sbi/riscv_encoding.h>\n+#include <sbi/riscv_asm.h>\n+#include <sbi/sbi_vector.h>\n+#include <sbi/sbi_types.h>\n+#include <sbi/sbi_hart.h>\n+#include <sbi/sbi_error.h>\n+#include <sbi/sbi_console.h>\n+\n+#ifdef OPENSBI_CC_SUPPORT_VECTOR\n+\n+static inline unsigned long vector_vlenb(void)\n+{\n+\tunsigned long vlenb = 0;\n+\n+\tasm volatile (\n+\t\t\".option push\\n\\t\"\n+\t\t\".option arch, +v\\n\\t\"\n+\t\t\"csrr %0, vlenb\\n\\t\"\n+\t\t\".option pop\\n\\t\"\n+\t\t: \"=r\"(vlenb)\n+\t\t:\n+\t\t: \"memory\");\n+\n+\treturn vlenb;\n+}\n+\n+void sbi_vector_save(struct sbi_vector_context *dst)\n+{\n+\tif (!dst)\n+\t\treturn;\n+\n+#define READ_CSR(dst, csr)\t\t\t\t\\\n+\t({\t\t\t\t\t\t\\\n+\t\tasm volatile (\t\t\t\t\\\n+\t\t\t\"\t.option push\\n\\t\"\t\\\n+\t\t\t\"\t.option arch, +v\\n\\t\"\t\\\n+\t\t\t\"\tcsrr %0, \" #csr \"\\n\\t\"\t\\\n+\t\t\t\"\t.option pop\\n\\t\"\t\\\n+\t\t\t:\t\"=r\"(dst)\t\t\\\n+\t\t\t:\t\t\t\t\\\n+\t\t\t:\t\"memory\");\t\t\\\n+\t})\t\t\t\t\t\t\\\n+\n+\t/* Step 1: Save CSRs */\n+\tREAD_CSR(dst->vcsr, vcsr);\n+\tREAD_CSR(dst->vstart, vstart);\n+\n+#undef READ_CSR\n+\n+\tulong vlenb = vector_vlenb();\n+\tuint8_t *base = dst->vregs;\n+\n+\t/* Step 3: Save vector registers */\n+#define SAVE_VREG(i)\t\t\t\t\t\t\\\n+\t({\t\t\t\t\t\t\t\\\n+\tasm volatile(\t\t\t\t\t\t\\\n+\t\t\"\t.option push\\n\\t\"\t\t\t\\\n+\t\t\"\t.option arch, +v\\n\\t\"\t\t\t\\\n+\t\t\"\tvs8r.v v\" #i \", (%0)\\n\\t\"\t\t\\\n+\t\t\"\t.option pop\\n\\t\"\t\t\t\\\n+\t\t::\t\"r\"(base + (i) * vlenb)\t: \"memory\");\t\\\n+\t})\t\t\t\t\t\t\t\\\n+\n+\tSAVE_VREG(0);\n+\tSAVE_VREG(8);\n+\tSAVE_VREG(16);\n+\tSAVE_VREG(24);\n+\n+#undef SAVE_VREG\n+}\n+\n+void sbi_vector_restore(const struct sbi_vector_context *src)\n+{\n+\tif (!src)\n+\t\treturn;\n+\n+\tconst uint8_t *base = src->vregs;\n+\tulong vlenb = vector_vlenb();\n+\n+\t/* Step 2: Restore vector registers */\n+#define RESTORE_VREG(i)\t\t\t\t\t\\\n+\t({\t\t\t\t\t\t\t\\\n+\tasm volatile(\t\t\t\t\t\t\\\n+\t\t\"\t.option push\\n\\t\"\t\t\t\\\n+\t\t\"\t.option arch, +v\\n\\t\"\t\t\t\\\n+\t\t\"\tvl8r.v v\" #i \", (%0)\\n\\t\"\t\t\\\n+\t\t\"\t.option pop\\n\\t\"\t\t\t\\\n+\t\t::\t\"r\"(base + (i) * vlenb) : \"memory\");\t\\\n+\t })\t\t\t\t\t\t\t\\\n+\n+\tRESTORE_VREG(0);\n+\tRESTORE_VREG(8);\n+\tRESTORE_VREG(16);\n+\tRESTORE_VREG(24);\n+#undef RESTORE_VREG\n+\n+\t/* Step 3: Restore CSR's last */\n+#define WRITE_CSR(csr, val)\t\t\t\\\n+\t({\t\t\t\t\t\\\n+\tasm volatile(\t\t\t\t\\\n+\t\t\"\t.option push\\n\\t\"\t\\\n+\t\t\"\t.option arch, +v\\n\\t\"\t\\\n+\t\t\"\tcsrw \" #csr \", %0\\n\\t\"\t\\\n+\t\t\"\t.option pop\\n\\t\"\t\\\n+\t\t:\t\t\t\t\\\n+\t\t:\t\"r\"(val)\t\t\\\n+\t\t:\t\"memory\");\t\t\\\n+\t })\t\t\t\t\t\\\n+\n+\t/* Restore CSRs first */\n+\tWRITE_CSR(vcsr, src->vcsr);\n+\tWRITE_CSR(vstart, src->vstart);\n+#undef WRITE_CSR\n+}\n+\n+int sbi_vector_domain_init(void)\n+{\n+\tcsr_set(CSR_MSTATUS, MSTATUS_VS);\n+\tulong vlenb = vector_vlenb();\n+\n+\tif (vlenb > SBI_MAX_VLENB) {\n+\t\tsbi_printf(\"[Vector ERR:] vlenb range error\\n\");\n+\t\treturn SBI_ERR_BAD_RANGE;\n+\t}\n+\n+\tcsr_clear(CSR_MSTATUS, MSTATUS_VS);\n+\treturn SBI_OK;\n+}\n+\n+#else\n+\n+void sbi_vector_save(struct sbi_vector_context *dst)\n+{\n+}\n+\n+void sbi_vector_restore(const struct sbi_vector_context *src)\n+{\n+}\n+\n+int sbi_vector_domain_init(void)\n+{\n+\treturn SBI_OK;\n+}\n+\n+#endif /* OPENSBI_CC_SUPPORT_VECTOR */\n", "prefixes": [ "1/3" ] }