Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2220792/?format=api
{ "id": 2220792, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220792/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260407-riscv_insn_table-v1-14-54b4736a1e77@gmail.com/", "project": { "id": 70, "url": "http://patchwork.ozlabs.org/api/1.1/projects/70/?format=api", "name": "Linux KVM RISC-V", "link_name": "kvm-riscv", "list_id": "kvm-riscv.lists.infradead.org", "list_email": "kvm-riscv@lists.infradead.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260407-riscv_insn_table-v1-14-54b4736a1e77@gmail.com>", "date": "2026-04-08T04:46:02", "name": "[14/16] riscv: kvm: Use generated instruction headers for csr emulation", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0f058e06a61bc3271fb24fd273a25e4aa2da98ba", "submitter": { "id": 92521, "url": "http://patchwork.ozlabs.org/api/1.1/people/92521/?format=api", "name": "Charlie Jenkins via B4 Relay", "email": "devnull+thecharlesjenkins.gmail.com@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260407-riscv_insn_table-v1-14-54b4736a1e77@gmail.com/mbox/", "series": [ { "id": 499063, "url": "http://patchwork.ozlabs.org/api/1.1/series/499063/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=499063", "date": "2026-04-08T04:45:48", "name": "riscv: Generate riscv instruction functions", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499063/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220792/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220792/checks/", "tags": {}, "headers": { "Return-Path": "\n <kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=GNyK8WWi;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=OR9xTHeT;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org;\n envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n [IPv6:2607:7c80:54:3::133])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fr9X11Kmcz1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 08 Apr 2026 14:46:57 +1000 (AEST)", "from localhost ([::1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux))\n\tid 1wAKoX-00000008EuW-00Lu;\n\tWed, 08 Apr 2026 04:46:53 +0000", "from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25])\n\tby bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux))\n\tid 1wAKoK-00000008EbP-3nwV;\n\tWed, 08 Apr 2026 04:46:44 +0000", "from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58])\n\tby sea.source.kernel.org (Postfix) with ESMTP id DB0C544566;\n\tWed, 8 Apr 2026 04:46:37 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPS id B7A71C4AF0C;\n\tWed, 8 Apr 2026 04:46:37 +0000 (UTC)", "from aws-us-west-2-korg-lkml-1.web.codeaurora.org\n (localhost.localdomain [127.0.0.1])\n\tby smtp.lore.kernel.org (Postfix) with ESMTP id AED8BFD5F61;\n\tWed, 8 Apr 2026 04:46:37 +0000 (UTC)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Reply-To:List-Subscribe:List-Help:\n\tList-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:\n\tMessage-Id:MIME-Version:Subject:Date:From:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=x29t8KcJJgsRyx+Ty+bv9wYo5sBLjQlCRtdJUfW77nw=; b=GNyK8WWiUl3Rq1\n\th6+In8d+gIzTQi3HxXEC7if2H6oPDn+skWl76kELqA2gZdVVaovikC15L7O0/qkNAi4MEJPXEpbNX\n\tb7PV+9CxVAM8dWmh7Py6VOxU63PWQmCYduLiROGLGF+cbXQkmQITq1nUSr91ig/NkilUNtchpn4ta\n\t/k/xGMxCL4yDejlkIiRyUsTTPTnl69Da8jfetkSv+zlzROqyUlflQpm2Gj4gNeEOkX0dR/M3zBW+2\n\tjNNoNdfrMoZrTJhiCuz95ba4PP82XL+UTxa3dkzF9QgHmut58toQZbeZIudHiVRQf/jGry0/zS3nQ\n\tuYcAJzn0x9ymaIiOLTHA==;", "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775623597;\n\tbh=aXtJER1i/jiZHz0CW84YvOWxpOmtfS3CoUtbXJp9/Cc=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;\n\tb=OR9xTHeT3MlNKwPS8U1Y1pb05eJyHV3/U3E4VrTKW3LVqZasKC1F57rCw90u+/O6k\n\t dA+JeWIg0DvrTQ3fr5OhaTjUUjk0KG1o6jthz0EIfjUnDAP/NieCbW+wlcCS52bt/g\n\t 8NIzlSzq2bphL0e4UnQLAibzsHjSRUdPgCbURsmnDuoZl7HELkIa9qQSpGRPeZeXpf\n\t viLjp/o6cCMRY1Bs638WUC+mqtUYoPSOJCZemP8twWojaEe6TH3567MLMGCZ1kJJaC\n\t AzDN0rA0W32RlzaaMQZIUhVMkFgscUQlOAYE6u/af23Uh6RLJV6+CkZ+EV7alfwpsG\n\t qpPFgLDVdz3yg==" ], "From": "Charlie Jenkins via B4 Relay\n <devnull+thecharlesjenkins.gmail.com@kernel.org>", "Date": "Tue, 07 Apr 2026 21:46:02 -0700", "Subject": "[PATCH 14/16] riscv: kvm: Use generated instruction headers for\n csr emulation", "MIME-Version": "1.0", "Message-Id": "<20260407-riscv_insn_table-v1-14-54b4736a1e77@gmail.com>", "References": "<20260407-riscv_insn_table-v1-0-54b4736a1e77@gmail.com>", "In-Reply-To": "<20260407-riscv_insn_table-v1-0-54b4736a1e77@gmail.com>", "To": "Paul Walmsley <pjw@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>,\n Alexandre Ghiti <alex@ghiti.fr>, Anup Patel <anup@brainfault.org>,\n Atish Patra <atish.patra@linux.dev>, Conor Dooley <conor@kernel.org>,\n Paolo Bonzini <pbonzini@redhat.com>,\n Andrew Morton <akpm@linux-foundation.org>, Shuah Khan <shuah@kernel.org>", "Cc": "linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,\n kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,\n linux-kselftest@vger.kernel.org,\n Charlie Jenkins <thecharlesjenkins@gmail.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1775623594; l=5943;\n i=thecharlesjenkins@gmail.com; s=2026030; h=from:subject:message-id;\n bh=TwE25wT4s7hjayLJ5PBMi46uU0NYnVibnmjh3qrn1zU=;\n b=XfQ/Lc+Oog5aucttwcQK8XV7UR4f3VcYrjcyjIMQ8IPEQOeTwTcmtUzSR4T51lalVGpW9hPeG\n 1FVo5tma6BeAhjyhR91dIJZI97CuktklLLZLLQQH5Zp/je9lrj4hcmc", "X-Developer-Key": "i=thecharlesjenkins@gmail.com; a=ed25519;\n pk=vpF2USrG+aB6CTbSt34rzJKsAVe/l+GAXo1IomCMETk=", "X-Endpoint-Received": "by B4 Relay for thecharlesjenkins@gmail.com/2026030\n with auth_id=663", "X-Original-From": "Charlie Jenkins <thecharlesjenkins@gmail.com>", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260407_214641_043267_42C05983 ", "X-CRM114-Status": "GOOD ( 19.15 )", "X-Spam-Score": "-0.0 (/)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: From: Charlie Jenkins Migrate the csr emulation code to use\n the generated instruction headers instead of the hand-written instruction\n composition functions. Signed-off-by: Charlie Jenkins\n Content analysis details: (-0.0 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 2.1 FREEMAIL_FORGED_REPLYTO Freemail in Reply-To, but not From", "X-BeenThere": "kvm-riscv@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<kvm-riscv.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/kvm-riscv/>", "List-Post": "<mailto:kvm-riscv@lists.infradead.org>", "List-Help": "<mailto:kvm-riscv-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=subscribe>", "Reply-To": "thecharlesjenkins@gmail.com", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"kvm-riscv\" <kvm-riscv-bounces@lists.infradead.org>", "Errors-To": "kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "From: Charlie Jenkins <thecharlesjenkins@gmail.com>\n\nMigrate the csr emulation code to use the generated instruction headers\ninstead of the hand-written instruction composition functions.\n\nSigned-off-by: Charlie Jenkins <thecharlesjenkins@gmail.com>\n\n---\nThis can be tested with the introduced csr_test selftest.\n---\n arch/riscv/include/asm/kvm_vcpu_insn.h | 3 +-\n arch/riscv/kvm/vcpu_insn.c | 61 +++++++++++++++++-----------------\n 2 files changed, 32 insertions(+), 32 deletions(-)", "diff": "diff --git a/arch/riscv/include/asm/kvm_vcpu_insn.h b/arch/riscv/include/asm/kvm_vcpu_insn.h\nindex 106fb4c45108..01efdaaede21 100644\n--- a/arch/riscv/include/asm/kvm_vcpu_insn.h\n+++ b/arch/riscv/include/asm/kvm_vcpu_insn.h\n@@ -19,7 +19,8 @@ struct kvm_mmio_decode {\n };\n \n struct kvm_csr_decode {\n-\tunsigned long insn;\n+\tunsigned long rd;\n+\tunsigned long insn_len;\n \tint return_handled;\n };\n \ndiff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c\nindex c5a70de4a579..d666cd24f8c0 100644\n--- a/arch/riscv/kvm/vcpu_insn.c\n+++ b/arch/riscv/kvm/vcpu_insn.c\n@@ -13,8 +13,7 @@\n #include <asm/kvm_vcpu_test_csr.h>\n \n struct insn_func {\n-\tunsigned long mask;\n-\tunsigned long match;\n+\tbool (*cmp)(u32 insn);\n \t/*\n \t * Possible return values are as follows:\n \t * 1) Returns < 0 for error case\n@@ -131,20 +130,17 @@ static const struct csr_func csr_funcs[] = {\n */\n int kvm_riscv_vcpu_csr_return(struct kvm_vcpu *vcpu, struct kvm_run *run)\n {\n-\tulong insn;\n-\n \tif (vcpu->arch.csr_decode.return_handled)\n \t\treturn 0;\n \tvcpu->arch.csr_decode.return_handled = 1;\n \n \t/* Update destination register for CSR reads */\n-\tinsn = vcpu->arch.csr_decode.insn;\n-\tif ((insn >> SH_RD) & MASK_RX)\n-\t\tSET_RD(insn, &vcpu->arch.guest_context,\n-\t\t run->riscv_csr.ret_value);\n+\tif (vcpu->arch.csr_decode.rd)\n+\t\t*((ulong *)&vcpu->arch.guest_context +\n+\t\t vcpu->arch.csr_decode.rd) = run->riscv_csr.ret_value;\n \n \t/* Move to next instruction */\n-\tvcpu->arch.guest_context.sepc += INSN_LEN(insn);\n+\tvcpu->arch.guest_context.sepc += vcpu->arch.csr_decode.insn_len;\n \n \treturn 0;\n }\n@@ -154,7 +150,7 @@ static int csr_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn)\n \t#define GET_REG(_rd) (*((unsigned long *)(&vcpu->arch.guest_context) + _rd))\n \n \tint i, rc = KVM_INSN_ILLEGAL_TRAP;\n-\tunsigned int csr_num;\n+\tunsigned int csr_num, rd;\n \tconst struct csr_func *tcfn, *cfn = NULL;\n \tulong val = 0, wr_mask = 0, new_val = 0;\n \n@@ -163,26 +159,32 @@ static int csr_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn)\n \t\twr_mask = -1UL;\n \t\tnew_val = GET_REG(riscv_insn_csrrw_extract_xs1(insn));\n \t\tcsr_num = riscv_insn_csrrw_extract_csr(insn);\n+\t\trd = riscv_insn_csrrw_extract_xd(insn);\n \t} else if (riscv_insn_is_csrrs(insn)) {\n \t\twr_mask = GET_REG(riscv_insn_csrrs_extract_xs1(insn));\n \t\tnew_val = -1UL;\n \t\tcsr_num = riscv_insn_csrrs_extract_csr(insn);\n+\t\trd = riscv_insn_csrrs_extract_xd(insn);\n \t} else if (riscv_insn_is_csrrc(insn)) {\n-\t\twr_mask = GET_REG(riscv_insn_csrrs_extract_xs1(insn));\n+\t\twr_mask = GET_REG(riscv_insn_csrrc_extract_xs1(insn));\n \t\tnew_val = 0;\n \t\tcsr_num = riscv_insn_csrrc_extract_csr(insn);\n+\t\trd = riscv_insn_csrrc_extract_xd(insn);\n \t} else if (riscv_insn_is_csrrwi(insn)) {\n \t\twr_mask = -1UL;\n \t\tnew_val = riscv_insn_csrrwi_extract_imm(insn);\n \t\tcsr_num = riscv_insn_csrrwi_extract_csr(insn);\n+\t\trd = riscv_insn_csrrwi_extract_xd(insn);\n \t} else if (riscv_insn_is_csrrsi(insn)) {\n \t\twr_mask = riscv_insn_csrrwi_extract_imm(insn);\n \t\tnew_val = -1UL;\n \t\tcsr_num = riscv_insn_csrrsi_extract_csr(insn);\n+\t\trd = riscv_insn_csrrsi_extract_xd(insn);\n \t} else if (riscv_insn_is_csrrci(insn)) {\n-\t\twr_mask = GET_REG(riscv_insn_csrrwi_extract_imm(insn));\n+\t\twr_mask = riscv_insn_csrrci_extract_imm(insn);\n \t\tnew_val = 0;\n-\t\tcsr_num = riscv_insn_csrrwi_extract_csr(insn);\n+\t\tcsr_num = riscv_insn_csrrci_extract_csr(insn);\n+\t\trd = riscv_insn_csrrci_extract_xd(insn);\n \t} else {\n \t\treturn rc;\n \t}\n@@ -190,7 +192,8 @@ static int csr_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn)\n \t#undef GET_REG\n \n \t/* Save instruction decode info */\n-\tvcpu->arch.csr_decode.insn = insn;\n+\tvcpu->arch.csr_decode.rd = rd;\n+\tvcpu->arch.csr_decode.insn_len = INSN_LEN(insn);\n \tvcpu->arch.csr_decode.return_handled = 0;\n \n \t/* Update CSR details in kvm_run struct */\n@@ -234,43 +237,39 @@ static int csr_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn)\n \n static const struct insn_func system_opcode_funcs[] = {\n \t{\n-\t\t.mask = INSN_MASK_CSRRW,\n-\t\t.match = INSN_MATCH_CSRRW,\n+\t\t.cmp = riscv_insn_is_csrrw,\n \t\t.func = csr_insn,\n \t},\n \t{\n-\t\t.mask = INSN_MASK_CSRRS,\n-\t\t.match = INSN_MATCH_CSRRS,\n+\t\t.cmp = riscv_insn_is_csrrs,\n \t\t.func = csr_insn,\n \t},\n \t{\n-\t\t.mask = INSN_MASK_CSRRC,\n-\t\t.match = INSN_MATCH_CSRRC,\n+\t\t.cmp = riscv_insn_is_csrrc,\n \t\t.func = csr_insn,\n \t},\n \t{\n-\t\t.mask = INSN_MASK_CSRRWI,\n-\t\t.match = INSN_MATCH_CSRRWI,\n+\t\t.cmp = riscv_insn_is_csrrwi,\n \t\t.func = csr_insn,\n \t},\n \t{\n-\t\t.mask = INSN_MASK_CSRRSI,\n-\t\t.match = INSN_MATCH_CSRRSI,\n+\t\t.cmp = riscv_insn_is_csrrsi,\n \t\t.func = csr_insn,\n \t},\n \t{\n-\t\t.mask = INSN_MASK_CSRRCI,\n-\t\t.match = INSN_MATCH_CSRRCI,\n+\t\t.cmp = riscv_insn_is_csrrci,\n \t\t.func = csr_insn,\n \t},\n \t{\n-\t\t.mask = INSN_MASK_WFI,\n-\t\t.match = INSN_MATCH_WFI,\n+\t\t.cmp = riscv_insn_is_wfi,\n \t\t.func = wfi_insn,\n \t},\n \t{\n-\t\t.mask = INSN_MASK_WRS,\n-\t\t.match = INSN_MATCH_WRS,\n+\t\t.cmp = riscv_insn_is_wrs_nto,\n+\t\t.func = wrs_insn,\n+\t},\n+\t{\n+\t\t.cmp = riscv_insn_is_wrs_sto,\n \t\t.func = wrs_insn,\n \t},\n };\n@@ -283,7 +282,7 @@ static int system_opcode_insn(struct kvm_vcpu *vcpu, struct kvm_run *run,\n \n \tfor (i = 0; i < ARRAY_SIZE(system_opcode_funcs); i++) {\n \t\tifn = &system_opcode_funcs[i];\n-\t\tif ((insn & ifn->mask) == ifn->match) {\n+\t\tif (ifn->cmp(insn)) {\n \t\t\trc = ifn->func(vcpu, run, insn);\n \t\t\tbreak;\n \t\t}\n", "prefixes": [ "14/16" ] }