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GET /api/1.1/patches/2220775/?format=api
{ "id": 2220775, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220775/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260408025243.1155482-5-eleanor.lin@realtek.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260408025243.1155482-5-eleanor.lin@realtek.com>", "date": "2026-04-08T02:52:43", "name": "[v2,4/4] arm64: dts: realtek: Add GPIO support for RTD1625", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d6bf0fc6092da16308813218bf1ca4a2bb027cdb", "submitter": { "id": 92797, "url": "http://patchwork.ozlabs.org/api/1.1/people/92797/?format=api", "name": "Yu-Chun Lin [林祐君]", "email": "eleanor.lin@realtek.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260408025243.1155482-5-eleanor.lin@realtek.com/mbox/", "series": [ { "id": 499060, "url": "http://patchwork.ozlabs.org/api/1.1/series/499060/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499060", "date": "2026-04-08T02:52:40", "name": "gpio: realtek: Add support for Realtek DHC RTD1625", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/499060/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220775/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220775/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-34855-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=realtek.com header.i=@realtek.com header.a=rsa-sha256\n header.s=dkim header.b=v+4YAQTY;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34855-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com\n header.b=\"v+4YAQTY\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=211.75.126.72", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=realtek.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=realtek.com" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fr7434MJ6z1xv0\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 08 Apr 2026 12:56:03 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id E85BD300D0FF\n\tfor <incoming@patchwork.ozlabs.org>; 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arc=none smtp.client-ip=211.75.126.72", "X-SpamFilter-By": "ArmorX SpamTrap 5.80 with qID 6382qkMO32349162,\n This message is accepted by code: ctloc85258", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim;\n\tt=1775616766; bh=ByB2NCua2AOa2e3a09GFIdMk1eZywRgOzjPJhvZ9QNs=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Transfer-Encoding:Content-Type;\n\tb=v+4YAQTYBAURaio4X7Q7zo2+siRblosQymR+PWUvjObRP1gy7djJEpYpO1lJmbzGU\n\t jntPL+WDOOWtGsqegVjv9JrK9M0KN7KCFdzTmKK+bOSWx7u7b5YeaBWQlD2XYIonZT\n\t 3GohHh207EJPKkUBGVC7hqEbeoXZ27nVcFijtDTYPQ8YCHSixKk8ibQ9RRhv14d08H\n\t 7V2PDqyD1tf097m1dhv3nSX58q7pbNbhka4zd2oESgy4y3j2Jk3F42z4GTO4NHyakd\n\t rHTAog9FW+snfPK3mZAF0M4LNKpsKvFgaN8QWiI8Zw82WkdIEl3HUKPUTjNFCJ3j4D\n\t LtoCFzwzHXmnw==", "From": "Yu-Chun Lin <eleanor.lin@realtek.com>", "To": "<linusw@kernel.org>, <brgl@kernel.org>, <robh@kernel.org>,\n <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <afaerber@suse.com>,\n <tychang@realtek.com>", "CC": "<linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>,\n <linux-arm-kernel@lists.infradead.org>,\n <linux-realtek-soc@lists.infradead.org>, <cy.huang@realtek.com>,\n <stanley_chang@realtek.com>, <eleanor.lin@realtek.com>,\n <james.tai@realtek.com>", "Subject": "[PATCH v2 4/4] arm64: dts: realtek: Add GPIO support for RTD1625", "Date": "Wed, 8 Apr 2026 10:52:43 +0800", "Message-ID": "<20260408025243.1155482-5-eleanor.lin@realtek.com>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260408025243.1155482-1-eleanor.lin@realtek.com>", "References": "<20260408025243.1155482-1-eleanor.lin@realtek.com>", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain" }, "content": "Add the GPIO node for the Realtek RTD1625 SoC.\n\nSigned-off-by: Yu-Chun Lin <eleanor.lin@realtek.com>\n---\nChanges in v2:\n- Merge two reg memory regions.\n- Remove redundant status setting.\n---\n arch/arm64/boot/dts/realtek/kent.dtsi | 39 +++++++++++++++++++++++++++\n 1 file changed, 39 insertions(+)", "diff": "diff --git a/arch/arm64/boot/dts/realtek/kent.dtsi b/arch/arm64/boot/dts/realtek/kent.dtsi\nindex 8d4293cd4c03..dafe56ce7d71 100644\n--- a/arch/arm64/boot/dts/realtek/kent.dtsi\n+++ b/arch/arm64/boot/dts/realtek/kent.dtsi\n@@ -151,6 +151,37 @@ uart0: serial@7800 {\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n+\t\t\tgpio: gpio@31000 {\n+\t\t\t\tcompatible = \"realtek,rtd1625-iso-gpio\";\n+\t\t\t\treg = <0x31000 0x398>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\tgpio-ranges = <&isom_pinctrl 0 0 2>,\n+\t\t\t\t\t <&ve4_pinctrl 2 0 6>,\n+\t\t\t\t\t <&iso_pinctrl 8 0 4>,\n+\t\t\t\t\t <&ve4_pinctrl 12 6 2>,\n+\t\t\t\t\t <&main2_pinctrl 14 0 2>,\n+\t\t\t\t\t <&ve4_pinctrl 16 8 4>,\n+\t\t\t\t\t <&main2_pinctrl 20 2 3>,\n+\t\t\t\t\t <&ve4_pinctrl 23 12 3>,\n+\t\t\t\t\t <&iso_pinctrl 26 4 2>,\n+\t\t\t\t\t <&isom_pinctrl 28 2 2>,\n+\t\t\t\t\t <&ve4_pinctrl 30 15 6>,\n+\t\t\t\t\t <&main2_pinctrl 36 5 6>,\n+\t\t\t\t\t <&ve4_pinctrl 42 21 3>,\n+\t\t\t\t\t <&iso_pinctrl 45 6 6>,\n+\t\t\t\t\t <&ve4_pinctrl 51 24 1>,\n+\t\t\t\t\t <&iso_pinctrl 52 12 1>,\n+\t\t\t\t\t <&ve4_pinctrl 53 25 11>,\n+\t\t\t\t\t <&main2_pinctrl 64 11 28>,\n+\t\t\t\t\t <&ve4_pinctrl 92 36 2>,\n+\t\t\t\t\t <&iso_pinctrl 94 13 19>,\n+\t\t\t\t\t <&iso_pinctrl 128 32 4>,\n+\t\t\t\t\t <&ve4_pinctrl 132 38 13>,\n+\t\t\t\t\t <&iso_pinctrl 145 36 19>,\n+\t\t\t\t\t <&ve4_pinctrl 164 51 2>;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t};\n+\n \t\t\tiso_pinctrl: pinctrl@4e000 {\n \t\t\t\tcompatible = \"realtek,rtd1625-iso-pinctrl\";\n \t\t\t\treg = <0x4e000 0x1a4>;\n@@ -161,6 +192,14 @@ main2_pinctrl: pinctrl@4f200 {\n \t\t\t\treg = <0x4f200 0x50>;\n \t\t\t};\n \n+\t\t\tiso_m_gpio: gpio@89100 {\n+\t\t\t\tcompatible = \"realtek,rtd1625-isom-gpio\";\n+\t\t\t\treg = <0x89100 0x30>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\tgpio-ranges = <&isom_pinctrl 0 0 4>;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t};\n+\n \t\t\tisom_pinctrl: pinctrl@146200 {\n \t\t\t\tcompatible = \"realtek,rtd1625-isom-pinctrl\";\n \t\t\t\treg = <0x146200 0x34>;\n", "prefixes": [ "v2", "4/4" ] }