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GET /api/1.1/patches/2220532/?format=api
{ "id": 2220532, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220532/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260407130654.778838-3-Alexander.Feilke@ew.tq-group.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260407130654.778838-3-Alexander.Feilke@ew.tq-group.com>", "date": "2026-04-07T13:06:45", "name": "[v4,2/8] board/tq: Add common SoM API", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "6736934c5edb6d8d4d263bd985bc248659017b78", "submitter": { "id": 92142, "url": "http://patchwork.ozlabs.org/api/1.1/people/92142/?format=api", "name": "Alexander Feilke", "email": "Alexander.Feilke@ew.tq-group.com" }, "delegate": { "id": 151988, "url": "http://patchwork.ozlabs.org/api/1.1/users/151988/?format=api", "username": "festevam", "first_name": "Fabio", "last_name": "Estevam", "email": "festevam@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260407130654.778838-3-Alexander.Feilke@ew.tq-group.com/mbox/", "series": [ { "id": 498982, "url": "http://patchwork.ozlabs.org/api/1.1/series/498982/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=498982", "date": "2026-04-07T13:06:48", "name": "Add support for TQMa7x", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/498982/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220532/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220532/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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www537.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384\n (Exim 4.96.2) (envelope-from <Alexander.Feilke@ew.tq-group.com>)\n id 1wA69J-00071y-0m; Tue, 07 Apr 2026 15:07:21 +0200", "from localhost ([127.0.0.1])\n by sslproxy02.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384\n (Exim 4.96) (envelope-from <Alexander.Feilke@ew.tq-group.com>)\n id 1wA69I-0007St-1e; Tue, 07 Apr 2026 15:07:20 +0200" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED,\n SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n d=ew.tq-group.com; s=default2602; h=Content-Transfer-Encoding:MIME-Version:\n References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:\n Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From:\n Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID;\n bh=CKPQzMlgdVJWy3y6Do/4GS/XAIgmwltlxT0b8Zw968o=; b=beDCoh1S7t3g0zsyTTnFvKd2bO\n CPdFQaZLGyr/7rL3rzUxctRgPW7GO2uXGnmd00LS3WwDg1RuBDhL3Mfl6gCIJrQT+xCaEnhVH6xJR\n M04jx9iXweu8hv1BeWLLYWvgGeVu5CXmTCXqWj+foTy3//3Rj2W5tjt+4JBbkd325Ym9Az3CbXNpA\n jxfsd2/J+c8zQY3ZB47nRyvz0qfg/v3FivStJ4Z2Tkh49GpmIqjbgH7EatBCow9QwdJulf9CPTTGq\n 0tdI217EV4HgUud8SXp7g1Khp326ssQ/q3YIu/kMroQtvrTqM+yzrA/jwuy8uZwmYrOx+mHZIf2Td\n XQdg/lqg==;", "From": "Alexander Feilke <Alexander.Feilke@ew.tq-group.com>", "To": "\"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>, u-boot@lists.denx.de,\n u-boot@ew.tq-group.com", "Cc": "Alexander Feilke <alexander.feilke@ew.tq-group.com>,\n Tom Rini <trini@konsulko.com>,\n Alexander Feilke <Alexander.Feilke@ew.tq-group.com>,\n Stefano Babic <sbabic@nabladev.com>, Fabio Estevam <festevam@gmail.com>,\n Peng Fan <peng.fan@nxp.com>, Jaehoon Chung <jh80.chung@samsung.com>,\n Max Merchel <Max.Merchel@ew.tq-group.com>", "Subject": "[PATCH v4 2/8] board/tq: Add common SoM API", "Date": "Tue, 7 Apr 2026 15:06:45 +0200", "Message-ID": "<20260407130654.778838-3-Alexander.Feilke@ew.tq-group.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260407130654.778838-1-Alexander.Feilke@ew.tq-group.com>", "References": "<20260407130654.778838-1-Alexander.Feilke@ew.tq-group.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Alexander Feilke <alexander.feilke@ew.tq-group.com>\n\nReduce code duplication by adding a default implementation.\n\nSigned-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>\nSigned-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>\n---\n board/tq/common/Kconfig | 3 +++\n board/tq/common/Makefile | 1 +\n board/tq/common/tq_som.c | 32 ++++++++++++++++++++++++++++++++\n board/tq/common/tq_som.h | 35 +++++++++++++++++++++++++++++++++++\n 4 files changed, 71 insertions(+)\n create mode 100644 board/tq/common/tq_som.c\n create mode 100644 board/tq/common/tq_som.h", "diff": "diff --git a/board/tq/common/Kconfig b/board/tq/common/Kconfig\nindex a1896929ea3..2fe2ca30072 100644\n--- a/board/tq/common/Kconfig\n+++ b/board/tq/common/Kconfig\n@@ -11,3 +11,6 @@ config TQ_COMMON_BB\n \n config TQ_COMMON_SDMMC\n \tbool\n+\n+config TQ_COMMON_SOM\n+\tbool\ndiff --git a/board/tq/common/Makefile b/board/tq/common/Makefile\nindex ac564a713fd..4af9207da4a 100644\n--- a/board/tq/common/Makefile\n+++ b/board/tq/common/Makefile\n@@ -6,4 +6,5 @@\n #\n \n obj-$(CONFIG_TQ_COMMON_BB) += tq_bb.o\n+obj-$(CONFIG_TQ_COMMON_SOM) += tq_som.o\n obj-$(CONFIG_TQ_COMMON_SDMMC) += tq_sdmmc.o\ndiff --git a/board/tq/common/tq_som.c b/board/tq/common/tq_som.c\nnew file mode 100644\nindex 00000000000..6fb4839109b\n--- /dev/null\n+++ b/board/tq/common/tq_som.c\n@@ -0,0 +1,32 @@\n+// SPDX-License-Identifier: GPL-2.0-or-later\n+/*\n+ * Copyright (c) 2025-2026 TQ-Systems GmbH <u-boot@ew.tq-group.com>,\n+ * D-82229 Seefeld, Germany.\n+ * Author: Alexander Feilke, Max Merchel\n+ */\n+\n+#include <init.h>\n+#include <asm/io.h>\n+#include <linux/sizes.h>\n+\n+#include \"tq_som.h\"\n+\n+void __weak tq_som_ram_init(void)\n+{\n+\t;\n+}\n+\n+/*\n+ * checks if the accessible range equals the requested RAM size.\n+ * returns true if successful, false otherwise\n+ */\n+bool tq_som_ram_check_size(long ram_size)\n+{\n+\tlong size;\n+\n+\tsize = get_ram_size((void *)PHYS_SDRAM, ram_size);\n+\tdebug(\"SPL: requested RAM size %lu MiB. accessible %lu MiB\\n\",\n+\t ram_size / (SZ_1M), size / (SZ_1M));\n+\n+\treturn (size == ram_size);\n+}\ndiff --git a/board/tq/common/tq_som.h b/board/tq/common/tq_som.h\nnew file mode 100644\nindex 00000000000..0ab01d51f99\n--- /dev/null\n+++ b/board/tq/common/tq_som.h\n@@ -0,0 +1,35 @@\n+/* SPDX-License-Identifier: GPL-2.0-or-later */\n+/*\n+ * Copyright (c) 2025-2026 TQ-Systems GmbH <u-boot@ew.tq-group.com>,\n+ * D-82229 Seefeld, Germany.\n+ * Author: Alexander Feilke, Max Merchel\n+ */\n+\n+#ifndef __TQ_SOM_H\n+#define __TQ_SOM_H\n+\n+#include <init.h>\n+#include <asm/io.h>\n+#include <linux/iopoll.h>\n+\n+void tq_som_ram_init(void);\n+\n+/* used as a wrapper to write to specific register addresses */\n+static inline void tq_som_init_write_reg(u32 address, u32 value)\n+{\n+\twritel_relaxed(value, address);\n+}\n+\n+/*\n+ * checks if the accessible range equals the requested ram size.\n+ * returns true if successful, false otherwise\n+ */\n+bool tq_som_ram_check_size(long ram_size);\n+\n+static inline void tq_som_check_bits_set(u32 address, u32 mask)\n+{\n+\tu32 val;\n+\treadl_poll_timeout(address, val, (val & mask) == mask, 1000);\n+}\n+\n+#endif /* __TQ_SOM_H */\n", "prefixes": [ "v4", "2/8" ] }