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{
    "id": 2220523,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220523/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260407-d3cold-v4-2-bb171f75b465@oss.qualcomm.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260407-d3cold-v4-2-bb171f75b465@oss.qualcomm.com>",
    "date": "2026-04-07T13:03:09",
    "name": "[v4,2/5] PCI: qcom: Add .get_ltssm() helper",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "27e1ab3e4da24346ad1588b8438fb4dad96b7a04",
    "submitter": {
        "id": 89908,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/89908/?format=api",
        "name": "Krishna Chaitanya Chundru",
        "email": "krishna.chundru@oss.qualcomm.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260407-d3cold-v4-2-bb171f75b465@oss.qualcomm.com/mbox/",
    "series": [
        {
            "id": 498980,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/498980/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=498980",
            "date": "2026-04-07T13:03:07",
            "name": "PCI: qcom: Add D3cold support",
            "version": 4,
            "mbox": "http://patchwork.ozlabs.org/series/498980/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2220523/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2220523/checks/",
    "tags": {},
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        ],
        "From": "Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>",
        "Date": "Tue, 07 Apr 2026 18:33:09 +0530",
        "Subject": "[PATCH v4 2/5] PCI: qcom: Add .get_ltssm() helper",
        "Precedence": "bulk",
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        "Message-Id": "<20260407-d3cold-v4-2-bb171f75b465@oss.qualcomm.com>",
        "References": "<20260407-d3cold-v4-0-bb171f75b465@oss.qualcomm.com>",
        "In-Reply-To": "<20260407-d3cold-v4-0-bb171f75b465@oss.qualcomm.com>",
        "To": "Jingoo Han <jingoohan1@gmail.com>,\n Manivannan Sadhasivam <mani@kernel.org>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Will Deacon <will@kernel.org>",
        "Cc": "linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,\n        linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n        jonathanh@nvidia.com, bjorn.andersson@oss.qualcomm.com,\n        Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>",
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    },
    "content": "For older targets like sc7280, we see reading DBI after sending PME\nturn off message is causing NOC error.\n\nTo avoid unsafe DBI accesses, introduce qcom_pcie_get_ltssm(), which\nretrieves the LTSSM state from the PARF_LTSSM register instead.\n\nThis helper is used in place of direct DBI-based link state checks in\nthe D3cold path after sending PME turn-off message, ensuring the LTSSM\nstate can be queried safely even after DBI access is no longer valid.\n\nSigned-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>\n---\n drivers/pci/controller/dwc/pcie-qcom.c | 12 ++++++++++++\n 1 file changed, 12 insertions(+)",
    "diff": "diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c\nindex 67a16af69ddc75fca1b123e70715e692a91a9135..b00bf46637a5ff803a845719c5b0b5b82739244b 100644\n--- a/drivers/pci/controller/dwc/pcie-qcom.c\n+++ b/drivers/pci/controller/dwc/pcie-qcom.c\n@@ -131,6 +131,7 @@\n \n /* PARF_LTSSM register fields */\n #define LTSSM_EN\t\t\t\tBIT(8)\n+#define PARF_LTSSM_STATE_MASK\t\t\tGENMASK(5, 0)\n \n /* PARF_NO_SNOOP_OVERRIDE register fields */\n #define WR_NO_SNOOP_OVERRIDE_EN\t\t\tBIT(1)\n@@ -1255,6 +1256,16 @@ static bool qcom_pcie_link_up(struct dw_pcie *pci)\n \treturn val & PCI_EXP_LNKSTA_DLLLA;\n }\n \n+static enum dw_pcie_ltssm qcom_pcie_get_ltssm(struct dw_pcie *pci)\n+{\n+\tstruct qcom_pcie *pcie = to_qcom_pcie(pci);\n+\tu32 val;\n+\n+\tval = readl(pcie->parf + PARF_LTSSM);\n+\n+\treturn (enum dw_pcie_ltssm)FIELD_GET(PARF_LTSSM_STATE_MASK, val);\n+}\n+\n static void qcom_pcie_phy_power_off(struct qcom_pcie *pcie)\n {\n \tstruct qcom_pcie_port *port;\n@@ -1507,6 +1518,7 @@ static const struct qcom_pcie_cfg cfg_fw_managed = {\n static const struct dw_pcie_ops dw_pcie_ops = {\n \t.link_up = qcom_pcie_link_up,\n \t.start_link = qcom_pcie_start_link,\n+\t.get_ltssm = qcom_pcie_get_ltssm,\n };\n \n static int qcom_pcie_icc_init(struct qcom_pcie *pcie)\n",
    "prefixes": [
        "v4",
        "2/5"
    ]
}