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GET /api/1.1/patches/2220464/?format=api
{ "id": 2220464, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220464/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-2-sherry.sun@nxp.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260407104154.2842132-2-sherry.sun@nxp.com>", "date": "2026-04-07T10:41:43", "name": "[V11,01/12] dt-bindings: PCI: fsl,imx6q-pcie: Add reset GPIO in Root Port node", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3251068ee9e53f63b745075ba6ef7f82383237bb", "submitter": { "id": 77063, "url": "http://patchwork.ozlabs.org/api/1.1/people/77063/?format=api", "name": "Sherry Sun", "email": "sherry.sun@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-2-sherry.sun@nxp.com/mbox/", "series": [ { "id": 498961, "url": "http://patchwork.ozlabs.org/api/1.1/series/498961/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=498961", "date": "2026-04-07T10:41:47", "name": "pci-imx6: Add support for parsing the reset property in new Root Port binding", "version": 11, "mbox": "http://patchwork.ozlabs.org/series/498961/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220464/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220464/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-52026-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) 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"DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=j1Pn02g0rfi+zsOP4qtMsvpkrHEN3Ra6ggTTiMDwsTc=;\n b=duCRVQNpgg85TJNN6tarxicm5EnwCumNTYwM6P3W6HojBE73cELOFaXcoDHLEeIVMfZ09/JB501zAVXxZiCWmLhmeOvZzS8li70SEDkkxxSGhEOz0PmKi7EQ606tixwntQHw52lIfCKgPTOFy6UM7rKSYWKLoRMfULSz04bAAGWMXU+INPaKu8EdErh2uZQ2co3noelJWkvFM/BQi4Bz9w/8q16ydBGxZOu+2ERi3oX4l1/ggkS9nyEe7kJchF+ZOOJZHQgzECnGPNzR4M7UwVdBiWszdao8Vsrlrbbw+g7oM8YWJKY/5FuJOP5trN5Q4Cth5WBhbGQbhsauMxTlcw==", "From": "Sherry Sun <sherry.sun@nxp.com>", "To": "robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de", "Cc": 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"X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 44fd92cb-dd48-4ed3-8b28-08de9492469b", "X-MS-Exchange-CrossTenant-AuthSource": "VI0PR04MB12114.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "07 Apr 2026 10:41:50.4750\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n Bq7IQkg49/tVYvnc86EEvGHn/rjns7pDjMp0lpCM8O0IwDZRgQ+83KndhKqppTQW3YPNP1CxqRezT3x7/UV5/A==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DB9PR04MB8281" }, "content": "Update fsl,imx6q-pcie.yaml to include the standard reset-gpios property\nfor the Root Port node.\n\nThe reset-gpios property is already defined in pci-bus-common.yaml for\nPERST#, so use it instead of the local reset-gpio property. Keep the\nexisting reset-gpio property in the bridge node for backward\ncompatibility, but mark it as deprecated.\n\nSigned-off-by: Sherry Sun <sherry.sun@nxp.com>\nReviewed-by: Rob Herring (Arm) <robh@kernel.org>\n---\n .../bindings/pci/fsl,imx6q-pcie.yaml | 32 +++++++++++++++++++\n 1 file changed, 32 insertions(+)", "diff": "diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml\nindex 12a01f7a5744..d1a2526f43dc 100644\n--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml\n+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml\n@@ -59,16 +59,34 @@ properties:\n - const: dma\n \n reset-gpio:\n+ deprecated: true\n description: Should specify the GPIO for controlling the PCI bus device\n reset signal. It's not polarity aware and defaults to active-low reset\n sequence (L=reset state, H=operation state) (optional required).\n+ This property is deprecated, instead of referencing this property from the\n+ host bridge node, use the reset-gpios property from the root port node.\n \n reset-gpio-active-high:\n+ deprecated: true\n description: If present then the reset sequence using the GPIO\n specified in the \"reset-gpio\" property is reversed (H=reset state,\n L=operation state) (optional required).\n+ This property is deprecated along with the reset-gpio property above, use\n+ the reset-gpios property from the root port node.\n type: boolean\n \n+ pcie@0:\n+ description:\n+ Describe the i.MX6 PCIe Root Port.\n+ type: object\n+ $ref: /schemas/pci/pci-pci-bridge.yaml#\n+\n+ properties:\n+ reg:\n+ maxItems: 1\n+\n+ unevaluatedProperties: false\n+\n required:\n - compatible\n - reg\n@@ -229,6 +247,7 @@ unevaluatedProperties: false\n examples:\n - |\n #include <dt-bindings/clock/imx6qdl-clock.h>\n+ #include <dt-bindings/gpio/gpio.h>\n #include <dt-bindings/interrupt-controller/arm-gic.h>\n \n pcie: pcie@1ffc000 {\n@@ -255,5 +274,18 @@ examples:\n <&clks IMX6QDL_CLK_LVDS1_GATE>,\n <&clks IMX6QDL_CLK_PCIE_REF_125M>;\n clock-names = \"pcie\", \"pcie_bus\", \"pcie_phy\";\n+\n+ pcie_port0: pcie@0 {\n+ compatible = \"pciclass,0604\";\n+ device_type = \"pci\";\n+ reg = <0x0 0x0 0x0 0x0 0x0>;\n+ bus-range = <0x01 0xff>;\n+\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+ ranges;\n+\n+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;\n+ };\n };\n ...\n", "prefixes": [ "V11", "01/12" ] }