Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2220248/?format=api
{ "id": 2220248, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2220248/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260406182609.193886-14-pierrick.bouvier@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260406182609.193886-14-pierrick.bouvier@linaro.org>", "date": "2026-04-06T18:26:02", "name": "[v8,13/20] tcg/translator: add parameter to translator_loop for current addr type", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "fb2af4c48e777333318ad291fc7ca4d13793961c", "submitter": { "id": 85798, "url": "http://patchwork.ozlabs.org/api/1.1/people/85798/?format=api", "name": "Pierrick Bouvier", "email": "pierrick.bouvier@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260406182609.193886-14-pierrick.bouvier@linaro.org/mbox/", "series": [ { "id": 498886, "url": "http://patchwork.ozlabs.org/api/1.1/series/498886/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498886", "date": "2026-04-06T18:25:52", "name": "target/arm: single-binary", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/498886/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2220248/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2220248/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=DVcrOuxt;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fqHsH2PMjz1yFt\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 07 Apr 2026 04:28:51 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w9oem-0007Ud-Lk; Mon, 06 Apr 2026 14:26:40 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <pierrick.bouvier@linaro.org>)\n id 1w9oek-0007Rb-9O\n for qemu-devel@nongnu.org; Mon, 06 Apr 2026 14:26:38 -0400", "from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <pierrick.bouvier@linaro.org>)\n id 1w9oeg-0002Pa-8W\n for qemu-devel@nongnu.org; Mon, 06 Apr 2026 14:26:37 -0400", "by mail-pg1-x529.google.com with SMTP id\n 41be03b00d2f7-c742b9b7727so1039525a12.0\n for <qemu-devel@nongnu.org>; Mon, 06 Apr 2026 11:26:33 -0700 (PDT)", "from pc.taild8403c.ts.net (216-71-219-44.dyn.novuscom.net.\n [216.71.219.44]) by smtp.gmail.com with ESMTPSA id\n 41be03b00d2f7-c76c6561fe9sm12765080a12.15.2026.04.06.11.26.31\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Mon, 06 Apr 2026 11:26:31 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1775499992; x=1776104792; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=1L86uxagesTAR2MbXgeWPsQvtTYWrgsau2aa3Y7nNBA=;\n b=DVcrOuxtBq8lIj4p3FJSGwiLYnJEBi+ldf4mwEJg4VAPtSULA/bNYmWeojwN9A0C10\n XnryRDL/mGk76g1BvccMhIJdNwbcQFCloAz8339M6l1quG+HzrwxHGzNpbnIm3ryRj5L\n zeMwLADyu2Yklp4aObmf+EoQuTMucLDmPAGU9AQH6jBk12TeqE57fOuPxjeVKO70lfGI\n qZ+pIE0ajDT5DE0poPpZAmsbGwzgmaKvC+9/kiFnumyK207lEJRbfdjZKwM866s/FpZo\n bLbzxhan2h+GAQjPpRer/lBfZvVcOXCrNnKSoIJ4VkAfGrUudTbr+wWAWTHhSc205PSP\n VTPw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1775499992; x=1776104792;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=1L86uxagesTAR2MbXgeWPsQvtTYWrgsau2aa3Y7nNBA=;\n b=iDhGSxVhNwqzdfTpjsfLfpJvbmpZfEtBHfvJ9VaPLE158jSt0/x4abt08QASbaR6K+\n s+ZTvaGZQuafvt10ADR8DEy/3/X3VpElIkCXEX4BMFCxRiU+oHUaGmrL4ibg8A/fkJ+M\n DESYSSbK1aDFMfeDPWJr/2Swf2xHV433zk3lWAxzXUy08JoyeTW0/HttV0rybYgR35PI\n xk5dLx61BmmIHDdUYw/0hg95xD7Qw7VSeFFlsNm5tBXocBYNqUguo64hxW2YkxAZRUiz\n 2UszUSGgtAlo3cfPaxKI6uf/FHV8vVLdOp2Orqc16B3zVV3mcxwGR5mRCfg0CX6D0KJu\n KZFQ==", "X-Gm-Message-State": "AOJu0Yye24VYfhUNeSod5piudyaxqDKzzjrSjxzTxbxyusKE6JT+Ljo7\n rzpOcK6KEqvzU7HCcENhSxbFNKXAmnKCbsH2J8IMWbNWZoEgV63xKv6LHaWZqix8HF4onY4Ui4d\n 8ws17/OIeIg==", "X-Gm-Gg": "AeBDiet9xsdXkXhbVFQk+ibPAeY3PV5QofL3/wUHCFDSvhF3biHnZVZjzu+lPQRWd0q\n u9+gSlcbzfW4mGNwPpgqzRhu5+XF9O2oGuzkdGM9WvSPDnHIuDHdp54vH8OnYe0vlt5gbEE4Vr2\n n9TjIlWFoOJ/naCvY+N3u72vbodAuqJbQ1Fp2AsEefQLaAZO5b6cPrmCJpSVnVhKLeZd1rALGLr\n AWiJ58iKK9g3KOsffCKACDZcJTmZTrIy7tSqhlXfLca4/cNiKSr9c9uO9Pn9tihW7LFRc1HwadP\n Ox1YS3k8Ab3t9akgnStNzNM6Nk0lYej9+HhX20oxHqFJHvUJV6LIGiUlLiTNwPJ61Xf8FoQxBz2\n 3zClCAzmvSe1GXHXvF0MNph1IjCsWzyjtjFaYIMITJYY0//C6iyQ2sknO+zy5C1jwZZqoF11y6Y\n OGXOO1dj/sCXPX0TNHVJTQCXXT3gAZER1Nk108rZJLwM45H0Gl2cCTOe+bpGyVFOuHdms0pZNYs\n a0k", "X-Received": "by 2002:a05:6a20:7346:b0:39f:2af3:e8ee with SMTP id\n adf61e73a8af0-39f2d8b8bb3mr12172307637.13.1775499992074;\n Mon, 06 Apr 2026 11:26:32 -0700 (PDT)", "From": "Pierrick Bouvier <pierrick.bouvier@linaro.org>", "To": "qemu-devel@nongnu.org", "Cc": "Peter Maydell <peter.maydell@linaro.org>,\n Richard Henderson <richard.henderson@linaro.org>, jim.macarthur@linaro.org,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>,\n Paolo Bonzini <pbonzini@redhat.com>, philmd@linaro.org, qemu-arm@nongnu.org", "Subject": "[PATCH v8 13/20] tcg/translator: add parameter to translator_loop for\n current addr type", "Date": "Mon, 6 Apr 2026 11:26:02 -0700", "Message-ID": "<20260406182609.193886-14-pierrick.bouvier@linaro.org>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260406182609.193886-1-pierrick.bouvier@linaro.org>", "References": "<20260406182609.193886-1-pierrick.bouvier@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::529;\n envelope-from=pierrick.bouvier@linaro.org; helo=mail-pg1-x529.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "With TCG_ADDRESS_BITS mechanism, it's now possible to specify which\nvariant every source file is written for. Compared to before, it means\nthat addr_type will now vary per tb translation, where it was constant\nfor a given target previously.\n\nThus, we add a parameter to translator_loop().\nSince all targets for now still use default target addr type, we add a\nsimple helper returning this value based on target_long_bits().\n\nThis will allow us to convert targets one by one.\n\nSigned-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>\n---\n include/exec/translator.h | 4 +++-\n include/tcg/tcg.h | 5 +++++\n accel/tcg/translator.c | 4 +++-\n target/alpha/translate.c | 3 ++-\n target/arm/tcg/translate.c | 3 ++-\n target/avr/translate.c | 3 ++-\n target/hexagon/translate.c | 3 ++-\n target/hppa/translate.c | 3 ++-\n target/i386/tcg/translate.c | 3 ++-\n target/loongarch/tcg/translate.c | 3 ++-\n target/m68k/translate.c | 3 ++-\n target/microblaze/translate.c | 3 ++-\n target/mips/tcg/translate.c | 3 ++-\n target/or1k/translate.c | 3 ++-\n target/ppc/translate.c | 3 ++-\n target/riscv/translate.c | 3 ++-\n target/rx/translate.c | 3 ++-\n target/s390x/tcg/translate.c | 3 ++-\n target/sh4/translate.c | 3 ++-\n target/sparc/translate.c | 3 ++-\n target/tricore/translate.c | 3 ++-\n target/xtensa/translate.c | 3 ++-\n 22 files changed, 49 insertions(+), 21 deletions(-)", "diff": "diff --git a/include/exec/translator.h b/include/exec/translator.h\nindex 8d343627bd9..c1d31e06b53 100644\n--- a/include/exec/translator.h\n+++ b/include/exec/translator.h\n@@ -20,6 +20,7 @@\n \n #include \"exec/memop.h\"\n #include \"exec/vaddr.h\"\n+#include \"tcg/tcg.h\"\n \n /**\n * DisasJumpType:\n@@ -132,6 +133,7 @@ typedef struct TranslatorOps {\n * @host_pc: host physical program counter address\n * @ops: Target-specific operations.\n * @db: Disassembly context.\n+ * @addr_type: TCG Type for addresses (TCGv_va).\n *\n * Generic translator loop.\n *\n@@ -147,7 +149,7 @@ typedef struct TranslatorOps {\n */\n void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,\n vaddr pc, void *host_pc, const TranslatorOps *ops,\n- DisasContextBase *db);\n+ DisasContextBase *db, TCGType addr_type);\n \n /**\n * translator_use_goto_tb\ndiff --git a/include/tcg/tcg.h b/include/tcg/tcg.h\nindex 45c7e118c3d..f8301d98623 100644\n--- a/include/tcg/tcg.h\n+++ b/include/tcg/tcg.h\n@@ -166,6 +166,11 @@ static inline int tcg_type_size(TCGType t)\n \n typedef tcg_target_ulong TCGArg;\n \n+static inline TCGType tcg_default_addr_type(void)\n+{\n+ return target_long_bits() == 32 ? TCG_TYPE_I32 : TCG_TYPE_I64;\n+}\n+\n /* Define type and accessor macros for TCG variables.\n \n TCG variables are the inputs and outputs of TCG ops, as described\ndiff --git a/accel/tcg/translator.c b/accel/tcg/translator.c\nindex f3eddcbb2e8..cd7d079fe05 100644\n--- a/accel/tcg/translator.c\n+++ b/accel/tcg/translator.c\n@@ -121,13 +121,15 @@ bool translator_use_goto_tb(DisasContextBase *db, vaddr dest)\n \n void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,\n vaddr pc, void *host_pc, const TranslatorOps *ops,\n- DisasContextBase *db)\n+ DisasContextBase *db, TCGType addr_type)\n {\n uint32_t cflags = tb_cflags(tb);\n TCGOp *icount_start_insn;\n TCGOp *first_insn_start = NULL;\n bool plugin_enabled;\n \n+ tcg_ctx->addr_type = addr_type;\n+\n /* Initialize DisasContext */\n db->tb = tb;\n db->pc_first = pc;\ndiff --git a/target/alpha/translate.c b/target/alpha/translate.c\nindex 4d22d7d5a45..24c556bffc0 100644\n--- a/target/alpha/translate.c\n+++ b/target/alpha/translate.c\n@@ -2953,5 +2953,6 @@ void alpha_translate_code(CPUState *cpu, TranslationBlock *tb,\n int *max_insns, vaddr pc, void *host_pc)\n {\n DisasContext dc;\n- translator_loop(cpu, tb, max_insns, pc, host_pc, &alpha_tr_ops, &dc.base);\n+ translator_loop(cpu, tb, max_insns, pc, host_pc, &alpha_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\ndiff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c\nindex 204f9657993..ebcf68aea97 100644\n--- a/target/arm/tcg/translate.c\n+++ b/target/arm/tcg/translate.c\n@@ -6891,5 +6891,6 @@ void arm_translate_code(CPUState *cpu, TranslationBlock *tb,\n }\n #endif\n \n- translator_loop(cpu, tb, max_insns, pc, host_pc, ops, &dc.base);\n+ translator_loop(cpu, tb, max_insns, pc, host_pc, ops, &dc.base,\n+ tcg_default_addr_type());\n }\ndiff --git a/target/avr/translate.c b/target/avr/translate.c\nindex 649dd4b0112..e7c894b578f 100644\n--- a/target/avr/translate.c\n+++ b/target/avr/translate.c\n@@ -2802,5 +2802,6 @@ void avr_cpu_translate_code(CPUState *cs, TranslationBlock *tb,\n int *max_insns, vaddr pc, void *host_pc)\n {\n DisasContext dc = { };\n- translator_loop(cs, tb, max_insns, pc, host_pc, &avr_tr_ops, &dc.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &avr_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\ndiff --git a/target/hexagon/translate.c b/target/hexagon/translate.c\nindex 633401451d8..222e19c707e 100644\n--- a/target/hexagon/translate.c\n+++ b/target/hexagon/translate.c\n@@ -1077,7 +1077,8 @@ void hexagon_translate_code(CPUState *cs, TranslationBlock *tb,\n DisasContext ctx;\n \n translator_loop(cs, tb, max_insns, pc, host_pc,\n- &hexagon_tr_ops, &ctx.base);\n+ &hexagon_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\n \n #define NAME_LEN 64\ndiff --git a/target/hppa/translate.c b/target/hppa/translate.c\nindex 70c20c00377..7cc260359a4 100644\n--- a/target/hppa/translate.c\n+++ b/target/hppa/translate.c\n@@ -4899,5 +4899,6 @@ void hppa_translate_code(CPUState *cs, TranslationBlock *tb,\n int *max_insns, vaddr pc, void *host_pc)\n {\n DisasContext ctx = { };\n- translator_loop(cs, tb, max_insns, pc, host_pc, &hppa_tr_ops, &ctx.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &hppa_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\ndiff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c\nindex 14210d569f7..261f2f928b3 100644\n--- a/target/i386/tcg/translate.c\n+++ b/target/i386/tcg/translate.c\n@@ -3615,5 +3615,6 @@ void x86_translate_code(CPUState *cpu, TranslationBlock *tb,\n {\n DisasContext dc;\n \n- translator_loop(cpu, tb, max_insns, pc, host_pc, &i386_tr_ops, &dc.base);\n+ translator_loop(cpu, tb, max_insns, pc, host_pc, &i386_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\ndiff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c\nindex b9ed13d19c6..d3a03619e27 100644\n--- a/target/loongarch/tcg/translate.c\n+++ b/target/loongarch/tcg/translate.c\n@@ -342,7 +342,8 @@ void loongarch_translate_code(CPUState *cs, TranslationBlock *tb,\n DisasContext ctx;\n \n translator_loop(cs, tb, max_insns, pc, host_pc,\n- &loongarch_tr_ops, &ctx.base);\n+ &loongarch_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\n \n void loongarch_translate_init(void)\ndiff --git a/target/m68k/translate.c b/target/m68k/translate.c\nindex abc1c79f3cd..8e484cf36ea 100644\n--- a/target/m68k/translate.c\n+++ b/target/m68k/translate.c\n@@ -6126,7 +6126,8 @@ void m68k_translate_code(CPUState *cpu, TranslationBlock *tb,\n int *max_insns, vaddr pc, void *host_pc)\n {\n DisasContext dc;\n- translator_loop(cpu, tb, max_insns, pc, host_pc, &m68k_tr_ops, &dc.base);\n+ translator_loop(cpu, tb, max_insns, pc, host_pc, &m68k_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\n \n static double floatx80_to_double(CPUM68KState *env, uint16_t high, uint64_t low)\ndiff --git a/target/microblaze/translate.c b/target/microblaze/translate.c\nindex 2af67beecec..fdbf493145d 100644\n--- a/target/microblaze/translate.c\n+++ b/target/microblaze/translate.c\n@@ -1788,7 +1788,8 @@ void mb_translate_code(CPUState *cpu, TranslationBlock *tb,\n int *max_insns, vaddr pc, void *host_pc)\n {\n DisasContext dc;\n- translator_loop(cpu, tb, max_insns, pc, host_pc, &mb_tr_ops, &dc.base);\n+ translator_loop(cpu, tb, max_insns, pc, host_pc, &mb_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\n \n void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)\ndiff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c\nindex 54849e9ff1a..08b69716e40 100644\n--- a/target/mips/tcg/translate.c\n+++ b/target/mips/tcg/translate.c\n@@ -15242,7 +15242,8 @@ void mips_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext ctx;\n \n- translator_loop(cs, tb, max_insns, pc, host_pc, &mips_tr_ops, &ctx.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &mips_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\n \n void mips_tcg_init(void)\ndiff --git a/target/or1k/translate.c b/target/or1k/translate.c\nindex de81dc6ef8d..11aaa1084a2 100644\n--- a/target/or1k/translate.c\n+++ b/target/or1k/translate.c\n@@ -1647,7 +1647,8 @@ void openrisc_translate_code(CPUState *cs, TranslationBlock *tb,\n DisasContext ctx;\n \n translator_loop(cs, tb, max_insns, pc, host_pc,\n- &openrisc_tr_ops, &ctx.base);\n+ &openrisc_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\n \n void openrisc_cpu_dump_state(CPUState *cs, FILE *f, int flags)\ndiff --git a/target/ppc/translate.c b/target/ppc/translate.c\nindex a09a6df93fd..2f8b0061ff5 100644\n--- a/target/ppc/translate.c\n+++ b/target/ppc/translate.c\n@@ -6719,5 +6719,6 @@ void ppc_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext ctx;\n \n- translator_loop(cs, tb, max_insns, pc, host_pc, &ppc_tr_ops, &ctx.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &ppc_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\ndiff --git a/target/riscv/translate.c b/target/riscv/translate.c\nindex cb4f4436018..3706359f516 100644\n--- a/target/riscv/translate.c\n+++ b/target/riscv/translate.c\n@@ -1440,7 +1440,8 @@ void riscv_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext ctx;\n \n- translator_loop(cs, tb, max_insns, pc, host_pc, &riscv_tr_ops, &ctx.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &riscv_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\n \n void riscv_translate_init(void)\ndiff --git a/target/rx/translate.c b/target/rx/translate.c\nindex a245b9db8fe..2f3d01d22a8 100644\n--- a/target/rx/translate.c\n+++ b/target/rx/translate.c\n@@ -2270,7 +2270,8 @@ void rx_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext dc;\n \n- translator_loop(cs, tb, max_insns, pc, host_pc, &rx_tr_ops, &dc.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &rx_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\n \n #define ALLOC_REGISTER(sym, name) \\\ndiff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c\nindex 92344441878..f8f134ee99b 100644\n--- a/target/s390x/tcg/translate.c\n+++ b/target/s390x/tcg/translate.c\n@@ -6509,7 +6509,8 @@ void s390x_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext dc;\n \n- translator_loop(cs, tb, max_insns, pc, host_pc, &s390x_tr_ops, &dc.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &s390x_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\n \n void s390x_restore_state_to_opc(CPUState *cs,\ndiff --git a/target/sh4/translate.c b/target/sh4/translate.c\nindex b1057727c55..ee0848d131b 100644\n--- a/target/sh4/translate.c\n+++ b/target/sh4/translate.c\n@@ -2316,5 +2316,6 @@ void sh4_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext ctx;\n \n- translator_loop(cs, tb, max_insns, pc, host_pc, &sh4_tr_ops, &ctx.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &sh4_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\ndiff --git a/target/sparc/translate.c b/target/sparc/translate.c\nindex 7e8558dbbd8..c2c446f1407 100644\n--- a/target/sparc/translate.c\n+++ b/target/sparc/translate.c\n@@ -5853,7 +5853,8 @@ void sparc_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext dc = {};\n \n- translator_loop(cs, tb, max_insns, pc, host_pc, &sparc_tr_ops, &dc.base);\n+ translator_loop(cs, tb, max_insns, pc, host_pc, &sparc_tr_ops, &dc.base,\n+ tcg_default_addr_type());\n }\n \n void sparc_tcg_init(void)\ndiff --git a/target/tricore/translate.c b/target/tricore/translate.c\nindex 0eaf7a82f87..4f264987853 100644\n--- a/target/tricore/translate.c\n+++ b/target/tricore/translate.c\n@@ -8500,7 +8500,8 @@ void tricore_translate_code(CPUState *cs, TranslationBlock *tb,\n {\n DisasContext ctx;\n translator_loop(cs, tb, max_insns, pc, host_pc,\n- &tricore_tr_ops, &ctx.base);\n+ &tricore_tr_ops, &ctx.base,\n+ tcg_default_addr_type());\n }\n \n /*\ndiff --git a/target/xtensa/translate.c b/target/xtensa/translate.c\nindex 5e3707d3fdf..3fe7558bc52 100644\n--- a/target/xtensa/translate.c\n+++ b/target/xtensa/translate.c\n@@ -1233,7 +1233,8 @@ void xtensa_translate_code(CPUState *cpu, TranslationBlock *tb,\n {\n DisasContext dc = {};\n translator_loop(cpu, tb, max_insns, pc, host_pc,\n- &xtensa_translator_ops, &dc.base);\n+ &xtensa_translator_ops, &dc.base,\n+ tcg_default_addr_type());\n }\n \n void xtensa_cpu_dump_state(CPUState *cs, FILE *f, int flags)\n", "prefixes": [ "v8", "13/20" ] }