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GET /api/1.1/patches/2219708/?format=api
{ "id": 2219708, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2219708/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260403220501.2263835-1-kuba@kernel.org/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/1.1/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/" }, "msgid": "<20260403220501.2263835-1-kuba@kernel.org>", "date": "2026-04-03T22:05:01", "name": "[net-next,v2] eth: remove the driver for acenic / tigon1&2", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a7c065e087cd8e95c1b4f7b39a9de0821348a450", "submitter": { "id": 77159, "url": "http://patchwork.ozlabs.org/api/1.1/people/77159/?format=api", "name": "Jakub Kicinski", "email": "kuba@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260403220501.2263835-1-kuba@kernel.org/mbox/", "series": [ { "id": 498680, "url": "http://patchwork.ozlabs.org/api/1.1/series/498680/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=498680", "date": "2026-04-03T22:05:01", "name": "[net-next,v2] eth: remove the driver for acenic / tigon1&2", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/498680/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219708/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219708/checks/", "tags": {}, "headers": { "Return-Path": "\n <linuxppc-dev+bounces-19291-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=p6/r0gcq;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775253908;\n\tbh=Baz8O9PCAtDiQoCKjfm6e2xKCvoC2LbQhEN1ef4qf50=;\n\th=From:To:Cc:Subject:Date:From;\n\tb=p6/r0gcqR5drjchb6VY0bmR2SkGjqMeS2ob5jxH1MTRs0JnMEqeqiYTjt2NNMgxJG\n\t ASDzMJ4bTWNG+ZLdAcJgYQ/9DgYXYEFFAunwteEbq//Ga0JutAec7a30iEBv/fa5m4\n\t U25dzeCzCtxm+WnHBJEQKfDvokXOjU7ALc8INFB8D2t9TLLY5+jyOF6/hd6L6j4bzp\n\t k5WdMC5bIJXhw5nTsAXzN/U8XNzO3/X/11HyQ68anXF01P6sWAwbxh3MTPCYDUbezu\n\t ORHbEyMrcq7u/E0PHaROMWZ1PU7pzxQ6rL4MFiewXgWZ2G+pwoMG6YIt7TfAVzcyCb\n\t Rn66lVFCPAYeQ==", "From": "Jakub Kicinski <kuba@kernel.org>", "To": "davem@davemloft.net", "Cc": "netdev@vger.kernel.org,\n\tedumazet@google.com,\n\tpabeni@redhat.com,\n\tandrew+netdev@lunn.ch,\n\thorms@kernel.org,\n\tJakub Kicinski <kuba@kernel.org>,\n\tJes Sorensen <jes@trained-monkey.org>,\n\tGreg Kroah-Hartman <gregkh@linuxfoundation.org>,\n\thelgaas@kernel.org,\n\tchenhuacai@kernel.org,\n\tkernel@xen0n.name,\n\ttsbogend@alpha.franken.de,\n\tJames.Bottomley@HansenPartnership.com,\n\tdeller@gmx.de,\n\tmaddy@linux.ibm.com,\n\tmpe@ellerman.id.au,\n\tnpiggin@gmail.com,\n\tchleroy@kernel.org,\n\thca@linux.ibm.com,\n\tgor@linux.ibm.com,\n\tagordeev@linux.ibm.com,\n\tborntraeger@linux.ibm.com,\n\tsvens@linux.ibm.com,\n\tebiggers@google.com,\n\tardb@kernel.org,\n\ttiwai@suse.de,\n\ttytso@mit.edu,\n\tenelsonmoore@gmail.com,\n\tmartin.petersen@oracle.com,\n\tjirislaby@kernel.org,\n\tgeert@linux-m68k.org,\n\tvineethr@linux.ibm.com,\n\tlirongqing@baidu.com,\n\tkshk@linux.ibm.com,\n\tvadim.fedorenko@linux.dev,\n\twangruikang@iscas.ac.cn,\n\tdong100@mucse.com,\n\thkallweit1@gmail.com,\n\tkees@kernel.org,\n\tloongarch@lists.linux.dev,\n\tlinux-mips@vger.kernel.org,\n\tlinux-parisc@vger.kernel.org,\n\tlinuxppc-dev@lists.ozlabs.org,\n\tlinux-s390@vger.kernel.org", "Subject": "[PATCH net-next v2] eth: remove the driver for acenic / tigon1&2", "Date": "Fri, 3 Apr 2026 15:05:01 -0700", "Message-ID": "<20260403220501.2263835-1-kuba@kernel.org>", "X-Mailer": "git-send-email 2.53.0", "X-Mailing-List": "linuxppc-dev@lists.ozlabs.org", "List-Id": "<linuxppc-dev.lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev+help@lists.ozlabs.org>", "List-Owner": "<mailto:linuxppc-dev+owner@lists.ozlabs.org>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Archive": "<https://lore.kernel.org/linuxppc-dev/>,\n <https://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Subscribe": "<mailto:linuxppc-dev+subscribe@lists.ozlabs.org>,\n <mailto:linuxppc-dev+subscribe-digest@lists.ozlabs.org>,\n <mailto:linuxppc-dev+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:linuxppc-dev+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Spam-Status": "No, score=-0.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS\n\tautolearn=disabled version=4.0.1 OzLabs 8", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "The entire git history for this driver looks like tree-wide\nand automated cleanups. There's even more coming now with\nAI, so let's try to delete it instead.\n\nAcked-by: Jes Sorensen <jes@trained-monkey.org>\nAcked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>\nSigned-off-by: Jakub Kicinski <kuba@kernel.org>\n---\nv2:\n - keep the PCI IDs\nv1: https://lore.kernel.org/20260402183029.1236713-1-kuba@kernel.org\n\nCC: helgaas@kernel.org\nCC: chenhuacai@kernel.org\nCC: kernel@xen0n.name\nCC: tsbogend@alpha.franken.de\nCC: James.Bottomley@HansenPartnership.com\nCC: deller@gmx.de\nCC: maddy@linux.ibm.com\nCC: mpe@ellerman.id.au\nCC: npiggin@gmail.com\nCC: chleroy@kernel.org\nCC: hca@linux.ibm.com\nCC: gor@linux.ibm.com\nCC: agordeev@linux.ibm.com\nCC: borntraeger@linux.ibm.com\nCC: svens@linux.ibm.com\nCC: ebiggers@google.com\nCC: ardb@kernel.org\nCC: tiwai@suse.de\nCC: tytso@mit.edu\nCC: enelsonmoore@gmail.com\nCC: martin.petersen@oracle.com\nCC: jirislaby@kernel.org\nCC: gregkh@linuxfoundation.org\nCC: geert@linux-m68k.org\nCC: vineethr@linux.ibm.com\nCC: lirongqing@baidu.com\nCC: kshk@linux.ibm.com\nCC: vadim.fedorenko@linux.dev\nCC: wangruikang@iscas.ac.cn\nCC: dong100@mucse.com\nCC: hkallweit1@gmail.com\nCC: kees@kernel.org\nCC: loongarch@lists.linux.dev\nCC: linux-mips@vger.kernel.org\nCC: linux-parisc@vger.kernel.org\nCC: linuxppc-dev@lists.ozlabs.org\nCC: linux-s390@vger.kernel.org\n---\n MAINTAINERS | 6 -\n drivers/net/ethernet/Kconfig | 1 -\n drivers/net/ethernet/alteon/Kconfig | 47 -\n drivers/net/ethernet/Makefile | 1 -\n drivers/net/ethernet/alteon/Makefile | 6 -\n drivers/net/ethernet/alteon/acenic.h | 791 -----\n drivers/net/ethernet/alteon/acenic.c | 3178 -------------------\n arch/loongarch/configs/loongson32_defconfig | 1 -\n arch/loongarch/configs/loongson64_defconfig | 1 -\n arch/mips/configs/cavium_octeon_defconfig | 1 -\n arch/mips/configs/loongson2k_defconfig | 1 -\n arch/mips/configs/loongson3_defconfig | 1 -\n arch/mips/configs/malta_qemu_32r6_defconfig | 1 -\n arch/mips/configs/maltaaprp_defconfig | 1 -\n arch/mips/configs/maltasmvp_defconfig | 1 -\n arch/mips/configs/maltasmvp_eva_defconfig | 1 -\n arch/mips/configs/maltaup_defconfig | 1 -\n arch/mips/configs/mtx1_defconfig | 1 -\n arch/parisc/configs/generic-32bit_defconfig | 1 -\n arch/parisc/configs/generic-64bit_defconfig | 1 -\n arch/powerpc/configs/44x/akebono_defconfig | 1 -\n arch/powerpc/configs/g5_defconfig | 2 -\n arch/powerpc/configs/powernv_defconfig | 2 -\n arch/powerpc/configs/ppc64_defconfig | 2 -\n arch/powerpc/configs/ppc64e_defconfig | 2 -\n arch/powerpc/configs/ppc6xx_defconfig | 1 -\n arch/powerpc/configs/skiroot_defconfig | 2 -\n arch/s390/configs/debug_defconfig | 1 -\n arch/s390/configs/defconfig | 1 -\n 29 files changed, 4057 deletions(-)\n delete mode 100644 drivers/net/ethernet/alteon/Kconfig\n delete mode 100644 drivers/net/ethernet/alteon/Makefile\n delete mode 100644 drivers/net/ethernet/alteon/acenic.h\n delete mode 100644 drivers/net/ethernet/alteon/acenic.c", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex c583c5478ef6..cb48c9ad9ddc 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -261,12 +261,6 @@ L:\tlinux-gpio@vger.kernel.org\n S:\tMaintained\n F:\tdrivers/gpio/gpio-pcie-idio-24.c\n \n-ACENIC DRIVER\n-M:\tJes Sorensen <jes@trained-monkey.org>\n-L:\tlinux-acenic@sunsite.dk\n-S:\tMaintained\n-F:\tdrivers/net/ethernet/alteon/acenic*\n-\n ACER ASPIRE ONE TEMPERATURE AND FAN DRIVER\n M:\tPeter Kaestle <peter@piie.net>\n L:\tplatform-driver-x86@vger.kernel.org\ndiff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig\nindex aa7103e7f47f..bdc29d143160 100644\n--- a/drivers/net/ethernet/Kconfig\n+++ b/drivers/net/ethernet/Kconfig\n@@ -23,7 +23,6 @@ source \"drivers/net/ethernet/agere/Kconfig\"\n source \"drivers/net/ethernet/airoha/Kconfig\"\n source \"drivers/net/ethernet/alacritech/Kconfig\"\n source \"drivers/net/ethernet/allwinner/Kconfig\"\n-source \"drivers/net/ethernet/alteon/Kconfig\"\n source \"drivers/net/ethernet/altera/Kconfig\"\n source \"drivers/net/ethernet/amazon/Kconfig\"\n source \"drivers/net/ethernet/amd/Kconfig\"\ndiff --git a/drivers/net/ethernet/alteon/Kconfig b/drivers/net/ethernet/alteon/Kconfig\ndeleted file mode 100644\nindex cfe1f3159d61..000000000000\n--- a/drivers/net/ethernet/alteon/Kconfig\n+++ /dev/null\n@@ -1,47 +0,0 @@\n-# SPDX-License-Identifier: GPL-2.0-only\n-#\n-# Alteon network device configuration\n-#\n-\n-config NET_VENDOR_ALTEON\n-\tbool \"Alteon devices\"\n-\tdefault y\n-\tdepends on PCI\n-\thelp\n-\t If you have a network (Ethernet) card belonging to this class, say Y.\n-\n-\t Note that the answer to this question doesn't directly affect the\n-\t kernel: saying N will just cause the configurator to skip all\n-\t the questions about Alteon cards. If you say Y, you will be asked for\n-\t your specific card in the following questions.\n-\n-if NET_VENDOR_ALTEON\n-\n-config ACENIC\n-\ttristate \"Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support\"\n-\tdepends on PCI\n-\thelp\n-\t Say Y here if you have an Alteon AceNIC, 3Com 3C985(B), NetGear\n-\t GA620, SGI Gigabit or Farallon PN9000-SX PCI Gigabit Ethernet\n-\t adapter. The driver allows for using the Jumbo Frame option (9000\n-\t bytes/frame) however it requires that your switches can handle this\n-\t as well. To enable Jumbo Frames, add `mtu 9000' to your ifconfig\n-\t line.\n-\n-\t To compile this driver as a module, choose M here: the\n-\t module will be called acenic.\n-\n-config ACENIC_OMIT_TIGON_I\n-\tbool \"Omit support for old Tigon I based AceNICs\"\n-\tdepends on ACENIC\n-\thelp\n-\t Say Y here if you only have Tigon II based AceNICs and want to leave\n-\t out support for the older Tigon I based cards which are no longer\n-\t being sold (ie. the original Alteon AceNIC and 3Com 3C985 (non B\n-\t version)). This will reduce the size of the driver object by\n-\t app. 100KB. If you are not sure whether your card is a Tigon I or a\n-\t Tigon II, say N here.\n-\n-\t The safe and default value for this is N.\n-\n-endif # NET_VENDOR_ALTEON\ndiff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile\nindex 6615a67a63d5..6bffb60ba644 100644\n--- a/drivers/net/ethernet/Makefile\n+++ b/drivers/net/ethernet/Makefile\n@@ -13,7 +13,6 @@ obj-$(CONFIG_NET_VENDOR_AGERE) += agere/\n obj-$(CONFIG_NET_VENDOR_AIROHA) += airoha/\n obj-$(CONFIG_NET_VENDOR_ALACRITECH) += alacritech/\n obj-$(CONFIG_NET_VENDOR_ALLWINNER) += allwinner/\n-obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/\n obj-$(CONFIG_ALTERA_TSE) += altera/\n obj-$(CONFIG_NET_VENDOR_AMAZON) += amazon/\n obj-$(CONFIG_NET_VENDOR_AMD) += amd/\ndiff --git a/drivers/net/ethernet/alteon/Makefile b/drivers/net/ethernet/alteon/Makefile\ndeleted file mode 100644\nindex be5225559b6d..000000000000\n--- a/drivers/net/ethernet/alteon/Makefile\n+++ /dev/null\n@@ -1,6 +0,0 @@\n-# SPDX-License-Identifier: GPL-2.0-only\n-#\n-# Makefile for the Alteon network device drivers.\n-#\n-\n-obj-$(CONFIG_ACENIC) += acenic.o\ndiff --git a/drivers/net/ethernet/alteon/acenic.h b/drivers/net/ethernet/alteon/acenic.h\ndeleted file mode 100644\nindex 0e45a97b9c9b..000000000000\n--- a/drivers/net/ethernet/alteon/acenic.h\n+++ /dev/null\n@@ -1,791 +0,0 @@\n-/* SPDX-License-Identifier: GPL-2.0 */\n-#ifndef _ACENIC_H_\n-#define _ACENIC_H_\n-#include <linux/interrupt.h>\n-#include <linux/workqueue.h>\n-\n-/*\n- * Generate TX index update each time, when TX ring is closed.\n- * Normally, this is not useful, because results in more dma (and irqs\n- * without TX_COAL_INTS_ONLY).\n- */\n-#define USE_TX_COAL_NOW\t 0\n-\n-/*\n- * Addressing:\n- *\n- * The Tigon uses 64-bit host addresses, regardless of their actual\n- * length, and it expects a big-endian format. For 32 bit systems the\n- * upper 32 bits of the address are simply ignored (zero), however for\n- * little endian 64 bit systems (Alpha) this looks strange with the\n- * two parts of the address word being swapped.\n- *\n- * The addresses are split in two 32 bit words for all architectures\n- * as some of them are in PCI shared memory and it is necessary to use\n- * readl/writel to access them.\n- *\n- * The addressing code is derived from Pete Wyckoff's work, but\n- * modified to deal properly with readl/writel usage.\n- */\n-\n-struct ace_regs {\n-\tu32\tpad0[16];\t/* PCI control registers */\n-\n-\tu32\tHostCtrl;\t/* 0x40 */\n-\tu32\tLocalCtrl;\n-\n-\tu32\tpad1[2];\n-\n-\tu32\tMiscCfg;\t/* 0x50 */\n-\n-\tu32\tpad2[2];\n-\n-\tu32\tPciState;\n-\n-\tu32\tpad3[2];\t/* 0x60 */\n-\n-\tu32\tWinBase;\n-\tu32\tWinData;\n-\n-\tu32\tpad4[12];\t/* 0x70 */\n-\n-\tu32\tDmaWriteState;\t/* 0xa0 */\n-\tu32\tpad5[3];\n-\tu32\tDmaReadState;\t/* 0xb0 */\n-\n-\tu32\tpad6[26];\n-\n-\tu32\tAssistState;\n-\n-\tu32\tpad7[8];\t/* 0x120 */\n-\n-\tu32\tCpuCtrl;\t/* 0x140 */\n-\tu32\tPc;\n-\n-\tu32\tpad8[3];\n-\n-\tu32\tSramAddr;\t/* 0x154 */\n-\tu32\tSramData;\n-\n-\tu32\tpad9[49];\n-\n-\tu32\tMacRxState;\t/* 0x220 */\n-\n-\tu32\tpad10[7];\n-\n-\tu32\tCpuBCtrl;\t/* 0x240 */\n-\tu32\tPcB;\n-\n-\tu32\tpad11[3];\n-\n-\tu32\tSramBAddr;\t/* 0x254 */\n-\tu32\tSramBData;\n-\n-\tu32\tpad12[105];\n-\n-\tu32\tpad13[32];\t/* 0x400 */\n-\tu32\tStats[32];\n-\n-\tu32\tMb0Hi;\t\t/* 0x500 */\n-\tu32\tMb0Lo;\n-\tu32\tMb1Hi;\n-\tu32\tCmdPrd;\n-\tu32\tMb2Hi;\n-\tu32\tTxPrd;\n-\tu32\tMb3Hi;\n-\tu32\tRxStdPrd;\n-\tu32\tMb4Hi;\n-\tu32\tRxJumboPrd;\n-\tu32\tMb5Hi;\n-\tu32\tRxMiniPrd;\n-\tu32\tMb6Hi;\n-\tu32\tMb6Lo;\n-\tu32\tMb7Hi;\n-\tu32\tMb7Lo;\n-\tu32\tMb8Hi;\n-\tu32\tMb8Lo;\n-\tu32\tMb9Hi;\n-\tu32\tMb9Lo;\n-\tu32\tMbAHi;\n-\tu32\tMbALo;\n-\tu32\tMbBHi;\n-\tu32\tMbBLo;\n-\tu32\tMbCHi;\n-\tu32\tMbCLo;\n-\tu32\tMbDHi;\n-\tu32\tMbDLo;\n-\tu32\tMbEHi;\n-\tu32\tMbELo;\n-\tu32\tMbFHi;\n-\tu32\tMbFLo;\n-\n-\tu32\tpad14[32];\n-\n-\tu32\tMacAddrHi;\t/* 0x600 */\n-\tu32\tMacAddrLo;\n-\tu32\tInfoPtrHi;\n-\tu32\tInfoPtrLo;\n-\tu32\tMultiCastHi;\t/* 0x610 */\n-\tu32\tMultiCastLo;\n-\tu32\tModeStat;\n-\tu32\tDmaReadCfg;\n-\tu32\tDmaWriteCfg;\t/* 0x620 */\n-\tu32\tTxBufRat;\n-\tu32\tEvtCsm;\n-\tu32\tCmdCsm;\n-\tu32\tTuneRxCoalTicks;/* 0x630 */\n-\tu32\tTuneTxCoalTicks;\n-\tu32\tTuneStatTicks;\n-\tu32\tTuneMaxTxDesc;\n-\tu32\tTuneMaxRxDesc;\t/* 0x640 */\n-\tu32\tTuneTrace;\n-\tu32\tTuneLink;\n-\tu32\tTuneFastLink;\n-\tu32\tTracePtr;\t/* 0x650 */\n-\tu32\tTraceStrt;\n-\tu32\tTraceLen;\n-\tu32\tIfIdx;\n-\tu32\tIfMtu;\t\t/* 0x660 */\n-\tu32\tMaskInt;\n-\tu32\tGigLnkState;\n-\tu32\tFastLnkState;\n-\tu32\tpad16[4];\t/* 0x670 */\n-\tu32\tRxRetCsm;\t/* 0x680 */\n-\n-\tu32\tpad17[31];\n-\n-\tu32\tCmdRng[64];\t/* 0x700 */\n-\tu32\tWindow[0x200];\n-};\n-\n-\n-typedef struct {\n-\tu32 addrhi;\n-\tu32 addrlo;\n-} aceaddr;\n-\n-\n-#define ACE_WINDOW_SIZE\t0x800\n-\n-#define ACE_JUMBO_MTU 9000\n-#define ACE_STD_MTU 1500\n-\n-#define ACE_TRACE_SIZE 0x8000\n-\n-/*\n- * Host control register bits.\n- */\n-\n-#define IN_INT\t\t0x01\n-#define CLR_INT\t\t0x02\n-#define HW_RESET\t0x08\n-#define BYTE_SWAP\t0x10\n-#define WORD_SWAP\t0x20\n-#define MASK_INTS\t0x40\n-\n-/*\n- * Local control register bits.\n- */\n-\n-#define EEPROM_DATA_IN\t\t0x800000\n-#define EEPROM_DATA_OUT\t\t0x400000\n-#define EEPROM_WRITE_ENABLE\t0x200000\n-#define EEPROM_CLK_OUT\t\t0x100000\n-\n-#define EEPROM_BASE\t\t0xa0000000\n-\n-#define EEPROM_WRITE_SELECT\t0xa0\n-#define EEPROM_READ_SELECT\t0xa1\n-\n-#define SRAM_BANK_512K\t\t0x200\n-\n-\n-/*\n- * udelay() values for when clocking the eeprom\n- */\n-#define ACE_SHORT_DELAY\t\t2\n-#define ACE_LONG_DELAY\t\t4\n-\n-\n-/*\n- * Misc Config bits\n- */\n-\n-#define SYNC_SRAM_TIMING\t0x100000\n-\n-\n-/*\n- * CPU state bits.\n- */\n-\n-#define CPU_RESET\t\t0x01\n-#define CPU_TRACE\t\t0x02\n-#define CPU_PROM_FAILED\t\t0x10\n-#define CPU_HALT\t\t0x00010000\n-#define CPU_HALTED\t\t0xffff0000\n-\n-\n-/*\n- * PCI State bits.\n- */\n-\n-#define DMA_READ_MAX_4\t\t0x04\n-#define DMA_READ_MAX_16\t\t0x08\n-#define DMA_READ_MAX_32\t\t0x0c\n-#define DMA_READ_MAX_64\t\t0x10\n-#define DMA_READ_MAX_128\t0x14\n-#define DMA_READ_MAX_256\t0x18\n-#define DMA_READ_MAX_1K\t\t0x1c\n-#define DMA_WRITE_MAX_4\t\t0x20\n-#define DMA_WRITE_MAX_16\t0x40\n-#define DMA_WRITE_MAX_32\t0x60\n-#define DMA_WRITE_MAX_64\t0x80\n-#define DMA_WRITE_MAX_128\t0xa0\n-#define DMA_WRITE_MAX_256\t0xc0\n-#define DMA_WRITE_MAX_1K\t0xe0\n-#define DMA_READ_WRITE_MASK\t0xfc\n-#define MEM_READ_MULTIPLE\t0x00020000\n-#define PCI_66MHZ\t\t0x00080000\n-#define PCI_32BIT\t\t0x00100000\n-#define DMA_WRITE_ALL_ALIGN\t0x00800000\n-#define READ_CMD_MEM\t\t0x06000000\n-#define WRITE_CMD_MEM\t\t0x70000000\n-\n-\n-/*\n- * Mode status\n- */\n-\n-#define ACE_BYTE_SWAP_BD\t0x02\n-#define ACE_WORD_SWAP_BD\t0x04\t\t/* not actually used */\n-#define ACE_WARN\t\t0x08\n-#define ACE_BYTE_SWAP_DMA\t0x10\n-#define ACE_NO_JUMBO_FRAG\t0x200\n-#define ACE_FATAL\t\t0x40000000\n-\n-\n-/*\n- * DMA config\n- */\n-\n-#define DMA_THRESH_1W\t\t0x10\n-#define DMA_THRESH_2W\t\t0x20\n-#define DMA_THRESH_4W\t\t0x40\n-#define DMA_THRESH_8W\t\t0x80\n-#define DMA_THRESH_16W\t\t0x100\n-#define DMA_THRESH_32W\t\t0x0\t/* not described in doc, but exists. */\n-\n-\n-/*\n- * Tuning parameters\n- */\n-\n-#define TICKS_PER_SEC\t\t1000000\n-\n-\n-/*\n- * Link bits\n- */\n-\n-#define LNK_PREF\t\t0x00008000\n-#define LNK_10MB\t\t0x00010000\n-#define LNK_100MB\t\t0x00020000\n-#define LNK_1000MB\t\t0x00040000\n-#define LNK_FULL_DUPLEX\t\t0x00080000\n-#define LNK_HALF_DUPLEX\t\t0x00100000\n-#define LNK_TX_FLOW_CTL_Y\t0x00200000\n-#define LNK_NEG_ADVANCED\t0x00400000\n-#define LNK_RX_FLOW_CTL_Y\t0x00800000\n-#define LNK_NIC\t\t\t0x01000000\n-#define LNK_JAM\t\t\t0x02000000\n-#define LNK_JUMBO\t\t0x04000000\n-#define LNK_ALTEON\t\t0x08000000\n-#define LNK_NEG_FCTL\t\t0x10000000\n-#define LNK_NEGOTIATE\t\t0x20000000\n-#define LNK_ENABLE\t\t0x40000000\n-#define LNK_UP\t\t\t0x80000000\n-\n-\n-/*\n- * Event definitions\n- */\n-\n-#define EVT_RING_ENTRIES\t256\n-#define EVT_RING_SIZE\t(EVT_RING_ENTRIES * sizeof(struct event))\n-\n-struct event {\n-#ifdef __LITTLE_ENDIAN_BITFIELD\n-\tu32\tidx:12;\n-\tu32\tcode:12;\n-\tu32\tevt:8;\n-#else\n-\tu32\tevt:8;\n-\tu32\tcode:12;\n-\tu32\tidx:12;\n-#endif\n-\tu32 pad;\n-};\n-\n-\n-/*\n- * Events\n- */\n-\n-#define E_FW_RUNNING\t\t0x01\n-#define E_STATS_UPDATED\t\t0x04\n-\n-#define E_STATS_UPDATE\t\t0x04\n-\n-#define E_LNK_STATE\t\t0x06\n-#define E_C_LINK_UP\t\t0x01\n-#define E_C_LINK_DOWN\t\t0x02\n-#define E_C_LINK_10_100\t\t0x03\n-\n-#define E_ERROR\t\t\t0x07\n-#define E_C_ERR_INVAL_CMD\t0x01\n-#define E_C_ERR_UNIMP_CMD\t0x02\n-#define E_C_ERR_BAD_CFG\t\t0x03\n-\n-#define E_MCAST_LIST\t\t0x08\n-#define E_C_MCAST_ADDR_ADD\t0x01\n-#define E_C_MCAST_ADDR_DEL\t0x02\n-\n-#define E_RESET_JUMBO_RNG\t0x09\n-\n-\n-/*\n- * Commands\n- */\n-\n-#define CMD_RING_ENTRIES\t64\n-\n-struct cmd {\n-#ifdef __LITTLE_ENDIAN_BITFIELD\n-\tu32\tidx:12;\n-\tu32\tcode:12;\n-\tu32\tevt:8;\n-#else\n-\tu32\tevt:8;\n-\tu32\tcode:12;\n-\tu32\tidx:12;\n-#endif\n-};\n-\n-\n-#define C_HOST_STATE\t\t0x01\n-#define C_C_STACK_UP\t\t0x01\n-#define C_C_STACK_DOWN\t\t0x02\n-\n-#define C_FDR_FILTERING\t\t0x02\n-#define C_C_FDR_FILT_ENABLE\t0x01\n-#define C_C_FDR_FILT_DISABLE\t0x02\n-\n-#define C_SET_RX_PRD_IDX\t0x03\n-#define C_UPDATE_STATS\t\t0x04\n-#define C_RESET_JUMBO_RNG\t0x05\n-#define C_ADD_MULTICAST_ADDR\t0x08\n-#define C_DEL_MULTICAST_ADDR\t0x09\n-\n-#define C_SET_PROMISC_MODE\t0x0a\n-#define C_C_PROMISC_ENABLE\t0x01\n-#define C_C_PROMISC_DISABLE\t0x02\n-\n-#define C_LNK_NEGOTIATION\t0x0b\n-#define C_C_NEGOTIATE_BOTH\t0x00\n-#define C_C_NEGOTIATE_GIG\t0x01\n-#define C_C_NEGOTIATE_10_100\t0x02\n-\n-#define C_SET_MAC_ADDR\t\t0x0c\n-#define C_CLEAR_PROFILE\t\t0x0d\n-\n-#define C_SET_MULTICAST_MODE\t0x0e\n-#define C_C_MCAST_ENABLE\t0x01\n-#define C_C_MCAST_DISABLE\t0x02\n-\n-#define C_CLEAR_STATS\t\t0x0f\n-#define C_SET_RX_JUMBO_PRD_IDX\t0x10\n-#define C_REFRESH_STATS\t\t0x11\n-\n-\n-/*\n- * Descriptor flags\n- */\n-#define BD_FLG_TCP_UDP_SUM\t0x01\n-#define BD_FLG_IP_SUM\t\t0x02\n-#define BD_FLG_END\t\t0x04\n-#define BD_FLG_MORE\t\t0x08\n-#define BD_FLG_JUMBO\t\t0x10\n-#define BD_FLG_UCAST\t\t0x20\n-#define BD_FLG_MCAST\t\t0x40\n-#define BD_FLG_BCAST\t\t0x60\n-#define BD_FLG_TYP_MASK\t\t0x60\n-#define BD_FLG_IP_FRAG\t\t0x80\n-#define BD_FLG_IP_FRAG_END\t0x100\n-#define BD_FLG_VLAN_TAG\t\t0x200\n-#define BD_FLG_FRAME_ERROR\t0x400\n-#define BD_FLG_COAL_NOW\t\t0x800\n-#define BD_FLG_MINI\t\t0x1000\n-\n-\n-/*\n- * Ring Control block flags\n- */\n-#define RCB_FLG_TCP_UDP_SUM\t0x01\n-#define RCB_FLG_IP_SUM\t\t0x02\n-#define RCB_FLG_NO_PSEUDO_HDR\t0x08\n-#define RCB_FLG_VLAN_ASSIST\t0x10\n-#define RCB_FLG_COAL_INT_ONLY\t0x20\n-#define RCB_FLG_TX_HOST_RING\t0x40\n-#define RCB_FLG_IEEE_SNAP_SUM\t0x80\n-#define RCB_FLG_EXT_RX_BD\t0x100\n-#define RCB_FLG_RNG_DISABLE\t0x200\n-\n-\n-/*\n- * TX ring - maximum TX ring entries for Tigon I's is 128\n- */\n-#define MAX_TX_RING_ENTRIES\t256\n-#define TIGON_I_TX_RING_ENTRIES\t128\n-#define TX_RING_SIZE\t\t(MAX_TX_RING_ENTRIES * sizeof(struct tx_desc))\n-#define TX_RING_BASE\t\t0x3800\n-\n-struct tx_desc{\n- aceaddr\taddr;\n-\tu32\tflagsize;\n-#if 0\n-/*\n- * This is in PCI shared mem and must be accessed with readl/writel\n- * real layout is:\n- */\n-#if __LITTLE_ENDIAN\n-\tu16\tflags;\n-\tu16\tsize;\n-\tu16\tvlan;\n-\tu16\treserved;\n-#else\n-\tu16\tsize;\n-\tu16\tflags;\n-\tu16\treserved;\n-\tu16\tvlan;\n-#endif\n-#endif\n-\tu32\tvlanres;\n-};\n-\n-\n-#define RX_STD_RING_ENTRIES\t512\n-#define RX_STD_RING_SIZE\t(RX_STD_RING_ENTRIES * sizeof(struct rx_desc))\n-\n-#define RX_JUMBO_RING_ENTRIES\t256\n-#define RX_JUMBO_RING_SIZE\t(RX_JUMBO_RING_ENTRIES *sizeof(struct rx_desc))\n-\n-#define RX_MINI_RING_ENTRIES\t1024\n-#define RX_MINI_RING_SIZE\t(RX_MINI_RING_ENTRIES *sizeof(struct rx_desc))\n-\n-#define RX_RETURN_RING_ENTRIES\t2048\n-#define RX_RETURN_RING_SIZE\t(RX_MAX_RETURN_RING_ENTRIES * \\\n-\t\t\t\t sizeof(struct rx_desc))\n-\n-struct rx_desc{\n-\taceaddr\taddr;\n-#ifdef __LITTLE_ENDIAN\n-\tu16\tsize;\n-\tu16\tidx;\n-#else\n-\tu16\tidx;\n-\tu16\tsize;\n-#endif\n-#ifdef __LITTLE_ENDIAN\n-\tu16\tflags;\n-\tu16\ttype;\n-#else\n-\tu16\ttype;\n-\tu16\tflags;\n-#endif\n-#ifdef __LITTLE_ENDIAN\n-\tu16\ttcp_udp_csum;\n-\tu16\tip_csum;\n-#else\n-\tu16\tip_csum;\n-\tu16\ttcp_udp_csum;\n-#endif\n-#ifdef __LITTLE_ENDIAN\n-\tu16\tvlan;\n-\tu16\terr_flags;\n-#else\n-\tu16\terr_flags;\n-\tu16\tvlan;\n-#endif\n-\tu32\treserved;\n-\tu32\topague;\n-};\n-\n-\n-/*\n- * This struct is shared with the NIC firmware.\n- */\n-struct ring_ctrl {\n-\taceaddr\trngptr;\n-#ifdef __LITTLE_ENDIAN\n-\tu16\tflags;\n-\tu16\tmax_len;\n-#else\n-\tu16\tmax_len;\n-\tu16\tflags;\n-#endif\n-\tu32\tpad;\n-};\n-\n-\n-struct ace_mac_stats {\n-\tu32 excess_colls;\n-\tu32 coll_1;\n-\tu32 coll_2;\n-\tu32 coll_3;\n-\tu32 coll_4;\n-\tu32 coll_5;\n-\tu32 coll_6;\n-\tu32 coll_7;\n-\tu32 coll_8;\n-\tu32 coll_9;\n-\tu32 coll_10;\n-\tu32 coll_11;\n-\tu32 coll_12;\n-\tu32 coll_13;\n-\tu32 coll_14;\n-\tu32 coll_15;\n-\tu32 late_coll;\n-\tu32 defers;\n-\tu32 crc_err;\n-\tu32 underrun;\n-\tu32 crs_err;\n-\tu32 pad[3];\n-\tu32 drop_ula;\n-\tu32 drop_mc;\n-\tu32 drop_fc;\n-\tu32 drop_space;\n-\tu32 coll;\n-\tu32 kept_bc;\n-\tu32 kept_mc;\n-\tu32 kept_uc;\n-};\n-\n-\n-struct ace_info {\n-\tunion {\n-\t\tu32 stats[256];\n-\t} s;\n-\tstruct ring_ctrl\tevt_ctrl;\n-\tstruct ring_ctrl\tcmd_ctrl;\n-\tstruct ring_ctrl\ttx_ctrl;\n-\tstruct ring_ctrl\trx_std_ctrl;\n-\tstruct ring_ctrl\trx_jumbo_ctrl;\n-\tstruct ring_ctrl\trx_mini_ctrl;\n-\tstruct ring_ctrl\trx_return_ctrl;\n-\taceaddr\tevt_prd_ptr;\n-\taceaddr\trx_ret_prd_ptr;\n-\taceaddr\ttx_csm_ptr;\n-\taceaddr\tstats2_ptr;\n-};\n-\n-\n-struct ring_info {\n-\tstruct sk_buff\t\t*skb;\n-\tDEFINE_DMA_UNMAP_ADDR(mapping);\n-};\n-\n-\n-/*\n- * Funny... As soon as we add maplen on alpha, it starts to work\n- * much slower. Hmm... is it because struct does not fit to one cacheline?\n- * So, split tx_ring_info.\n- */\n-struct tx_ring_info {\n-\tstruct sk_buff\t\t*skb;\n-\tDEFINE_DMA_UNMAP_ADDR(mapping);\n-\tDEFINE_DMA_UNMAP_LEN(maplen);\n-};\n-\n-\n-/*\n- * struct ace_skb holding the rings of skb's. This is an awful lot of\n- * pointers, but I don't see any other smart mode to do this in an\n- * efficient manner ;-(\n- */\n-struct ace_skb\n-{\n-\tstruct tx_ring_info\ttx_skbuff[MAX_TX_RING_ENTRIES];\n-\tstruct ring_info\trx_std_skbuff[RX_STD_RING_ENTRIES];\n-\tstruct ring_info\trx_mini_skbuff[RX_MINI_RING_ENTRIES];\n-\tstruct ring_info\trx_jumbo_skbuff[RX_JUMBO_RING_ENTRIES];\n-};\n-\n-\n-/*\n- * Struct private for the AceNIC.\n- *\n- * Elements are grouped so variables used by the tx handling goes\n- * together, and will go into the same cache lines etc. in order to\n- * avoid cache line contention between the rx and tx handling on SMP.\n- *\n- * Frequently accessed variables are put at the beginning of the\n- * struct to help the compiler generate better/shorter code.\n- */\n-struct ace_private\n-{\n-\tstruct net_device\t*ndev;\t\t/* backpointer */\n-\tstruct ace_info\t\t*info;\n-\tstruct ace_regs\t__iomem\t*regs;\t\t/* register base */\n-\tstruct ace_skb\t\t*skb;\n-\tdma_addr_t\t\tinfo_dma;\t/* 32/64 bit */\n-\n-\tint\t\t\tversion, link;\n-\tint\t\t\tpromisc, mcast_all;\n-\n-\t/*\n-\t * TX elements\n-\t */\n-\tstruct tx_desc\t\t*tx_ring;\n-\tu32\t\t\ttx_prd;\n-\tvolatile u32\t\ttx_ret_csm;\n-\tint\t\t\ttx_ring_entries;\n-\n-\t/*\n-\t * RX elements\n-\t */\n-\tunsigned long\t\tstd_refill_busy\n-\t\t\t\t__attribute__ ((aligned (SMP_CACHE_BYTES)));\n-\tunsigned long\t\tmini_refill_busy, jumbo_refill_busy;\n-\tatomic_t\t\tcur_rx_bufs;\n-\tatomic_t\t\tcur_mini_bufs;\n-\tatomic_t\t\tcur_jumbo_bufs;\n-\tu32\t\t\trx_std_skbprd, rx_mini_skbprd, rx_jumbo_skbprd;\n-\tu32\t\t\tcur_rx;\n-\n-\tstruct rx_desc\t\t*rx_std_ring;\n-\tstruct rx_desc\t\t*rx_jumbo_ring;\n-\tstruct rx_desc\t\t*rx_mini_ring;\n-\tstruct rx_desc\t\t*rx_return_ring;\n-\n-\tint\t\t\tbh_work_pending, jumbo;\n-\tstruct work_struct\tace_bh_work;\n-\n-\tstruct event\t\t*evt_ring;\n-\n-\tvolatile u32\t\t*evt_prd, *rx_ret_prd, *tx_csm;\n-\n-\tdma_addr_t\t\ttx_ring_dma;\t/* 32/64 bit */\n-\tdma_addr_t\t\trx_ring_base_dma;\n-\tdma_addr_t\t\tevt_ring_dma;\n-\tdma_addr_t\t\tevt_prd_dma, rx_ret_prd_dma, tx_csm_dma;\n-\n-\tunsigned char\t\t*trace_buf;\n-\tstruct pci_dev\t\t*pdev;\n-\tstruct net_device\t*next;\n-\tvolatile int\t\tfw_running;\n-\tint\t\t\tboard_idx;\n-\tu16\t\t\tpci_command;\n-\tu8\t\t\tpci_latency;\n-\tconst char\t\t*name;\n-#ifdef INDEX_DEBUG\n-\tspinlock_t\t\tdebug_lock\n-\t\t\t\t__attribute__ ((aligned (SMP_CACHE_BYTES)));\n-\tu32\t\t\tlast_tx, last_std_rx, last_mini_rx;\n-#endif\n-\tu8\t\t\tfirmware_major;\n-\tu8\t\t\tfirmware_minor;\n-\tu8\t\t\tfirmware_fix;\n-\tu32\t\t\tfirmware_start;\n-};\n-\n-\n-#define TX_RESERVED\tMAX_SKB_FRAGS\n-\n-static inline int tx_space (struct ace_private *ap, u32 csm, u32 prd)\n-{\n-\treturn (csm - prd - 1) & (ACE_TX_RING_ENTRIES(ap) - 1);\n-}\n-\n-#define tx_free(ap) \t\ttx_space((ap)->tx_ret_csm, (ap)->tx_prd, ap)\n-#define tx_ring_full(ap, csm, prd)\t(tx_space(ap, csm, prd) <= TX_RESERVED)\n-\n-static inline void set_aceaddr(aceaddr *aa, dma_addr_t addr)\n-{\n-\tu64 baddr = (u64) addr;\n-\taa->addrlo = baddr & 0xffffffff;\n-\taa->addrhi = baddr >> 32;\n-\twmb();\n-}\n-\n-\n-static inline void ace_set_txprd(struct ace_regs __iomem *regs,\n-\t\t\t\t struct ace_private *ap, u32 value)\n-{\n-#ifdef INDEX_DEBUG\n-\tunsigned long flags;\n-\tspin_lock_irqsave(&ap->debug_lock, flags);\n-\twritel(value, ®s->TxPrd);\n-\tif (value == ap->last_tx)\n-\t\tprintk(KERN_ERR \"AceNIC RACE ALERT! writing identical value \"\n-\t\t \"to tx producer (%i)\\n\", value);\n-\tap->last_tx = value;\n-\tspin_unlock_irqrestore(&ap->debug_lock, flags);\n-#else\n-\twritel(value, ®s->TxPrd);\n-#endif\n-\twmb();\n-}\n-\n-\n-static inline void ace_mask_irq(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\n-\tif (ACE_IS_TIGON_I(ap))\n-\t\twritel(1, ®s->MaskInt);\n-\telse\n-\t\twritel(readl(®s->HostCtrl) | MASK_INTS, ®s->HostCtrl);\n-\n-\tace_sync_irq(dev->irq);\n-}\n-\n-\n-static inline void ace_unmask_irq(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\n-\tif (ACE_IS_TIGON_I(ap))\n-\t\twritel(0, ®s->MaskInt);\n-\telse\n-\t\twritel(readl(®s->HostCtrl) & ~MASK_INTS, ®s->HostCtrl);\n-}\n-\n-\n-/*\n- * Prototypes\n- */\n-static int ace_init(struct net_device *dev);\n-static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs);\n-static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs);\n-static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs);\n-static irqreturn_t ace_interrupt(int irq, void *dev_id);\n-static int ace_load_firmware(struct net_device *dev);\n-static int ace_open(struct net_device *dev);\n-static netdev_tx_t ace_start_xmit(struct sk_buff *skb,\n-\t\t\t\t struct net_device *dev);\n-static int ace_close(struct net_device *dev);\n-static void ace_bh_work(struct work_struct *work);\n-static void ace_dump_trace(struct ace_private *ap);\n-static void ace_set_multicast_list(struct net_device *dev);\n-static int ace_change_mtu(struct net_device *dev, int new_mtu);\n-static int ace_set_mac_addr(struct net_device *dev, void *p);\n-static void ace_set_rxtx_parms(struct net_device *dev, int jumbo);\n-static int ace_allocate_descriptors(struct net_device *dev);\n-static void ace_free_descriptors(struct net_device *dev);\n-static void ace_init_cleanup(struct net_device *dev);\n-static struct net_device_stats *ace_get_stats(struct net_device *dev);\n-static int read_eeprom_byte(struct net_device *dev, unsigned long offset);\n-\n-#endif /* _ACENIC_H_ */\ndiff --git a/drivers/net/ethernet/alteon/acenic.c b/drivers/net/ethernet/alteon/acenic.c\ndeleted file mode 100644\nindex 455ee8930824..000000000000\n--- a/drivers/net/ethernet/alteon/acenic.c\n+++ /dev/null\n@@ -1,3178 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0-or-later\n-/*\n- * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card\n- * and other Tigon based cards.\n- *\n- * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.\n- *\n- * Thanks to Alteon and 3Com for providing hardware and documentation\n- * enabling me to write this driver.\n- *\n- * A mailing list for discussing the use of this driver has been\n- * setup, please subscribe to the lists if you have any questions\n- * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to\n- * see how to subscribe.\n- *\n- * Additional credits:\n- * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace\n- * dump support. The trace dump support has not been\n- * integrated yet however.\n- * Troy Benjegerdes: Big Endian (PPC) patches.\n- * Nate Stahl: Better out of memory handling and stats support.\n- * Aman Singla: Nasty race between interrupt handler and tx code dealing\n- * with 'testing the tx_ret_csm and setting tx_full'\n- * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping\n- * infrastructure and Sparc support\n- * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the\n- * driver under Linux/Sparc64\n- * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards\n- * ETHTOOL_GDRVINFO support\n- * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx\n- * handler and close() cleanup.\n- * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether\n- * memory mapped IO is enabled to\n- * make the driver work on RS/6000.\n- * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem\n- * where the driver would disable\n- * bus master mode if it had to disable\n- * write and invalidate.\n- * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little\n- * endian systems.\n- * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and\n- * rx producer index when\n- * flushing the Jumbo ring.\n- * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the\n- * driver init path.\n- * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.\n- */\n-\n-#include <linux/module.h>\n-#include <linux/moduleparam.h>\n-#include <linux/types.h>\n-#include <linux/errno.h>\n-#include <linux/ioport.h>\n-#include <linux/pci.h>\n-#include <linux/dma-mapping.h>\n-#include <linux/kernel.h>\n-#include <linux/netdevice.h>\n-#include <linux/etherdevice.h>\n-#include <linux/skbuff.h>\n-#include <linux/delay.h>\n-#include <linux/mm.h>\n-#include <linux/highmem.h>\n-#include <linux/sockios.h>\n-#include <linux/firmware.h>\n-#include <linux/slab.h>\n-#include <linux/prefetch.h>\n-#include <linux/if_vlan.h>\n-\n-#ifdef SIOCETHTOOL\n-#include <linux/ethtool.h>\n-#endif\n-\n-#include <net/sock.h>\n-#include <net/ip.h>\n-\n-#include <asm/io.h>\n-#include <asm/irq.h>\n-#include <asm/byteorder.h>\n-#include <linux/uaccess.h>\n-\n-\n-#define DRV_NAME \"acenic\"\n-\n-#undef INDEX_DEBUG\n-\n-#ifdef CONFIG_ACENIC_OMIT_TIGON_I\n-#define ACE_IS_TIGON_I(ap)\t0\n-#define ACE_TX_RING_ENTRIES(ap)\tMAX_TX_RING_ENTRIES\n-#else\n-#define ACE_IS_TIGON_I(ap)\t(ap->version == 1)\n-#define ACE_TX_RING_ENTRIES(ap)\tap->tx_ring_entries\n-#endif\n-\n-#ifndef PCI_VENDOR_ID_ALTEON\n-#define PCI_VENDOR_ID_ALTEON\t\t0x12ae\n-#endif\n-#ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE\n-#define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001\n-#define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002\n-#endif\n-#ifndef PCI_DEVICE_ID_3COM_3C985\n-#define PCI_DEVICE_ID_3COM_3C985\t0x0001\n-#endif\n-#ifndef PCI_VENDOR_ID_NETGEAR\n-#define PCI_VENDOR_ID_NETGEAR\t\t0x1385\n-#define PCI_DEVICE_ID_NETGEAR_GA620\t0x620a\n-#endif\n-#ifndef PCI_DEVICE_ID_NETGEAR_GA620T\n-#define PCI_DEVICE_ID_NETGEAR_GA620T\t0x630a\n-#endif\n-\n-\n-/*\n- * Farallon used the DEC vendor ID by mistake and they seem not\n- * to care - stinky!\n- */\n-#ifndef PCI_DEVICE_ID_FARALLON_PN9000SX\n-#define PCI_DEVICE_ID_FARALLON_PN9000SX\t0x1a\n-#endif\n-#ifndef PCI_DEVICE_ID_FARALLON_PN9100T\n-#define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa\n-#endif\n-#ifndef PCI_VENDOR_ID_SGI\n-#define PCI_VENDOR_ID_SGI\t\t0x10a9\n-#endif\n-#ifndef PCI_DEVICE_ID_SGI_ACENIC\n-#define PCI_DEVICE_ID_SGI_ACENIC\t0x0009\n-#endif\n-\n-static const struct pci_device_id acenic_pci_tbl[] = {\n-\t{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t{ PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t{ PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t{ PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t/*\n-\t * Farallon used the DEC vendor ID on their cards incorrectly,\n-\t * then later Alteon's ID.\n-\t */\n-\t{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t{ PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,\n-\t PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },\n-\t{ }\n-};\n-MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);\n-\n-#define ace_sync_irq(irq)\tsynchronize_irq(irq)\n-\n-#ifndef offset_in_page\n-#define offset_in_page(ptr)\t((unsigned long)(ptr) & ~PAGE_MASK)\n-#endif\n-\n-#define ACE_MAX_MOD_PARMS\t8\n-#define BOARD_IDX_STATIC\t0\n-#define BOARD_IDX_OVERFLOW\t-1\n-\n-#include \"acenic.h\"\n-\n-/*\n- * These must be defined before the firmware is included.\n- */\n-#define MAX_TEXT_LEN\t96*1024\n-#define MAX_RODATA_LEN\t8*1024\n-#define MAX_DATA_LEN\t2*1024\n-\n-#ifndef tigon2FwReleaseLocal\n-#define tigon2FwReleaseLocal 0\n-#endif\n-\n-/*\n- * This driver currently supports Tigon I and Tigon II based cards\n- * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear\n- * GA620. The driver should also work on the SGI, DEC and Farallon\n- * versions of the card, however I have not been able to test that\n- * myself.\n- *\n- * This card is really neat, it supports receive hardware checksumming\n- * and jumbo frames (up to 9000 bytes) and does a lot of work in the\n- * firmware. Also the programming interface is quite neat, except for\n- * the parts dealing with the i2c eeprom on the card ;-)\n- *\n- * Using jumbo frames:\n- *\n- * To enable jumbo frames, simply specify an mtu between 1500 and 9000\n- * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time\n- * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet\n- * interface number and <MTU> being the MTU value.\n- *\n- * Module parameters:\n- *\n- * When compiled as a loadable module, the driver allows for a number\n- * of module parameters to be specified. The driver supports the\n- * following module parameters:\n- *\n- * trace=<val> - Firmware trace level. This requires special traced\n- * firmware to replace the firmware supplied with\n- * the driver - for debugging purposes only.\n- *\n- * link=<val> - Link state. Normally you want to use the default link\n- * parameters set by the driver. This can be used to\n- * override these in case your switch doesn't negotiate\n- * the link properly. Valid values are:\n- * 0x0001 - Force half duplex link.\n- * 0x0002 - Do not negotiate line speed with the other end.\n- * 0x0010 - 10Mbit/sec link.\n- * 0x0020 - 100Mbit/sec link.\n- * 0x0040 - 1000Mbit/sec link.\n- * 0x0100 - Do not negotiate flow control.\n- * 0x0200 - Enable RX flow control Y\n- * 0x0400 - Enable TX flow control Y (Tigon II NICs only).\n- * Default value is 0x0270, ie. enable link+flow\n- * control negotiation. Negotiating the highest\n- * possible link speed with RX flow control enabled.\n- *\n- * When disabling link speed negotiation, only one link\n- * speed is allowed to be specified!\n- *\n- * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed\n- * to wait for more packets to arive before\n- * interrupting the host, from the time the first\n- * packet arrives.\n- *\n- * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed\n- * to wait for more packets to arive in the transmit ring,\n- * before interrupting the host, after transmitting the\n- * first packet in the ring.\n- *\n- * max_tx_desc=<val> - maximum number of transmit descriptors\n- * (packets) transmitted before interrupting the host.\n- *\n- * max_rx_desc=<val> - maximum number of receive descriptors\n- * (packets) received before interrupting the host.\n- *\n- * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th\n- * increments of the NIC's on board memory to be used for\n- * transmit and receive buffers. For the 1MB NIC app. 800KB\n- * is available, on the 1/2MB NIC app. 300KB is available.\n- * 68KB will always be available as a minimum for both\n- * directions. The default value is a 50/50 split.\n- * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate\n- * operations, default (1) is to always disable this as\n- * that is what Alteon does on NT. I have not been able\n- * to measure any real performance differences with\n- * this on my systems. Set <val>=0 if you want to\n- * enable these operations.\n- *\n- * If you use more than one NIC, specify the parameters for the\n- * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to\n- * run tracing on NIC #2 but not on NIC #1 and #3.\n- *\n- * TODO:\n- *\n- * - Proper multicast support.\n- * - NIC dump support.\n- * - More tuning parameters.\n- *\n- * The mini ring is not used under Linux and I am not sure it makes sense\n- * to actually use it.\n- *\n- * New interrupt handler strategy:\n- *\n- * The old interrupt handler worked using the traditional method of\n- * replacing an skbuff with a new one when a packet arrives. However\n- * the rx rings do not need to contain a static number of buffer\n- * descriptors, thus it makes sense to move the memory allocation out\n- * of the main interrupt handler and do it in a bottom half handler\n- * and only allocate new buffers when the number of buffers in the\n- * ring is below a certain threshold. In order to avoid starving the\n- * NIC under heavy load it is however necessary to force allocation\n- * when hitting a minimum threshold. The strategy for alloction is as\n- * follows:\n- *\n- * RX_LOW_BUF_THRES - allocate buffers in the bottom half\n- * RX_PANIC_LOW_THRES - we are very low on buffers, allocate\n- * the buffers in the interrupt handler\n- * RX_RING_THRES - maximum number of buffers in the rx ring\n- * RX_MINI_THRES - maximum number of buffers in the mini ring\n- * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring\n- *\n- * One advantagous side effect of this allocation approach is that the\n- * entire rx processing can be done without holding any spin lock\n- * since the rx rings and registers are totally independent of the tx\n- * ring and its registers. This of course includes the kmalloc's of\n- * new skb's. Thus start_xmit can run in parallel with rx processing\n- * and the memory allocation on SMP systems.\n- *\n- * Note that running the skb reallocation in a bottom half opens up\n- * another can of races which needs to be handled properly. In\n- * particular it can happen that the interrupt handler tries to run\n- * the reallocation while the bottom half is either running on another\n- * CPU or was interrupted on the same CPU. To get around this the\n- * driver uses bitops to prevent the reallocation routines from being\n- * reentered.\n- *\n- * TX handling can also be done without holding any spin lock, wheee\n- * this is fun! since tx_ret_csm is only written to by the interrupt\n- * handler. The case to be aware of is when shutting down the device\n- * and cleaning up where it is necessary to make sure that\n- * start_xmit() is not running while this is happening. Well DaveM\n- * informs me that this case is already protected against ... bye bye\n- * Mr. Spin Lock, it was nice to know you.\n- *\n- * TX interrupts are now partly disabled so the NIC will only generate\n- * TX interrupts for the number of coal ticks, not for the number of\n- * TX packets in the queue. This should reduce the number of TX only,\n- * ie. when no RX processing is done, interrupts seen.\n- */\n-\n-/*\n- * Threshold values for RX buffer allocation - the low water marks for\n- * when to start refilling the rings are set to 75% of the ring\n- * sizes. It seems to make sense to refill the rings entirely from the\n- * intrrupt handler once it gets below the panic threshold, that way\n- * we don't risk that the refilling is moved to another CPU when the\n- * one running the interrupt handler just got the slab code hot in its\n- * cache.\n- */\n-#define RX_RING_SIZE\t\t72\n-#define RX_MINI_SIZE\t\t64\n-#define RX_JUMBO_SIZE\t\t48\n-\n-#define RX_PANIC_STD_THRES\t16\n-#define RX_PANIC_STD_REFILL\t(3*RX_PANIC_STD_THRES)/2\n-#define RX_LOW_STD_THRES\t(3*RX_RING_SIZE)/4\n-#define RX_PANIC_MINI_THRES\t12\n-#define RX_PANIC_MINI_REFILL\t(3*RX_PANIC_MINI_THRES)/2\n-#define RX_LOW_MINI_THRES\t(3*RX_MINI_SIZE)/4\n-#define RX_PANIC_JUMBO_THRES\t6\n-#define RX_PANIC_JUMBO_REFILL\t(3*RX_PANIC_JUMBO_THRES)/2\n-#define RX_LOW_JUMBO_THRES\t(3*RX_JUMBO_SIZE)/4\n-\n-\n-/*\n- * Size of the mini ring entries, basically these just should be big\n- * enough to take TCP ACKs\n- */\n-#define ACE_MINI_SIZE\t\t100\n-\n-#define ACE_MINI_BUFSIZE\tACE_MINI_SIZE\n-#define ACE_STD_BUFSIZE\t\t(ACE_STD_MTU + ETH_HLEN + 4)\n-#define ACE_JUMBO_BUFSIZE\t(ACE_JUMBO_MTU + ETH_HLEN + 4)\n-\n-/*\n- * There seems to be a magic difference in the effect between 995 and 996\n- * but little difference between 900 and 995 ... no idea why.\n- *\n- * There is now a default set of tuning parameters which is set, depending\n- * on whether or not the user enables Jumbo frames. It's assumed that if\n- * Jumbo frames are enabled, the user wants optimal tuning for that case.\n- */\n-#define DEF_TX_COAL\t\t400 /* 996 */\n-#define DEF_TX_MAX_DESC\t\t60 /* was 40 */\n-#define DEF_RX_COAL\t\t120 /* 1000 */\n-#define DEF_RX_MAX_DESC\t\t25\n-#define DEF_TX_RATIO\t\t21 /* 24 */\n-\n-#define DEF_JUMBO_TX_COAL\t20\n-#define DEF_JUMBO_TX_MAX_DESC\t60\n-#define DEF_JUMBO_RX_COAL\t30\n-#define DEF_JUMBO_RX_MAX_DESC\t6\n-#define DEF_JUMBO_TX_RATIO\t21\n-\n-#if tigon2FwReleaseLocal < 20001118\n-/*\n- * Standard firmware and early modifications duplicate\n- * IRQ load without this flag (coal timer is never reset).\n- * Note that with this flag tx_coal should be less than\n- * time to xmit full tx ring.\n- * 400usec is not so bad for tx ring size of 128.\n- */\n-#define TX_COAL_INTS_ONLY\t1\t/* worth it */\n-#else\n-/*\n- * With modified firmware, this is not necessary, but still useful.\n- */\n-#define TX_COAL_INTS_ONLY\t1\n-#endif\n-\n-#define DEF_TRACE\t\t0\n-#define DEF_STAT\t\t(2 * TICKS_PER_SEC)\n-\n-\n-static int link_state[ACE_MAX_MOD_PARMS];\n-static int trace[ACE_MAX_MOD_PARMS];\n-static int tx_coal_tick[ACE_MAX_MOD_PARMS];\n-static int rx_coal_tick[ACE_MAX_MOD_PARMS];\n-static int max_tx_desc[ACE_MAX_MOD_PARMS];\n-static int max_rx_desc[ACE_MAX_MOD_PARMS];\n-static int tx_ratio[ACE_MAX_MOD_PARMS];\n-static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};\n-\n-MODULE_AUTHOR(\"Jes Sorensen <jes@trained-monkey.org>\");\n-MODULE_LICENSE(\"GPL\");\n-MODULE_DESCRIPTION(\"AceNIC/3C985/GA620 Gigabit Ethernet driver\");\n-#ifndef CONFIG_ACENIC_OMIT_TIGON_I\n-MODULE_FIRMWARE(\"acenic/tg1.bin\");\n-#endif\n-MODULE_FIRMWARE(\"acenic/tg2.bin\");\n-\n-module_param_array_named(link, link_state, int, NULL, 0);\n-module_param_array(trace, int, NULL, 0);\n-module_param_array(tx_coal_tick, int, NULL, 0);\n-module_param_array(max_tx_desc, int, NULL, 0);\n-module_param_array(rx_coal_tick, int, NULL, 0);\n-module_param_array(max_rx_desc, int, NULL, 0);\n-module_param_array(tx_ratio, int, NULL, 0);\n-MODULE_PARM_DESC(link, \"AceNIC/3C985/NetGear link state\");\n-MODULE_PARM_DESC(trace, \"AceNIC/3C985/NetGear firmware trace level\");\n-MODULE_PARM_DESC(tx_coal_tick, \"AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives\");\n-MODULE_PARM_DESC(max_tx_desc, \"AceNIC/3C985/GA620 max number of transmit descriptors to wait\");\n-MODULE_PARM_DESC(rx_coal_tick, \"AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives\");\n-MODULE_PARM_DESC(max_rx_desc, \"AceNIC/3C985/GA620 max number of receive descriptors to wait\");\n-MODULE_PARM_DESC(tx_ratio, \"AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)\");\n-\n-\n-static const char version[] =\n- \"acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\\n\"\n- \" http://home.cern.ch/~jes/gige/acenic.html\\n\";\n-\n-static int ace_get_link_ksettings(struct net_device *,\n-\t\t\t\t struct ethtool_link_ksettings *);\n-static int ace_set_link_ksettings(struct net_device *,\n-\t\t\t\t const struct ethtool_link_ksettings *);\n-static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);\n-\n-static const struct ethtool_ops ace_ethtool_ops = {\n-\t.get_drvinfo = ace_get_drvinfo,\n-\t.get_link_ksettings = ace_get_link_ksettings,\n-\t.set_link_ksettings = ace_set_link_ksettings,\n-};\n-\n-static void ace_watchdog(struct net_device *dev, unsigned int txqueue);\n-\n-static const struct net_device_ops ace_netdev_ops = {\n-\t.ndo_open\t\t= ace_open,\n-\t.ndo_stop\t\t= ace_close,\n-\t.ndo_tx_timeout\t\t= ace_watchdog,\n-\t.ndo_get_stats\t\t= ace_get_stats,\n-\t.ndo_start_xmit\t\t= ace_start_xmit,\n-\t.ndo_set_rx_mode\t= ace_set_multicast_list,\n-\t.ndo_validate_addr\t= eth_validate_addr,\n-\t.ndo_set_mac_address\t= ace_set_mac_addr,\n-\t.ndo_change_mtu\t\t= ace_change_mtu,\n-};\n-\n-static int acenic_probe_one(struct pci_dev *pdev,\n-\t\t\t const struct pci_device_id *id)\n-{\n-\tstruct net_device *dev;\n-\tstruct ace_private *ap;\n-\tstatic int boards_found;\n-\n-\tdev = alloc_etherdev(sizeof(struct ace_private));\n-\tif (dev == NULL)\n-\t\treturn -ENOMEM;\n-\n-\tSET_NETDEV_DEV(dev, &pdev->dev);\n-\n-\tap = netdev_priv(dev);\n-\tap->ndev = dev;\n-\tap->pdev = pdev;\n-\tap->name = pci_name(pdev);\n-\n-\tdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;\n-\tdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;\n-\n-\tdev->watchdog_timeo = 5*HZ;\n-\tdev->min_mtu = 0;\n-\tdev->max_mtu = ACE_JUMBO_MTU;\n-\n-\tdev->netdev_ops = &ace_netdev_ops;\n-\tdev->ethtool_ops = &ace_ethtool_ops;\n-\n-\t/* we only display this string ONCE */\n-\tif (!boards_found)\n-\t\tprintk(version);\n-\n-\tif (pci_enable_device(pdev))\n-\t\tgoto fail_free_netdev;\n-\n-\t/*\n-\t * Enable master mode before we start playing with the\n-\t * pci_command word since pci_set_master() will modify\n-\t * it.\n-\t */\n-\tpci_set_master(pdev);\n-\n-\tpci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);\n-\n-\t/* OpenFirmware on Mac's does not set this - DOH.. */\n-\tif (!(ap->pci_command & PCI_COMMAND_MEMORY)) {\n-\t\tprintk(KERN_INFO \"%s: Enabling PCI Memory Mapped \"\n-\t\t \"access - was not enabled by BIOS/Firmware\\n\",\n-\t\t ap->name);\n-\t\tap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;\n-\t\tpci_write_config_word(ap->pdev, PCI_COMMAND,\n-\t\t\t\t ap->pci_command);\n-\t\twmb();\n-\t}\n-\n-\tpci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);\n-\tif (ap->pci_latency <= 0x40) {\n-\t\tap->pci_latency = 0x40;\n-\t\tpci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);\n-\t}\n-\n-\t/*\n-\t * Remap the regs into kernel space - this is abuse of\n-\t * dev->base_addr since it was means for I/O port\n-\t * addresses but who gives a damn.\n-\t */\n-\tdev->base_addr = pci_resource_start(pdev, 0);\n-\tap->regs = ioremap(dev->base_addr, 0x4000);\n-\tif (!ap->regs) {\n-\t\tprintk(KERN_ERR \"%s: Unable to map I/O register, \"\n-\t\t \"AceNIC %i will be disabled.\\n\",\n-\t\t ap->name, boards_found);\n-\t\tgoto fail_free_netdev;\n-\t}\n-\n-\tswitch(pdev->vendor) {\n-\tcase PCI_VENDOR_ID_ALTEON:\n-\t\tif (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {\n-\t\t\tprintk(KERN_INFO \"%s: Farallon PN9100-T \",\n-\t\t\t ap->name);\n-\t\t} else {\n-\t\t\tprintk(KERN_INFO \"%s: Alteon AceNIC \",\n-\t\t\t ap->name);\n-\t\t}\n-\t\tbreak;\n-\tcase PCI_VENDOR_ID_3COM:\n-\t\tprintk(KERN_INFO \"%s: 3Com 3C985 \", ap->name);\n-\t\tbreak;\n-\tcase PCI_VENDOR_ID_NETGEAR:\n-\t\tprintk(KERN_INFO \"%s: NetGear GA620 \", ap->name);\n-\t\tbreak;\n-\tcase PCI_VENDOR_ID_DEC:\n-\t\tif (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {\n-\t\t\tprintk(KERN_INFO \"%s: Farallon PN9000-SX \",\n-\t\t\t ap->name);\n-\t\t\tbreak;\n-\t\t}\n-\t\tfallthrough;\n-\tcase PCI_VENDOR_ID_SGI:\n-\t\tprintk(KERN_INFO \"%s: SGI AceNIC \", ap->name);\n-\t\tbreak;\n-\tdefault:\n-\t\tprintk(KERN_INFO \"%s: Unknown AceNIC \", ap->name);\n-\t\tbreak;\n-\t}\n-\n-\tprintk(\"Gigabit Ethernet at 0x%08lx, \", dev->base_addr);\n-\tprintk(\"irq %d\\n\", pdev->irq);\n-\n-#ifdef CONFIG_ACENIC_OMIT_TIGON_I\n-\tif ((readl(&ap->regs->HostCtrl) >> 28) == 4) {\n-\t\tprintk(KERN_ERR \"%s: Driver compiled without Tigon I\"\n-\t\t \" support - NIC disabled\\n\", dev->name);\n-\t\tgoto fail_uninit;\n-\t}\n-#endif\n-\n-\tif (ace_allocate_descriptors(dev))\n-\t\tgoto fail_free_netdev;\n-\n-#ifdef MODULE\n-\tif (boards_found >= ACE_MAX_MOD_PARMS)\n-\t\tap->board_idx = BOARD_IDX_OVERFLOW;\n-\telse\n-\t\tap->board_idx = boards_found;\n-#else\n-\tap->board_idx = BOARD_IDX_STATIC;\n-#endif\n-\n-\tif (ace_init(dev))\n-\t\tgoto fail_free_netdev;\n-\n-\tif (register_netdev(dev)) {\n-\t\tprintk(KERN_ERR \"acenic: device registration failed\\n\");\n-\t\tgoto fail_uninit;\n-\t}\n-\tap->name = dev->name;\n-\n-\tdev->features |= NETIF_F_HIGHDMA;\n-\n-\tpci_set_drvdata(pdev, dev);\n-\n-\tboards_found++;\n-\treturn 0;\n-\n- fail_uninit:\n-\tace_init_cleanup(dev);\n- fail_free_netdev:\n-\tfree_netdev(dev);\n-\treturn -ENODEV;\n-}\n-\n-static void acenic_remove_one(struct pci_dev *pdev)\n-{\n-\tstruct net_device *dev = pci_get_drvdata(pdev);\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tshort i;\n-\n-\tunregister_netdev(dev);\n-\n-\twritel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);\n-\tif (ap->version >= 2)\n-\t\twritel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);\n-\n-\t/*\n-\t * This clears any pending interrupts\n-\t */\n-\twritel(1, ®s->Mb0Lo);\n-\treadl(®s->CpuCtrl);\t/* flush */\n-\n-\t/*\n-\t * Make sure no other CPUs are processing interrupts\n-\t * on the card before the buffers are being released.\n-\t * Otherwise one might experience some `interesting'\n-\t * effects.\n-\t *\n-\t * Then release the RX buffers - jumbo buffers were\n-\t * already released in ace_close().\n-\t */\n-\tace_sync_irq(dev->irq);\n-\n-\tfor (i = 0; i < RX_STD_RING_ENTRIES; i++) {\n-\t\tstruct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;\n-\n-\t\tif (skb) {\n-\t\t\tstruct ring_info *ringp;\n-\t\t\tdma_addr_t mapping;\n-\n-\t\t\tringp = &ap->skb->rx_std_skbuff[i];\n-\t\t\tmapping = dma_unmap_addr(ringp, mapping);\n-\t\t\tdma_unmap_page(&ap->pdev->dev, mapping,\n-\t\t\t\t ACE_STD_BUFSIZE, DMA_FROM_DEVICE);\n-\n-\t\t\tap->rx_std_ring[i].size = 0;\n-\t\t\tap->skb->rx_std_skbuff[i].skb = NULL;\n-\t\t\tdev_kfree_skb(skb);\n-\t\t}\n-\t}\n-\n-\tif (ap->version >= 2) {\n-\t\tfor (i = 0; i < RX_MINI_RING_ENTRIES; i++) {\n-\t\t\tstruct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;\n-\n-\t\t\tif (skb) {\n-\t\t\t\tstruct ring_info *ringp;\n-\t\t\t\tdma_addr_t mapping;\n-\n-\t\t\t\tringp = &ap->skb->rx_mini_skbuff[i];\n-\t\t\t\tmapping = dma_unmap_addr(ringp,mapping);\n-\t\t\t\tdma_unmap_page(&ap->pdev->dev, mapping,\n-\t\t\t\t\t ACE_MINI_BUFSIZE,\n-\t\t\t\t\t DMA_FROM_DEVICE);\n-\n-\t\t\t\tap->rx_mini_ring[i].size = 0;\n-\t\t\t\tap->skb->rx_mini_skbuff[i].skb = NULL;\n-\t\t\t\tdev_kfree_skb(skb);\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-\tfor (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {\n-\t\tstruct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;\n-\t\tif (skb) {\n-\t\t\tstruct ring_info *ringp;\n-\t\t\tdma_addr_t mapping;\n-\n-\t\t\tringp = &ap->skb->rx_jumbo_skbuff[i];\n-\t\t\tmapping = dma_unmap_addr(ringp, mapping);\n-\t\t\tdma_unmap_page(&ap->pdev->dev, mapping,\n-\t\t\t\t ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);\n-\n-\t\t\tap->rx_jumbo_ring[i].size = 0;\n-\t\t\tap->skb->rx_jumbo_skbuff[i].skb = NULL;\n-\t\t\tdev_kfree_skb(skb);\n-\t\t}\n-\t}\n-\n-\tace_init_cleanup(dev);\n-\tfree_netdev(dev);\n-}\n-\n-static struct pci_driver acenic_pci_driver = {\n-\t.name\t\t= \"acenic\",\n-\t.id_table\t= acenic_pci_tbl,\n-\t.probe\t\t= acenic_probe_one,\n-\t.remove\t\t= acenic_remove_one,\n-};\n-\n-static void ace_free_descriptors(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tint size;\n-\n-\tif (ap->rx_std_ring != NULL) {\n-\t\tsize = (sizeof(struct rx_desc) *\n-\t\t\t(RX_STD_RING_ENTRIES +\n-\t\t\t RX_JUMBO_RING_ENTRIES +\n-\t\t\t RX_MINI_RING_ENTRIES +\n-\t\t\t RX_RETURN_RING_ENTRIES));\n-\t\tdma_free_coherent(&ap->pdev->dev, size, ap->rx_std_ring,\n-\t\t\t\t ap->rx_ring_base_dma);\n-\t\tap->rx_std_ring = NULL;\n-\t\tap->rx_jumbo_ring = NULL;\n-\t\tap->rx_mini_ring = NULL;\n-\t\tap->rx_return_ring = NULL;\n-\t}\n-\tif (ap->evt_ring != NULL) {\n-\t\tsize = (sizeof(struct event) * EVT_RING_ENTRIES);\n-\t\tdma_free_coherent(&ap->pdev->dev, size, ap->evt_ring,\n-\t\t\t\t ap->evt_ring_dma);\n-\t\tap->evt_ring = NULL;\n-\t}\n-\tif (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {\n-\t\tsize = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);\n-\t\tdma_free_coherent(&ap->pdev->dev, size, ap->tx_ring,\n-\t\t\t\t ap->tx_ring_dma);\n-\t}\n-\tap->tx_ring = NULL;\n-\n-\tif (ap->evt_prd != NULL) {\n-\t\tdma_free_coherent(&ap->pdev->dev, sizeof(u32),\n-\t\t\t\t (void *)ap->evt_prd, ap->evt_prd_dma);\n-\t\tap->evt_prd = NULL;\n-\t}\n-\tif (ap->rx_ret_prd != NULL) {\n-\t\tdma_free_coherent(&ap->pdev->dev, sizeof(u32),\n-\t\t\t\t (void *)ap->rx_ret_prd, ap->rx_ret_prd_dma);\n-\t\tap->rx_ret_prd = NULL;\n-\t}\n-\tif (ap->tx_csm != NULL) {\n-\t\tdma_free_coherent(&ap->pdev->dev, sizeof(u32),\n-\t\t\t\t (void *)ap->tx_csm, ap->tx_csm_dma);\n-\t\tap->tx_csm = NULL;\n-\t}\n-}\n-\n-\n-static int ace_allocate_descriptors(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tint size;\n-\n-\tsize = (sizeof(struct rx_desc) *\n-\t\t(RX_STD_RING_ENTRIES +\n-\t\t RX_JUMBO_RING_ENTRIES +\n-\t\t RX_MINI_RING_ENTRIES +\n-\t\t RX_RETURN_RING_ENTRIES));\n-\n-\tap->rx_std_ring = dma_alloc_coherent(&ap->pdev->dev, size,\n-\t\t\t\t\t &ap->rx_ring_base_dma, GFP_KERNEL);\n-\tif (ap->rx_std_ring == NULL)\n-\t\tgoto fail;\n-\n-\tap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;\n-\tap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;\n-\tap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;\n-\n-\tsize = (sizeof(struct event) * EVT_RING_ENTRIES);\n-\n-\tap->evt_ring = dma_alloc_coherent(&ap->pdev->dev, size,\n-\t\t\t\t\t &ap->evt_ring_dma, GFP_KERNEL);\n-\n-\tif (ap->evt_ring == NULL)\n-\t\tgoto fail;\n-\n-\t/*\n-\t * Only allocate a host TX ring for the Tigon II, the Tigon I\n-\t * has to use PCI registers for this ;-(\n-\t */\n-\tif (!ACE_IS_TIGON_I(ap)) {\n-\t\tsize = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);\n-\n-\t\tap->tx_ring = dma_alloc_coherent(&ap->pdev->dev, size,\n-\t\t\t\t\t\t &ap->tx_ring_dma, GFP_KERNEL);\n-\n-\t\tif (ap->tx_ring == NULL)\n-\t\t\tgoto fail;\n-\t}\n-\n-\tap->evt_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),\n-\t\t\t\t\t &ap->evt_prd_dma, GFP_KERNEL);\n-\tif (ap->evt_prd == NULL)\n-\t\tgoto fail;\n-\n-\tap->rx_ret_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),\n-\t\t\t\t\t &ap->rx_ret_prd_dma, GFP_KERNEL);\n-\tif (ap->rx_ret_prd == NULL)\n-\t\tgoto fail;\n-\n-\tap->tx_csm = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),\n-\t\t\t\t\t&ap->tx_csm_dma, GFP_KERNEL);\n-\tif (ap->tx_csm == NULL)\n-\t\tgoto fail;\n-\n-\treturn 0;\n-\n-fail:\n-\t/* Clean up. */\n-\tace_init_cleanup(dev);\n-\treturn 1;\n-}\n-\n-\n-/*\n- * Generic cleanup handling data allocated during init. Used when the\n- * module is unloaded or if an error occurs during initialization\n- */\n-static void ace_init_cleanup(struct net_device *dev)\n-{\n-\tstruct ace_private *ap;\n-\n-\tap = netdev_priv(dev);\n-\n-\tace_free_descriptors(dev);\n-\n-\tif (ap->info)\n-\t\tdma_free_coherent(&ap->pdev->dev, sizeof(struct ace_info),\n-\t\t\t\t ap->info, ap->info_dma);\n-\tkfree(ap->skb);\n-\tkfree(ap->trace_buf);\n-\n-\tif (dev->irq)\n-\t\tfree_irq(dev->irq, dev);\n-\n-\tiounmap(ap->regs);\n-}\n-\n-\n-/*\n- * Commands are considered to be slow.\n- */\n-static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)\n-{\n-\tu32 idx;\n-\n-\tidx = readl(®s->CmdPrd);\n-\n-\twritel(*(u32 *)(cmd), ®s->CmdRng[idx]);\n-\tidx = (idx + 1) % CMD_RING_ENTRIES;\n-\n-\twritel(idx, ®s->CmdPrd);\n-}\n-\n-\n-static int ace_init(struct net_device *dev)\n-{\n-\tstruct ace_private *ap;\n-\tstruct ace_regs __iomem *regs;\n-\tstruct ace_info *info = NULL;\n-\tstruct pci_dev *pdev;\n-\tunsigned long myjif;\n-\tu64 tmp_ptr;\n-\tu32 tig_ver, mac1, mac2, tmp, pci_state;\n-\tint board_idx, ecode = 0;\n-\tshort i;\n-\tunsigned char cache_size;\n-\tu8 addr[ETH_ALEN];\n-\n-\tap = netdev_priv(dev);\n-\tregs = ap->regs;\n-\n-\tboard_idx = ap->board_idx;\n-\n-\t/*\n-\t * aman@sgi.com - its useful to do a NIC reset here to\n-\t * address the `Firmware not running' problem subsequent\n-\t * to any crashes involving the NIC\n-\t */\n-\twritel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);\n-\treadl(®s->HostCtrl);\t\t/* PCI write posting */\n-\tudelay(5);\n-\n-\t/*\n-\t * Don't access any other registers before this point!\n-\t */\n-#ifdef __BIG_ENDIAN\n-\t/*\n-\t * This will most likely need BYTE_SWAP once we switch\n-\t * to using __raw_writel()\n-\t */\n-\twritel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),\n-\t ®s->HostCtrl);\n-#else\n-\twritel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),\n-\t ®s->HostCtrl);\n-#endif\n-\treadl(®s->HostCtrl);\t\t/* PCI write posting */\n-\n-\t/*\n-\t * Stop the NIC CPU and clear pending interrupts\n-\t */\n-\twritel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);\n-\treadl(®s->CpuCtrl);\t\t/* PCI write posting */\n-\twritel(0, ®s->Mb0Lo);\n-\n-\ttig_ver = readl(®s->HostCtrl) >> 28;\n-\n-\tswitch(tig_ver){\n-#ifndef CONFIG_ACENIC_OMIT_TIGON_I\n-\tcase 4:\n-\tcase 5:\n-\t\tprintk(KERN_INFO \" Tigon I (Rev. %i), Firmware: %i.%i.%i, \",\n-\t\t tig_ver, ap->firmware_major, ap->firmware_minor,\n-\t\t ap->firmware_fix);\n-\t\twritel(0, ®s->LocalCtrl);\n-\t\tap->version = 1;\n-\t\tap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;\n-\t\tbreak;\n-#endif\n-\tcase 6:\n-\t\tprintk(KERN_INFO \" Tigon II (Rev. %i), Firmware: %i.%i.%i, \",\n-\t\t tig_ver, ap->firmware_major, ap->firmware_minor,\n-\t\t ap->firmware_fix);\n-\t\twritel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);\n-\t\treadl(®s->CpuBCtrl);\t\t/* PCI write posting */\n-\t\t/*\n-\t\t * The SRAM bank size does _not_ indicate the amount\n-\t\t * of memory on the card, it controls the _bank_ size!\n-\t\t * Ie. a 1MB AceNIC will have two banks of 512KB.\n-\t\t */\n-\t\twritel(SRAM_BANK_512K, ®s->LocalCtrl);\n-\t\twritel(SYNC_SRAM_TIMING, ®s->MiscCfg);\n-\t\tap->version = 2;\n-\t\tap->tx_ring_entries = MAX_TX_RING_ENTRIES;\n-\t\tbreak;\n-\tdefault:\n-\t\tprintk(KERN_WARNING \" Unsupported Tigon version detected \"\n-\t\t \"(%i)\\n\", tig_ver);\n-\t\tecode = -ENODEV;\n-\t\tgoto init_error;\n-\t}\n-\n-\t/*\n-\t * ModeStat _must_ be set after the SRAM settings as this change\n-\t * seems to corrupt the ModeStat and possible other registers.\n-\t * The SRAM settings survive resets and setting it to the same\n-\t * value a second time works as well. This is what caused the\n-\t * `Firmware not running' problem on the Tigon II.\n-\t */\n-#ifdef __BIG_ENDIAN\n-\twritel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |\n-\t ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);\n-#else\n-\twritel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |\n-\t ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);\n-#endif\n-\treadl(®s->ModeStat);\t\t/* PCI write posting */\n-\n-\tmac1 = 0;\n-\tfor(i = 0; i < 4; i++) {\n-\t\tint t;\n-\n-\t\tmac1 = mac1 << 8;\n-\t\tt = read_eeprom_byte(dev, 0x8c+i);\n-\t\tif (t < 0) {\n-\t\t\tecode = -EIO;\n-\t\t\tgoto init_error;\n-\t\t} else\n-\t\t\tmac1 |= (t & 0xff);\n-\t}\n-\tmac2 = 0;\n-\tfor(i = 4; i < 8; i++) {\n-\t\tint t;\n-\n-\t\tmac2 = mac2 << 8;\n-\t\tt = read_eeprom_byte(dev, 0x8c+i);\n-\t\tif (t < 0) {\n-\t\t\tecode = -EIO;\n-\t\t\tgoto init_error;\n-\t\t} else\n-\t\t\tmac2 |= (t & 0xff);\n-\t}\n-\n-\twritel(mac1, ®s->MacAddrHi);\n-\twritel(mac2, ®s->MacAddrLo);\n-\n-\taddr[0] = (mac1 >> 8) & 0xff;\n-\taddr[1] = mac1 & 0xff;\n-\taddr[2] = (mac2 >> 24) & 0xff;\n-\taddr[3] = (mac2 >> 16) & 0xff;\n-\taddr[4] = (mac2 >> 8) & 0xff;\n-\taddr[5] = mac2 & 0xff;\n-\teth_hw_addr_set(dev, addr);\n-\n-\tprintk(\"MAC: %pM\\n\", dev->dev_addr);\n-\n-\t/*\n-\t * Looks like this is necessary to deal with on all architectures,\n-\t * even this %$#%$# N440BX Intel based thing doesn't get it right.\n-\t * Ie. having two NICs in the machine, one will have the cache\n-\t * line set at boot time, the other will not.\n-\t */\n-\tpdev = ap->pdev;\n-\tpci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);\n-\tcache_size <<= 2;\n-\tif (cache_size != SMP_CACHE_BYTES) {\n-\t\tprintk(KERN_INFO \" PCI cache line size set incorrectly \"\n-\t\t \"(%i bytes) by BIOS/FW, \", cache_size);\n-\t\tif (cache_size > SMP_CACHE_BYTES)\n-\t\t\tprintk(\"expecting %i\\n\", SMP_CACHE_BYTES);\n-\t\telse {\n-\t\t\tprintk(\"correcting to %i\\n\", SMP_CACHE_BYTES);\n-\t\t\tpci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,\n-\t\t\t\t\t SMP_CACHE_BYTES >> 2);\n-\t\t}\n-\t}\n-\n-\tpci_state = readl(®s->PciState);\n-\tprintk(KERN_INFO \" PCI bus width: %i bits, speed: %iMHz, \"\n-\t \"latency: %i clks\\n\",\n-\t \t(pci_state & PCI_32BIT) ? 32 : 64,\n-\t\t(pci_state & PCI_66MHZ) ? 66 : 33,\n-\t\tap->pci_latency);\n-\n-\t/*\n-\t * Set the max DMA transfer size. Seems that for most systems\n-\t * the performance is better when no MAX parameter is\n-\t * set. However for systems enabling PCI write and invalidate,\n-\t * DMA writes must be set to the L1 cache line size to get\n-\t * optimal performance.\n-\t *\n-\t * The default is now to turn the PCI write and invalidate off\n-\t * - that is what Alteon does for NT.\n-\t */\n-\ttmp = READ_CMD_MEM | WRITE_CMD_MEM;\n-\tif (ap->version >= 2) {\n-\t\ttmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));\n-\t\t/*\n-\t\t * Tuning parameters only supported for 8 cards\n-\t\t */\n-\t\tif (board_idx == BOARD_IDX_OVERFLOW ||\n-\t\t dis_pci_mem_inval[board_idx]) {\n-\t\t\tif (ap->pci_command & PCI_COMMAND_INVALIDATE) {\n-\t\t\t\tap->pci_command &= ~PCI_COMMAND_INVALIDATE;\n-\t\t\t\tpci_write_config_word(pdev, PCI_COMMAND,\n-\t\t\t\t\t\t ap->pci_command);\n-\t\t\t\tprintk(KERN_INFO \" Disabling PCI memory \"\n-\t\t\t\t \"write and invalidate\\n\");\n-\t\t\t}\n-\t\t} else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {\n-\t\t\tprintk(KERN_INFO \" PCI memory write & invalidate \"\n-\t\t\t \"enabled by BIOS, enabling counter measures\\n\");\n-\n-\t\t\tswitch(SMP_CACHE_BYTES) {\n-\t\t\tcase 16:\n-\t\t\t\ttmp |= DMA_WRITE_MAX_16;\n-\t\t\t\tbreak;\n-\t\t\tcase 32:\n-\t\t\t\ttmp |= DMA_WRITE_MAX_32;\n-\t\t\t\tbreak;\n-\t\t\tcase 64:\n-\t\t\t\ttmp |= DMA_WRITE_MAX_64;\n-\t\t\t\tbreak;\n-\t\t\tcase 128:\n-\t\t\t\ttmp |= DMA_WRITE_MAX_128;\n-\t\t\t\tbreak;\n-\t\t\tdefault:\n-\t\t\t\tprintk(KERN_INFO \" Cache line size %i not \"\n-\t\t\t\t \"supported, PCI write and invalidate \"\n-\t\t\t\t \"disabled\\n\", SMP_CACHE_BYTES);\n-\t\t\t\tap->pci_command &= ~PCI_COMMAND_INVALIDATE;\n-\t\t\t\tpci_write_config_word(pdev, PCI_COMMAND,\n-\t\t\t\t\t\t ap->pci_command);\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-#ifdef __sparc__\n-\t/*\n-\t * On this platform, we know what the best dma settings\n-\t * are. We use 64-byte maximum bursts, because if we\n-\t * burst larger than the cache line size (or even cross\n-\t * a 64byte boundary in a single burst) the UltraSparc\n-\t * PCI controller will disconnect at 64-byte multiples.\n-\t *\n-\t * Read-multiple will be properly enabled above, and when\n-\t * set will give the PCI controller proper hints about\n-\t * prefetching.\n-\t */\n-\ttmp &= ~DMA_READ_WRITE_MASK;\n-\ttmp |= DMA_READ_MAX_64;\n-\ttmp |= DMA_WRITE_MAX_64;\n-#endif\n-#ifdef __alpha__\n-\ttmp &= ~DMA_READ_WRITE_MASK;\n-\ttmp |= DMA_READ_MAX_128;\n-\t/*\n-\t * All the docs say MUST NOT. Well, I did.\n-\t * Nothing terrible happens, if we load wrong size.\n-\t * Bit w&i still works better!\n-\t */\n-\ttmp |= DMA_WRITE_MAX_128;\n-#endif\n-\twritel(tmp, ®s->PciState);\n-\n-#if 0\n-\t/*\n-\t * The Host PCI bus controller driver has to set FBB.\n-\t * If all devices on that PCI bus support FBB, then the controller\n-\t * can enable FBB support in the Host PCI Bus controller (or on\n-\t * the PCI-PCI bridge if that applies).\n-\t * -ggg\n-\t */\n-\t/*\n-\t * I have received reports from people having problems when this\n-\t * bit is enabled.\n-\t */\n-\tif (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {\n-\t\tprintk(KERN_INFO \" Enabling PCI Fast Back to Back\\n\");\n-\t\tap->pci_command |= PCI_COMMAND_FAST_BACK;\n-\t\tpci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);\n-\t}\n-#endif\n-\n-\t/*\n-\t * Configure DMA attributes.\n-\t */\n-\tif (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {\n-\t\tecode = -ENODEV;\n-\t\tgoto init_error;\n-\t}\n-\n-\t/*\n-\t * Initialize the generic info block and the command+event rings\n-\t * and the control blocks for the transmit and receive rings\n-\t * as they need to be setup once and for all.\n-\t */\n-\tif (!(info = dma_alloc_coherent(&ap->pdev->dev, sizeof(struct ace_info),\n-\t\t\t\t\t&ap->info_dma, GFP_KERNEL))) {\n-\t\tecode = -EAGAIN;\n-\t\tgoto init_error;\n-\t}\n-\tap->info = info;\n-\n-\t/*\n-\t * Get the memory for the skb rings.\n-\t */\n-\tif (!(ap->skb = kzalloc_obj(struct ace_skb))) {\n-\t\tecode = -EAGAIN;\n-\t\tgoto init_error;\n-\t}\n-\n-\tecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,\n-\t\t\t DRV_NAME, dev);\n-\tif (ecode) {\n-\t\tprintk(KERN_WARNING \"%s: Requested IRQ %d is busy\\n\",\n-\t\t DRV_NAME, pdev->irq);\n-\t\tgoto init_error;\n-\t} else\n-\t\tdev->irq = pdev->irq;\n-\n-#ifdef INDEX_DEBUG\n-\tspin_lock_init(&ap->debug_lock);\n-\tap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;\n-\tap->last_std_rx = 0;\n-\tap->last_mini_rx = 0;\n-#endif\n-\n-\tecode = ace_load_firmware(dev);\n-\tif (ecode)\n-\t\tgoto init_error;\n-\n-\tap->fw_running = 0;\n-\n-\ttmp_ptr = ap->info_dma;\n-\twritel(tmp_ptr >> 32, ®s->InfoPtrHi);\n-\twritel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);\n-\n-\tmemset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));\n-\n-\tset_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);\n-\tinfo->evt_ctrl.flags = 0;\n-\n-\t*(ap->evt_prd) = 0;\n-\twmb();\n-\tset_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);\n-\twritel(0, ®s->EvtCsm);\n-\n-\tset_aceaddr(&info->cmd_ctrl.rngptr, 0x100);\n-\tinfo->cmd_ctrl.flags = 0;\n-\tinfo->cmd_ctrl.max_len = 0;\n-\n-\tfor (i = 0; i < CMD_RING_ENTRIES; i++)\n-\t\twritel(0, ®s->CmdRng[i]);\n-\n-\twritel(0, ®s->CmdPrd);\n-\twritel(0, ®s->CmdCsm);\n-\n-\ttmp_ptr = ap->info_dma;\n-\ttmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);\n-\tset_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);\n-\n-\tset_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);\n-\tinfo->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;\n-\tinfo->rx_std_ctrl.flags =\n-\t RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;\n-\n-\tmemset(ap->rx_std_ring, 0,\n-\t RX_STD_RING_ENTRIES * sizeof(struct rx_desc));\n-\n-\tfor (i = 0; i < RX_STD_RING_ENTRIES; i++)\n-\t\tap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;\n-\n-\tap->rx_std_skbprd = 0;\n-\tatomic_set(&ap->cur_rx_bufs, 0);\n-\n-\tset_aceaddr(&info->rx_jumbo_ctrl.rngptr,\n-\t\t (ap->rx_ring_base_dma +\n-\t\t (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));\n-\tinfo->rx_jumbo_ctrl.max_len = 0;\n-\tinfo->rx_jumbo_ctrl.flags =\n-\t RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;\n-\n-\tmemset(ap->rx_jumbo_ring, 0,\n-\t RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));\n-\n-\tfor (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)\n-\t\tap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;\n-\n-\tap->rx_jumbo_skbprd = 0;\n-\tatomic_set(&ap->cur_jumbo_bufs, 0);\n-\n-\tmemset(ap->rx_mini_ring, 0,\n-\t RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));\n-\n-\tif (ap->version >= 2) {\n-\t\tset_aceaddr(&info->rx_mini_ctrl.rngptr,\n-\t\t\t (ap->rx_ring_base_dma +\n-\t\t\t (sizeof(struct rx_desc) *\n-\t\t\t (RX_STD_RING_ENTRIES +\n-\t\t\t RX_JUMBO_RING_ENTRIES))));\n-\t\tinfo->rx_mini_ctrl.max_len = ACE_MINI_SIZE;\n-\t\tinfo->rx_mini_ctrl.flags =\n-\t\t RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_VLAN_ASSIST;\n-\n-\t\tfor (i = 0; i < RX_MINI_RING_ENTRIES; i++)\n-\t\t\tap->rx_mini_ring[i].flags =\n-\t\t\t\tBD_FLG_TCP_UDP_SUM | BD_FLG_MINI;\n-\t} else {\n-\t\tset_aceaddr(&info->rx_mini_ctrl.rngptr, 0);\n-\t\tinfo->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;\n-\t\tinfo->rx_mini_ctrl.max_len = 0;\n-\t}\n-\n-\tap->rx_mini_skbprd = 0;\n-\tatomic_set(&ap->cur_mini_bufs, 0);\n-\n-\tset_aceaddr(&info->rx_return_ctrl.rngptr,\n-\t\t (ap->rx_ring_base_dma +\n-\t\t (sizeof(struct rx_desc) *\n-\t\t (RX_STD_RING_ENTRIES +\n-\t\t RX_JUMBO_RING_ENTRIES +\n-\t\t RX_MINI_RING_ENTRIES))));\n-\tinfo->rx_return_ctrl.flags = 0;\n-\tinfo->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;\n-\n-\tmemset(ap->rx_return_ring, 0,\n-\t RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));\n-\n-\tset_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);\n-\t*(ap->rx_ret_prd) = 0;\n-\n-\twritel(TX_RING_BASE, ®s->WinBase);\n-\n-\tif (ACE_IS_TIGON_I(ap)) {\n-\t\tap->tx_ring = (__force struct tx_desc *) regs->Window;\n-\t\tfor (i = 0; i < (TIGON_I_TX_RING_ENTRIES\n-\t\t\t\t * sizeof(struct tx_desc)) / sizeof(u32); i++)\n-\t\t\twritel(0, (__force void __iomem *)ap->tx_ring + i * 4);\n-\n-\t\tset_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);\n-\t} else {\n-\t\tmemset(ap->tx_ring, 0,\n-\t\t MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));\n-\n-\t\tset_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);\n-\t}\n-\n-\tinfo->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);\n-\ttmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;\n-\n-\t/*\n-\t * The Tigon I does not like having the TX ring in host memory ;-(\n-\t */\n-\tif (!ACE_IS_TIGON_I(ap))\n-\t\ttmp |= RCB_FLG_TX_HOST_RING;\n-#if TX_COAL_INTS_ONLY\n-\ttmp |= RCB_FLG_COAL_INT_ONLY;\n-#endif\n-\tinfo->tx_ctrl.flags = tmp;\n-\n-\tset_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);\n-\n-\t/*\n-\t * Potential item for tuning parameter\n-\t */\n-#if 0 /* NO */\n-\twritel(DMA_THRESH_16W, ®s->DmaReadCfg);\n-\twritel(DMA_THRESH_16W, ®s->DmaWriteCfg);\n-#else\n-\twritel(DMA_THRESH_8W, ®s->DmaReadCfg);\n-\twritel(DMA_THRESH_8W, ®s->DmaWriteCfg);\n-#endif\n-\n-\twritel(0, ®s->MaskInt);\n-\twritel(1, ®s->IfIdx);\n-#if 0\n-\t/*\n-\t * McKinley boxes do not like us fiddling with AssistState\n-\t * this early\n-\t */\n-\twritel(1, ®s->AssistState);\n-#endif\n-\n-\twritel(DEF_STAT, ®s->TuneStatTicks);\n-\twritel(DEF_TRACE, ®s->TuneTrace);\n-\n-\tace_set_rxtx_parms(dev, 0);\n-\n-\tif (board_idx == BOARD_IDX_OVERFLOW) {\n-\t\tprintk(KERN_WARNING \"%s: more than %i NICs detected, \"\n-\t\t \"ignoring module parameters!\\n\",\n-\t\t ap->name, ACE_MAX_MOD_PARMS);\n-\t} else if (board_idx >= 0) {\n-\t\tif (tx_coal_tick[board_idx])\n-\t\t\twritel(tx_coal_tick[board_idx],\n-\t\t\t ®s->TuneTxCoalTicks);\n-\t\tif (max_tx_desc[board_idx])\n-\t\t\twritel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);\n-\n-\t\tif (rx_coal_tick[board_idx])\n-\t\t\twritel(rx_coal_tick[board_idx],\n-\t\t\t ®s->TuneRxCoalTicks);\n-\t\tif (max_rx_desc[board_idx])\n-\t\t\twritel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);\n-\n-\t\tif (trace[board_idx])\n-\t\t\twritel(trace[board_idx], ®s->TuneTrace);\n-\n-\t\tif ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))\n-\t\t\twritel(tx_ratio[board_idx], ®s->TxBufRat);\n-\t}\n-\n-\t/*\n-\t * Default link parameters\n-\t */\n-\ttmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |\n-\t\tLNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;\n-\tif(ap->version >= 2)\n-\t\ttmp |= LNK_TX_FLOW_CTL_Y;\n-\n-\t/*\n-\t * Override link default parameters\n-\t */\n-\tif ((board_idx >= 0) && link_state[board_idx]) {\n-\t\tint option = link_state[board_idx];\n-\n-\t\ttmp = LNK_ENABLE;\n-\n-\t\tif (option & 0x01) {\n-\t\t\tprintk(KERN_INFO \"%s: Setting half duplex link\\n\",\n-\t\t\t ap->name);\n-\t\t\ttmp &= ~LNK_FULL_DUPLEX;\n-\t\t}\n-\t\tif (option & 0x02)\n-\t\t\ttmp &= ~LNK_NEGOTIATE;\n-\t\tif (option & 0x10)\n-\t\t\ttmp |= LNK_10MB;\n-\t\tif (option & 0x20)\n-\t\t\ttmp |= LNK_100MB;\n-\t\tif (option & 0x40)\n-\t\t\ttmp |= LNK_1000MB;\n-\t\tif ((option & 0x70) == 0) {\n-\t\t\tprintk(KERN_WARNING \"%s: No media speed specified, \"\n-\t\t\t \"forcing auto negotiation\\n\", ap->name);\n-\t\t\ttmp |= LNK_NEGOTIATE | LNK_1000MB |\n-\t\t\t\tLNK_100MB | LNK_10MB;\n-\t\t}\n-\t\tif ((option & 0x100) == 0)\n-\t\t\ttmp |= LNK_NEG_FCTL;\n-\t\telse\n-\t\t\tprintk(KERN_INFO \"%s: Disabling flow control \"\n-\t\t\t \"negotiation\\n\", ap->name);\n-\t\tif (option & 0x200)\n-\t\t\ttmp |= LNK_RX_FLOW_CTL_Y;\n-\t\tif ((option & 0x400) && (ap->version >= 2)) {\n-\t\t\tprintk(KERN_INFO \"%s: Enabling TX flow control\\n\",\n-\t\t\t ap->name);\n-\t\t\ttmp |= LNK_TX_FLOW_CTL_Y;\n-\t\t}\n-\t}\n-\n-\tap->link = tmp;\n-\twritel(tmp, ®s->TuneLink);\n-\tif (ap->version >= 2)\n-\t\twritel(tmp, ®s->TuneFastLink);\n-\n-\twritel(ap->firmware_start, ®s->Pc);\n-\n-\twritel(0, ®s->Mb0Lo);\n-\n-\t/*\n-\t * Set tx_csm before we start receiving interrupts, otherwise\n-\t * the interrupt handler might think it is supposed to process\n-\t * tx ints before we are up and running, which may cause a null\n-\t * pointer access in the int handler.\n-\t */\n-\tap->cur_rx = 0;\n-\tap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;\n-\n-\twmb();\n-\tace_set_txprd(regs, ap, 0);\n-\twritel(0, ®s->RxRetCsm);\n-\n-\t/*\n-\t * Enable DMA engine now.\n-\t * If we do this sooner, Mckinley box pukes.\n-\t * I assume it's because Tigon II DMA engine wants to check\n-\t * *something* even before the CPU is started.\n-\t */\n-\twritel(1, ®s->AssistState); /* enable DMA */\n-\n-\t/*\n-\t * Start the NIC CPU\n-\t */\n-\twritel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);\n-\treadl(®s->CpuCtrl);\n-\n-\t/*\n-\t * Wait for the firmware to spin up - max 3 seconds.\n-\t */\n-\tmyjif = jiffies + 3 * HZ;\n-\twhile (time_before(jiffies, myjif) && !ap->fw_running)\n-\t\tcpu_relax();\n-\n-\tif (!ap->fw_running) {\n-\t\tprintk(KERN_ERR \"%s: Firmware NOT running!\\n\", ap->name);\n-\n-\t\tace_dump_trace(ap);\n-\t\twritel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);\n-\t\treadl(®s->CpuCtrl);\n-\n-\t\t/* aman@sgi.com - account for badly behaving firmware/NIC:\n-\t\t * - have observed that the NIC may continue to generate\n-\t\t * interrupts for some reason; attempt to stop it - halt\n-\t\t * second CPU for Tigon II cards, and also clear Mb0\n-\t\t * - if we're a module, we'll fail to load if this was\n-\t\t * the only GbE card in the system => if the kernel does\n-\t\t * see an interrupt from the NIC, code to handle it is\n-\t\t * gone and OOps! - so free_irq also\n-\t\t */\n-\t\tif (ap->version >= 2)\n-\t\t\twritel(readl(®s->CpuBCtrl) | CPU_HALT,\n-\t\t\t ®s->CpuBCtrl);\n-\t\twritel(0, ®s->Mb0Lo);\n-\t\treadl(®s->Mb0Lo);\n-\n-\t\tecode = -EBUSY;\n-\t\tgoto init_error;\n-\t}\n-\n-\t/*\n-\t * We load the ring here as there seem to be no way to tell the\n-\t * firmware to wipe the ring without re-initializing it.\n-\t */\n-\tif (!test_and_set_bit(0, &ap->std_refill_busy))\n-\t\tace_load_std_rx_ring(dev, RX_RING_SIZE);\n-\telse\n-\t\tprintk(KERN_ERR \"%s: Someone is busy refilling the RX ring\\n\",\n-\t\t ap->name);\n-\tif (ap->version >= 2) {\n-\t\tif (!test_and_set_bit(0, &ap->mini_refill_busy))\n-\t\t\tace_load_mini_rx_ring(dev, RX_MINI_SIZE);\n-\t\telse\n-\t\t\tprintk(KERN_ERR \"%s: Someone is busy refilling \"\n-\t\t\t \"the RX mini ring\\n\", ap->name);\n-\t}\n-\treturn 0;\n-\n- init_error:\n-\tace_init_cleanup(dev);\n-\treturn ecode;\n-}\n-\n-\n-static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tint board_idx = ap->board_idx;\n-\n-\tif (board_idx >= 0) {\n-\t\tif (!jumbo) {\n-\t\t\tif (!tx_coal_tick[board_idx])\n-\t\t\t\twritel(DEF_TX_COAL, ®s->TuneTxCoalTicks);\n-\t\t\tif (!max_tx_desc[board_idx])\n-\t\t\t\twritel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);\n-\t\t\tif (!rx_coal_tick[board_idx])\n-\t\t\t\twritel(DEF_RX_COAL, ®s->TuneRxCoalTicks);\n-\t\t\tif (!max_rx_desc[board_idx])\n-\t\t\t\twritel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);\n-\t\t\tif (!tx_ratio[board_idx])\n-\t\t\t\twritel(DEF_TX_RATIO, ®s->TxBufRat);\n-\t\t} else {\n-\t\t\tif (!tx_coal_tick[board_idx])\n-\t\t\t\twritel(DEF_JUMBO_TX_COAL,\n-\t\t\t\t ®s->TuneTxCoalTicks);\n-\t\t\tif (!max_tx_desc[board_idx])\n-\t\t\t\twritel(DEF_JUMBO_TX_MAX_DESC,\n-\t\t\t\t ®s->TuneMaxTxDesc);\n-\t\t\tif (!rx_coal_tick[board_idx])\n-\t\t\t\twritel(DEF_JUMBO_RX_COAL,\n-\t\t\t\t ®s->TuneRxCoalTicks);\n-\t\t\tif (!max_rx_desc[board_idx])\n-\t\t\t\twritel(DEF_JUMBO_RX_MAX_DESC,\n-\t\t\t\t ®s->TuneMaxRxDesc);\n-\t\t\tif (!tx_ratio[board_idx])\n-\t\t\t\twritel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);\n-\t\t}\n-\t}\n-}\n-\n-\n-static void ace_watchdog(struct net_device *data, unsigned int txqueue)\n-{\n-\tstruct net_device *dev = data;\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\n-\t/*\n-\t * We haven't received a stats update event for more than 2.5\n-\t * seconds and there is data in the transmit queue, thus we\n-\t * assume the card is stuck.\n-\t */\n-\tif (*ap->tx_csm != ap->tx_ret_csm) {\n-\t\tprintk(KERN_WARNING \"%s: Transmitter is stuck, %08x\\n\",\n-\t\t dev->name, (unsigned int)readl(®s->HostCtrl));\n-\t\t/* This can happen due to ieee flow control. */\n-\t} else {\n-\t\tprintk(KERN_DEBUG \"%s: BUG... transmitter died. Kicking it.\\n\",\n-\t\t dev->name);\n-#if 0\n-\t\tnetif_wake_queue(dev);\n-#endif\n-\t}\n-}\n-\n-\n-static void ace_bh_work(struct work_struct *work)\n-{\n-\tstruct ace_private *ap = from_work(ap, work, ace_bh_work);\n-\tstruct net_device *dev = ap->ndev;\n-\tint cur_size;\n-\n-\tcur_size = atomic_read(&ap->cur_rx_bufs);\n-\tif ((cur_size < RX_LOW_STD_THRES) &&\n-\t !test_and_set_bit(0, &ap->std_refill_busy)) {\n-#ifdef DEBUG\n-\t\tprintk(\"refilling buffers (current %i)\\n\", cur_size);\n-#endif\n-\t\tace_load_std_rx_ring(dev, RX_RING_SIZE - cur_size);\n-\t}\n-\n-\tif (ap->version >= 2) {\n-\t\tcur_size = atomic_read(&ap->cur_mini_bufs);\n-\t\tif ((cur_size < RX_LOW_MINI_THRES) &&\n-\t\t !test_and_set_bit(0, &ap->mini_refill_busy)) {\n-#ifdef DEBUG\n-\t\t\tprintk(\"refilling mini buffers (current %i)\\n\",\n-\t\t\t cur_size);\n-#endif\n-\t\t\tace_load_mini_rx_ring(dev, RX_MINI_SIZE - cur_size);\n-\t\t}\n-\t}\n-\n-\tcur_size = atomic_read(&ap->cur_jumbo_bufs);\n-\tif (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&\n-\t !test_and_set_bit(0, &ap->jumbo_refill_busy)) {\n-#ifdef DEBUG\n-\t\tprintk(\"refilling jumbo buffers (current %i)\\n\", cur_size);\n-#endif\n-\t\tace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size);\n-\t}\n-\tap->bh_work_pending = 0;\n-}\n-\n-\n-/*\n- * Copy the contents of the NIC's trace buffer to kernel memory.\n- */\n-static void ace_dump_trace(struct ace_private *ap)\n-{\n-#if 0\n-\tif (!ap->trace_buf)\n-\t\tif (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))\n-\t\t return;\n-#endif\n-}\n-\n-\n-/*\n- * Load the standard rx ring.\n- *\n- * Loading rings is safe without holding the spin lock since this is\n- * done only before the device is enabled, thus no interrupts are\n- * generated and by the interrupt handler/bh handler.\n- */\n-static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tshort i, idx;\n-\n-\n-\tprefetchw(&ap->cur_rx_bufs);\n-\n-\tidx = ap->rx_std_skbprd;\n-\n-\tfor (i = 0; i < nr_bufs; i++) {\n-\t\tstruct sk_buff *skb;\n-\t\tstruct rx_desc *rd;\n-\t\tdma_addr_t mapping;\n-\n-\t\tskb = netdev_alloc_skb_ip_align(dev, ACE_STD_BUFSIZE);\n-\t\tif (!skb)\n-\t\t\tbreak;\n-\n-\t\tmapping = dma_map_page(&ap->pdev->dev,\n-\t\t\t\t virt_to_page(skb->data),\n-\t\t\t\t offset_in_page(skb->data),\n-\t\t\t\t ACE_STD_BUFSIZE, DMA_FROM_DEVICE);\n-\t\tap->skb->rx_std_skbuff[idx].skb = skb;\n-\t\tdma_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],\n-\t\t\t\t mapping, mapping);\n-\n-\t\trd = &ap->rx_std_ring[idx];\n-\t\tset_aceaddr(&rd->addr, mapping);\n-\t\trd->size = ACE_STD_BUFSIZE;\n-\t\trd->idx = idx;\n-\t\tidx = (idx + 1) % RX_STD_RING_ENTRIES;\n-\t}\n-\n-\tif (!i)\n-\t\tgoto error_out;\n-\n-\tatomic_add(i, &ap->cur_rx_bufs);\n-\tap->rx_std_skbprd = idx;\n-\n-\tif (ACE_IS_TIGON_I(ap)) {\n-\t\tstruct cmd cmd;\n-\t\tcmd.evt = C_SET_RX_PRD_IDX;\n-\t\tcmd.code = 0;\n-\t\tcmd.idx = ap->rx_std_skbprd;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t} else {\n-\t\twritel(idx, ®s->RxStdPrd);\n-\t\twmb();\n-\t}\n-\n- out:\n-\tclear_bit(0, &ap->std_refill_busy);\n-\treturn;\n-\n- error_out:\n-\tprintk(KERN_INFO \"Out of memory when allocating \"\n-\t \"standard receive buffers\\n\");\n-\tgoto out;\n-}\n-\n-\n-static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tshort i, idx;\n-\n-\tprefetchw(&ap->cur_mini_bufs);\n-\n-\tidx = ap->rx_mini_skbprd;\n-\tfor (i = 0; i < nr_bufs; i++) {\n-\t\tstruct sk_buff *skb;\n-\t\tstruct rx_desc *rd;\n-\t\tdma_addr_t mapping;\n-\n-\t\tskb = netdev_alloc_skb_ip_align(dev, ACE_MINI_BUFSIZE);\n-\t\tif (!skb)\n-\t\t\tbreak;\n-\n-\t\tmapping = dma_map_page(&ap->pdev->dev,\n-\t\t\t\t virt_to_page(skb->data),\n-\t\t\t\t offset_in_page(skb->data),\n-\t\t\t\t ACE_MINI_BUFSIZE, DMA_FROM_DEVICE);\n-\t\tap->skb->rx_mini_skbuff[idx].skb = skb;\n-\t\tdma_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],\n-\t\t\t\t mapping, mapping);\n-\n-\t\trd = &ap->rx_mini_ring[idx];\n-\t\tset_aceaddr(&rd->addr, mapping);\n-\t\trd->size = ACE_MINI_BUFSIZE;\n-\t\trd->idx = idx;\n-\t\tidx = (idx + 1) % RX_MINI_RING_ENTRIES;\n-\t}\n-\n-\tif (!i)\n-\t\tgoto error_out;\n-\n-\tatomic_add(i, &ap->cur_mini_bufs);\n-\n-\tap->rx_mini_skbprd = idx;\n-\n-\twritel(idx, ®s->RxMiniPrd);\n-\twmb();\n-\n- out:\n-\tclear_bit(0, &ap->mini_refill_busy);\n-\treturn;\n- error_out:\n-\tprintk(KERN_INFO \"Out of memory when allocating \"\n-\t \"mini receive buffers\\n\");\n-\tgoto out;\n-}\n-\n-\n-/*\n- * Load the jumbo rx ring, this may happen at any time if the MTU\n- * is changed to a value > 1500.\n- */\n-static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tshort i, idx;\n-\n-\tidx = ap->rx_jumbo_skbprd;\n-\n-\tfor (i = 0; i < nr_bufs; i++) {\n-\t\tstruct sk_buff *skb;\n-\t\tstruct rx_desc *rd;\n-\t\tdma_addr_t mapping;\n-\n-\t\tskb = netdev_alloc_skb_ip_align(dev, ACE_JUMBO_BUFSIZE);\n-\t\tif (!skb)\n-\t\t\tbreak;\n-\n-\t\tmapping = dma_map_page(&ap->pdev->dev,\n-\t\t\t\t virt_to_page(skb->data),\n-\t\t\t\t offset_in_page(skb->data),\n-\t\t\t\t ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);\n-\t\tap->skb->rx_jumbo_skbuff[idx].skb = skb;\n-\t\tdma_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],\n-\t\t\t\t mapping, mapping);\n-\n-\t\trd = &ap->rx_jumbo_ring[idx];\n-\t\tset_aceaddr(&rd->addr, mapping);\n-\t\trd->size = ACE_JUMBO_BUFSIZE;\n-\t\trd->idx = idx;\n-\t\tidx = (idx + 1) % RX_JUMBO_RING_ENTRIES;\n-\t}\n-\n-\tif (!i)\n-\t\tgoto error_out;\n-\n-\tatomic_add(i, &ap->cur_jumbo_bufs);\n-\tap->rx_jumbo_skbprd = idx;\n-\n-\tif (ACE_IS_TIGON_I(ap)) {\n-\t\tstruct cmd cmd;\n-\t\tcmd.evt = C_SET_RX_JUMBO_PRD_IDX;\n-\t\tcmd.code = 0;\n-\t\tcmd.idx = ap->rx_jumbo_skbprd;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t} else {\n-\t\twritel(idx, ®s->RxJumboPrd);\n-\t\twmb();\n-\t}\n-\n- out:\n-\tclear_bit(0, &ap->jumbo_refill_busy);\n-\treturn;\n- error_out:\n-\tif (net_ratelimit())\n-\t\tprintk(KERN_INFO \"Out of memory when allocating \"\n-\t\t \"jumbo receive buffers\\n\");\n-\tgoto out;\n-}\n-\n-\n-/*\n- * All events are considered to be slow (RX/TX ints do not generate\n- * events) and are handled here, outside the main interrupt handler,\n- * to reduce the size of the handler.\n- */\n-static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)\n-{\n-\tstruct ace_private *ap;\n-\n-\tap = netdev_priv(dev);\n-\n-\twhile (evtcsm != evtprd) {\n-\t\tswitch (ap->evt_ring[evtcsm].evt) {\n-\t\tcase E_FW_RUNNING:\n-\t\t\tprintk(KERN_INFO \"%s: Firmware up and running\\n\",\n-\t\t\t ap->name);\n-\t\t\tap->fw_running = 1;\n-\t\t\twmb();\n-\t\t\tbreak;\n-\t\tcase E_STATS_UPDATED:\n-\t\t\tbreak;\n-\t\tcase E_LNK_STATE:\n-\t\t{\n-\t\t\tu16 code = ap->evt_ring[evtcsm].code;\n-\t\t\tswitch (code) {\n-\t\t\tcase E_C_LINK_UP:\n-\t\t\t{\n-\t\t\t\tu32 state = readl(&ap->regs->GigLnkState);\n-\t\t\t\tprintk(KERN_WARNING \"%s: Optical link UP \"\n-\t\t\t\t \"(%s Duplex, Flow Control: %s%s)\\n\",\n-\t\t\t\t ap->name,\n-\t\t\t\t state & LNK_FULL_DUPLEX ? \"Full\":\"Half\",\n-\t\t\t\t state & LNK_TX_FLOW_CTL_Y ? \"TX \" : \"\",\n-\t\t\t\t state & LNK_RX_FLOW_CTL_Y ? \"RX\" : \"\");\n-\t\t\t\tbreak;\n-\t\t\t}\n-\t\t\tcase E_C_LINK_DOWN:\n-\t\t\t\tprintk(KERN_WARNING \"%s: Optical link DOWN\\n\",\n-\t\t\t\t ap->name);\n-\t\t\t\tbreak;\n-\t\t\tcase E_C_LINK_10_100:\n-\t\t\t\tprintk(KERN_WARNING \"%s: 10/100BaseT link \"\n-\t\t\t\t \"UP\\n\", ap->name);\n-\t\t\t\tbreak;\n-\t\t\tdefault:\n-\t\t\t\tprintk(KERN_ERR \"%s: Unknown optical link \"\n-\t\t\t\t \"state %02x\\n\", ap->name, code);\n-\t\t\t}\n-\t\t\tbreak;\n-\t\t}\n-\t\tcase E_ERROR:\n-\t\t\tswitch(ap->evt_ring[evtcsm].code) {\n-\t\t\tcase E_C_ERR_INVAL_CMD:\n-\t\t\t\tprintk(KERN_ERR \"%s: invalid command error\\n\",\n-\t\t\t\t ap->name);\n-\t\t\t\tbreak;\n-\t\t\tcase E_C_ERR_UNIMP_CMD:\n-\t\t\t\tprintk(KERN_ERR \"%s: unimplemented command \"\n-\t\t\t\t \"error\\n\", ap->name);\n-\t\t\t\tbreak;\n-\t\t\tcase E_C_ERR_BAD_CFG:\n-\t\t\t\tprintk(KERN_ERR \"%s: bad config error\\n\",\n-\t\t\t\t ap->name);\n-\t\t\t\tbreak;\n-\t\t\tdefault:\n-\t\t\t\tprintk(KERN_ERR \"%s: unknown error %02x\\n\",\n-\t\t\t\t ap->name, ap->evt_ring[evtcsm].code);\n-\t\t\t}\n-\t\t\tbreak;\n-\t\tcase E_RESET_JUMBO_RNG:\n-\t\t{\n-\t\t\tint i;\n-\t\t\tfor (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {\n-\t\t\t\tif (ap->skb->rx_jumbo_skbuff[i].skb) {\n-\t\t\t\t\tap->rx_jumbo_ring[i].size = 0;\n-\t\t\t\t\tset_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);\n-\t\t\t\t\tdev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);\n-\t\t\t\t\tap->skb->rx_jumbo_skbuff[i].skb = NULL;\n-\t\t\t\t}\n-\t\t\t}\n-\n-\t\t\tif (ACE_IS_TIGON_I(ap)) {\n-\t\t\t\tstruct cmd cmd;\n-\t\t\t\tcmd.evt = C_SET_RX_JUMBO_PRD_IDX;\n-\t\t\t\tcmd.code = 0;\n-\t\t\t\tcmd.idx = 0;\n-\t\t\t\tace_issue_cmd(ap->regs, &cmd);\n-\t\t\t} else {\n-\t\t\t\twritel(0, &((ap->regs)->RxJumboPrd));\n-\t\t\t\twmb();\n-\t\t\t}\n-\n-\t\t\tap->jumbo = 0;\n-\t\t\tap->rx_jumbo_skbprd = 0;\n-\t\t\tprintk(KERN_INFO \"%s: Jumbo ring flushed\\n\",\n-\t\t\t ap->name);\n-\t\t\tclear_bit(0, &ap->jumbo_refill_busy);\n-\t\t\tbreak;\n-\t\t}\n-\t\tdefault:\n-\t\t\tprintk(KERN_ERR \"%s: Unhandled event 0x%02x\\n\",\n-\t\t\t ap->name, ap->evt_ring[evtcsm].evt);\n-\t\t}\n-\t\tevtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;\n-\t}\n-\n-\treturn evtcsm;\n-}\n-\n-\n-static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tu32 idx;\n-\tint mini_count = 0, std_count = 0;\n-\n-\tidx = rxretcsm;\n-\n-\tprefetchw(&ap->cur_rx_bufs);\n-\tprefetchw(&ap->cur_mini_bufs);\n-\n-\twhile (idx != rxretprd) {\n-\t\tstruct ring_info *rip;\n-\t\tstruct sk_buff *skb;\n-\t\tstruct rx_desc *retdesc;\n-\t\tu32 skbidx;\n-\t\tint bd_flags, desc_type, mapsize;\n-\t\tu16 csum;\n-\n-\n-\t\t/* make sure the rx descriptor isn't read before rxretprd */\n-\t\tif (idx == rxretcsm)\n-\t\t\trmb();\n-\n-\t\tretdesc = &ap->rx_return_ring[idx];\n-\t\tskbidx = retdesc->idx;\n-\t\tbd_flags = retdesc->flags;\n-\t\tdesc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);\n-\n-\t\tswitch(desc_type) {\n-\t\t\t/*\n-\t\t\t * Normal frames do not have any flags set\n-\t\t\t *\n-\t\t\t * Mini and normal frames arrive frequently,\n-\t\t\t * so use a local counter to avoid doing\n-\t\t\t * atomic operations for each packet arriving.\n-\t\t\t */\n-\t\tcase 0:\n-\t\t\trip = &ap->skb->rx_std_skbuff[skbidx];\n-\t\t\tmapsize = ACE_STD_BUFSIZE;\n-\t\t\tstd_count++;\n-\t\t\tbreak;\n-\t\tcase BD_FLG_JUMBO:\n-\t\t\trip = &ap->skb->rx_jumbo_skbuff[skbidx];\n-\t\t\tmapsize = ACE_JUMBO_BUFSIZE;\n-\t\t\tatomic_dec(&ap->cur_jumbo_bufs);\n-\t\t\tbreak;\n-\t\tcase BD_FLG_MINI:\n-\t\t\trip = &ap->skb->rx_mini_skbuff[skbidx];\n-\t\t\tmapsize = ACE_MINI_BUFSIZE;\n-\t\t\tmini_count++;\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tprintk(KERN_INFO \"%s: unknown frame type (0x%02x) \"\n-\t\t\t \"returned by NIC\\n\", dev->name,\n-\t\t\t retdesc->flags);\n-\t\t\tgoto error;\n-\t\t}\n-\n-\t\tskb = rip->skb;\n-\t\trip->skb = NULL;\n-\t\tdma_unmap_page(&ap->pdev->dev, dma_unmap_addr(rip, mapping),\n-\t\t\t mapsize, DMA_FROM_DEVICE);\n-\t\tskb_put(skb, retdesc->size);\n-\n-\t\t/*\n-\t\t * Fly baby, fly!\n-\t\t */\n-\t\tcsum = retdesc->tcp_udp_csum;\n-\n-\t\tskb->protocol = eth_type_trans(skb, dev);\n-\n-\t\t/*\n-\t\t * Instead of forcing the poor tigon mips cpu to calculate\n-\t\t * pseudo hdr checksum, we do this ourselves.\n-\t\t */\n-\t\tif (bd_flags & BD_FLG_TCP_UDP_SUM) {\n-\t\t\tskb->csum = htons(csum);\n-\t\t\tskb->ip_summed = CHECKSUM_COMPLETE;\n-\t\t} else {\n-\t\t\tskb_checksum_none_assert(skb);\n-\t\t}\n-\n-\t\t/* send it up */\n-\t\tif ((bd_flags & BD_FLG_VLAN_TAG))\n-\t\t\t__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), retdesc->vlan);\n-\t\tnetif_rx(skb);\n-\n-\t\tdev->stats.rx_packets++;\n-\t\tdev->stats.rx_bytes += retdesc->size;\n-\n-\t\tidx = (idx + 1) % RX_RETURN_RING_ENTRIES;\n-\t}\n-\n-\tatomic_sub(std_count, &ap->cur_rx_bufs);\n-\tif (!ACE_IS_TIGON_I(ap))\n-\t\tatomic_sub(mini_count, &ap->cur_mini_bufs);\n-\n- out:\n-\t/*\n-\t * According to the documentation RxRetCsm is obsolete with\n-\t * the 12.3.x Firmware - my Tigon I NICs seem to disagree!\n-\t */\n-\tif (ACE_IS_TIGON_I(ap)) {\n-\t\twritel(idx, &ap->regs->RxRetCsm);\n-\t}\n-\tap->cur_rx = idx;\n-\n-\treturn;\n- error:\n-\tidx = rxretprd;\n-\tgoto out;\n-}\n-\n-\n-static inline void ace_tx_int(struct net_device *dev,\n-\t\t\t u32 txcsm, u32 idx)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\n-\tdo {\n-\t\tstruct sk_buff *skb;\n-\t\tstruct tx_ring_info *info;\n-\n-\t\tinfo = ap->skb->tx_skbuff + idx;\n-\t\tskb = info->skb;\n-\n-\t\tif (dma_unmap_len(info, maplen)) {\n-\t\t\tdma_unmap_page(&ap->pdev->dev,\n-\t\t\t\t dma_unmap_addr(info, mapping),\n-\t\t\t\t dma_unmap_len(info, maplen),\n-\t\t\t\t DMA_TO_DEVICE);\n-\t\t\tdma_unmap_len_set(info, maplen, 0);\n-\t\t}\n-\n-\t\tif (skb) {\n-\t\t\tdev->stats.tx_packets++;\n-\t\t\tdev->stats.tx_bytes += skb->len;\n-\t\t\tdev_consume_skb_irq(skb);\n-\t\t\tinfo->skb = NULL;\n-\t\t}\n-\n-\t\tidx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);\n-\t} while (idx != txcsm);\n-\n-\tif (netif_queue_stopped(dev))\n-\t\tnetif_wake_queue(dev);\n-\n-\twmb();\n-\tap->tx_ret_csm = txcsm;\n-\n-\t/* So... tx_ret_csm is advanced _after_ check for device wakeup.\n-\t *\n-\t * We could try to make it before. In this case we would get\n-\t * the following race condition: hard_start_xmit on other cpu\n-\t * enters after we advanced tx_ret_csm and fills space,\n-\t * which we have just freed, so that we make illegal device wakeup.\n-\t * There is no good way to workaround this (at entry\n-\t * to ace_start_xmit detects this condition and prevents\n-\t * ring corruption, but it is not a good workaround.)\n-\t *\n-\t * When tx_ret_csm is advanced after, we wake up device _only_\n-\t * if we really have some space in ring (though the core doing\n-\t * hard_start_xmit can see full ring for some period and has to\n-\t * synchronize.) Superb.\n-\t * BUT! We get another subtle race condition. hard_start_xmit\n-\t * may think that ring is full between wakeup and advancing\n-\t * tx_ret_csm and will stop device instantly! It is not so bad.\n-\t * We are guaranteed that there is something in ring, so that\n-\t * the next irq will resume transmission. To speedup this we could\n-\t * mark descriptor, which closes ring with BD_FLG_COAL_NOW\n-\t * (see ace_start_xmit).\n-\t *\n-\t * Well, this dilemma exists in all lock-free devices.\n-\t * We, following scheme used in drivers by Donald Becker,\n-\t * select the least dangerous.\n-\t *\t\t\t\t\t\t\t--ANK\n-\t */\n-}\n-\n-\n-static irqreturn_t ace_interrupt(int irq, void *dev_id)\n-{\n-\tstruct net_device *dev = (struct net_device *)dev_id;\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tu32 idx;\n-\tu32 txcsm, rxretcsm, rxretprd;\n-\tu32 evtcsm, evtprd;\n-\n-\t/*\n-\t * In case of PCI shared interrupts or spurious interrupts,\n-\t * we want to make sure it is actually our interrupt before\n-\t * spending any time in here.\n-\t */\n-\tif (!(readl(®s->HostCtrl) & IN_INT))\n-\t\treturn IRQ_NONE;\n-\n-\t/*\n-\t * ACK intr now. Otherwise we will lose updates to rx_ret_prd,\n-\t * which happened _after_ rxretprd = *ap->rx_ret_prd; but before\n-\t * writel(0, ®s->Mb0Lo).\n-\t *\n-\t * \"IRQ avoidance\" recommended in docs applies to IRQs served\n-\t * threads and it is wrong even for that case.\n-\t */\n-\twritel(0, ®s->Mb0Lo);\n-\treadl(®s->Mb0Lo);\n-\n-\t/*\n-\t * There is no conflict between transmit handling in\n-\t * start_xmit and receive processing, thus there is no reason\n-\t * to take a spin lock for RX handling. Wait until we start\n-\t * working on the other stuff - hey we don't need a spin lock\n-\t * anymore.\n-\t */\n-\trxretprd = *ap->rx_ret_prd;\n-\trxretcsm = ap->cur_rx;\n-\n-\tif (rxretprd != rxretcsm)\n-\t\tace_rx_int(dev, rxretprd, rxretcsm);\n-\n-\ttxcsm = *ap->tx_csm;\n-\tidx = ap->tx_ret_csm;\n-\n-\tif (txcsm != idx) {\n-\t\t/*\n-\t\t * If each skb takes only one descriptor this check degenerates\n-\t\t * to identity, because new space has just been opened.\n-\t\t * But if skbs are fragmented we must check that this index\n-\t\t * update releases enough of space, otherwise we just\n-\t\t * wait for device to make more work.\n-\t\t */\n-\t\tif (!tx_ring_full(ap, txcsm, ap->tx_prd))\n-\t\t\tace_tx_int(dev, txcsm, idx);\n-\t}\n-\n-\tevtcsm = readl(®s->EvtCsm);\n-\tevtprd = *ap->evt_prd;\n-\n-\tif (evtcsm != evtprd) {\n-\t\tevtcsm = ace_handle_event(dev, evtcsm, evtprd);\n-\t\twritel(evtcsm, ®s->EvtCsm);\n-\t}\n-\n-\t/*\n-\t * This has to go last in the interrupt handler and run with\n-\t * the spin lock released ... what lock?\n-\t */\n-\tif (netif_running(dev)) {\n-\t\tint cur_size;\n-\t\tint run_bh_work = 0;\n-\n-\t\tcur_size = atomic_read(&ap->cur_rx_bufs);\n-\t\tif (cur_size < RX_LOW_STD_THRES) {\n-\t\t\tif ((cur_size < RX_PANIC_STD_THRES) &&\n-\t\t\t !test_and_set_bit(0, &ap->std_refill_busy)) {\n-#ifdef DEBUG\n-\t\t\t\tprintk(\"low on std buffers %i\\n\", cur_size);\n-#endif\n-\t\t\t\tace_load_std_rx_ring(dev,\n-\t\t\t\t\t\t RX_RING_SIZE - cur_size);\n-\t\t\t} else\n-\t\t\t\trun_bh_work = 1;\n-\t\t}\n-\n-\t\tif (!ACE_IS_TIGON_I(ap)) {\n-\t\t\tcur_size = atomic_read(&ap->cur_mini_bufs);\n-\t\t\tif (cur_size < RX_LOW_MINI_THRES) {\n-\t\t\t\tif ((cur_size < RX_PANIC_MINI_THRES) &&\n-\t\t\t\t !test_and_set_bit(0,\n-\t\t\t\t\t\t &ap->mini_refill_busy)) {\n-#ifdef DEBUG\n-\t\t\t\t\tprintk(\"low on mini buffers %i\\n\",\n-\t\t\t\t\t cur_size);\n-#endif\n-\t\t\t\t\tace_load_mini_rx_ring(dev,\n-\t\t\t\t\t\t\t RX_MINI_SIZE - cur_size);\n-\t\t\t\t} else\n-\t\t\t\t\trun_bh_work = 1;\n-\t\t\t}\n-\t\t}\n-\n-\t\tif (ap->jumbo) {\n-\t\t\tcur_size = atomic_read(&ap->cur_jumbo_bufs);\n-\t\t\tif (cur_size < RX_LOW_JUMBO_THRES) {\n-\t\t\t\tif ((cur_size < RX_PANIC_JUMBO_THRES) &&\n-\t\t\t\t !test_and_set_bit(0,\n-\t\t\t\t\t\t &ap->jumbo_refill_busy)){\n-#ifdef DEBUG\n-\t\t\t\t\tprintk(\"low on jumbo buffers %i\\n\",\n-\t\t\t\t\t cur_size);\n-#endif\n-\t\t\t\t\tace_load_jumbo_rx_ring(dev,\n-\t\t\t\t\t\t\t RX_JUMBO_SIZE - cur_size);\n-\t\t\t\t} else\n-\t\t\t\t\trun_bh_work = 1;\n-\t\t\t}\n-\t\t}\n-\t\tif (run_bh_work && !ap->bh_work_pending) {\n-\t\t\tap->bh_work_pending = 1;\n-\t\t\tqueue_work(system_bh_wq, &ap->ace_bh_work);\n-\t\t}\n-\t}\n-\n-\treturn IRQ_HANDLED;\n-}\n-\n-static int ace_open(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tstruct cmd cmd;\n-\n-\tif (!(ap->fw_running)) {\n-\t\tprintk(KERN_WARNING \"%s: Firmware not running!\\n\", dev->name);\n-\t\treturn -EBUSY;\n-\t}\n-\n-\twritel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);\n-\n-\tcmd.evt = C_CLEAR_STATS;\n-\tcmd.code = 0;\n-\tcmd.idx = 0;\n-\tace_issue_cmd(regs, &cmd);\n-\n-\tcmd.evt = C_HOST_STATE;\n-\tcmd.code = C_C_STACK_UP;\n-\tcmd.idx = 0;\n-\tace_issue_cmd(regs, &cmd);\n-\n-\tif (ap->jumbo &&\n-\t !test_and_set_bit(0, &ap->jumbo_refill_busy))\n-\t\tace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);\n-\n-\tif (dev->flags & IFF_PROMISC) {\n-\t\tcmd.evt = C_SET_PROMISC_MODE;\n-\t\tcmd.code = C_C_PROMISC_ENABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\n-\t\tap->promisc = 1;\n-\t}else\n-\t\tap->promisc = 0;\n-\tap->mcast_all = 0;\n-\n-#if 0\n-\tcmd.evt = C_LNK_NEGOTIATION;\n-\tcmd.code = 0;\n-\tcmd.idx = 0;\n-\tace_issue_cmd(regs, &cmd);\n-#endif\n-\n-\tnetif_start_queue(dev);\n-\n-\t/*\n-\t * Setup the bottom half rx ring refill handler\n-\t */\n-\tINIT_WORK(&ap->ace_bh_work, ace_bh_work);\n-\treturn 0;\n-}\n-\n-\n-static int ace_close(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tstruct cmd cmd;\n-\tunsigned long flags;\n-\tshort i;\n-\n-\t/*\n-\t * Without (or before) releasing irq and stopping hardware, this\n-\t * is an absolute non-sense, by the way. It will be reset instantly\n-\t * by the first irq.\n-\t */\n-\tnetif_stop_queue(dev);\n-\n-\n-\tif (ap->promisc) {\n-\t\tcmd.evt = C_SET_PROMISC_MODE;\n-\t\tcmd.code = C_C_PROMISC_DISABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t\tap->promisc = 0;\n-\t}\n-\n-\tcmd.evt = C_HOST_STATE;\n-\tcmd.code = C_C_STACK_DOWN;\n-\tcmd.idx = 0;\n-\tace_issue_cmd(regs, &cmd);\n-\n-\tcancel_work_sync(&ap->ace_bh_work);\n-\n-\t/*\n-\t * Make sure one CPU is not processing packets while\n-\t * buffers are being released by another.\n-\t */\n-\n-\tlocal_irq_save(flags);\n-\tace_mask_irq(dev);\n-\n-\tfor (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {\n-\t\tstruct sk_buff *skb;\n-\t\tstruct tx_ring_info *info;\n-\n-\t\tinfo = ap->skb->tx_skbuff + i;\n-\t\tskb = info->skb;\n-\n-\t\tif (dma_unmap_len(info, maplen)) {\n-\t\t\tif (ACE_IS_TIGON_I(ap)) {\n-\t\t\t\t/* NB: TIGON_1 is special, tx_ring is in io space */\n-\t\t\t\tstruct tx_desc __iomem *tx;\n-\t\t\t\ttx = (__force struct tx_desc __iomem *) &ap->tx_ring[i];\n-\t\t\t\twritel(0, &tx->addr.addrhi);\n-\t\t\t\twritel(0, &tx->addr.addrlo);\n-\t\t\t\twritel(0, &tx->flagsize);\n-\t\t\t} else\n-\t\t\t\tmemset(ap->tx_ring + i, 0,\n-\t\t\t\t sizeof(struct tx_desc));\n-\t\t\tdma_unmap_page(&ap->pdev->dev,\n-\t\t\t\t dma_unmap_addr(info, mapping),\n-\t\t\t\t dma_unmap_len(info, maplen),\n-\t\t\t\t DMA_TO_DEVICE);\n-\t\t\tdma_unmap_len_set(info, maplen, 0);\n-\t\t}\n-\t\tif (skb) {\n-\t\t\tdev_kfree_skb(skb);\n-\t\t\tinfo->skb = NULL;\n-\t\t}\n-\t}\n-\n-\tif (ap->jumbo) {\n-\t\tcmd.evt = C_RESET_JUMBO_RNG;\n-\t\tcmd.code = 0;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t}\n-\n-\tace_unmask_irq(dev);\n-\tlocal_irq_restore(flags);\n-\n-\treturn 0;\n-}\n-\n-\n-static inline dma_addr_t\n-ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,\n-\t struct sk_buff *tail, u32 idx)\n-{\n-\tdma_addr_t mapping;\n-\tstruct tx_ring_info *info;\n-\n-\tmapping = dma_map_page(&ap->pdev->dev, virt_to_page(skb->data),\n-\t\t\t offset_in_page(skb->data), skb->len,\n-\t\t\t DMA_TO_DEVICE);\n-\n-\tinfo = ap->skb->tx_skbuff + idx;\n-\tinfo->skb = tail;\n-\tdma_unmap_addr_set(info, mapping, mapping);\n-\tdma_unmap_len_set(info, maplen, skb->len);\n-\treturn mapping;\n-}\n-\n-\n-static inline void\n-ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,\n-\t u32 flagsize, u32 vlan_tag)\n-{\n-#if !USE_TX_COAL_NOW\n-\tflagsize &= ~BD_FLG_COAL_NOW;\n-#endif\n-\n-\tif (ACE_IS_TIGON_I(ap)) {\n-\t\tstruct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc;\n-\t\twritel(addr >> 32, &io->addr.addrhi);\n-\t\twritel(addr & 0xffffffff, &io->addr.addrlo);\n-\t\twritel(flagsize, &io->flagsize);\n-\t\twritel(vlan_tag, &io->vlanres);\n-\t} else {\n-\t\tdesc->addr.addrhi = addr >> 32;\n-\t\tdesc->addr.addrlo = addr;\n-\t\tdesc->flagsize = flagsize;\n-\t\tdesc->vlanres = vlan_tag;\n-\t}\n-}\n-\n-\n-static netdev_tx_t ace_start_xmit(struct sk_buff *skb,\n-\t\t\t\t struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tstruct tx_desc *desc;\n-\tu32 idx, flagsize;\n-\tunsigned long maxjiff = jiffies + 3*HZ;\n-\n-restart:\n-\tidx = ap->tx_prd;\n-\n-\tif (tx_ring_full(ap, ap->tx_ret_csm, idx))\n-\t\tgoto overflow;\n-\n-\tif (!skb_shinfo(skb)->nr_frags)\t{\n-\t\tdma_addr_t mapping;\n-\t\tu32 vlan_tag = 0;\n-\n-\t\tmapping = ace_map_tx_skb(ap, skb, skb, idx);\n-\t\tflagsize = (skb->len << 16) | (BD_FLG_END);\n-\t\tif (skb->ip_summed == CHECKSUM_PARTIAL)\n-\t\t\tflagsize |= BD_FLG_TCP_UDP_SUM;\n-\t\tif (skb_vlan_tag_present(skb)) {\n-\t\t\tflagsize |= BD_FLG_VLAN_TAG;\n-\t\t\tvlan_tag = skb_vlan_tag_get(skb);\n-\t\t}\n-\t\tdesc = ap->tx_ring + idx;\n-\t\tidx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);\n-\n-\t\t/* Look at ace_tx_int for explanations. */\n-\t\tif (tx_ring_full(ap, ap->tx_ret_csm, idx))\n-\t\t\tflagsize |= BD_FLG_COAL_NOW;\n-\n-\t\tace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);\n-\t} else {\n-\t\tdma_addr_t mapping;\n-\t\tu32 vlan_tag = 0;\n-\t\tint i;\n-\n-\t\tmapping = ace_map_tx_skb(ap, skb, NULL, idx);\n-\t\tflagsize = (skb_headlen(skb) << 16);\n-\t\tif (skb->ip_summed == CHECKSUM_PARTIAL)\n-\t\t\tflagsize |= BD_FLG_TCP_UDP_SUM;\n-\t\tif (skb_vlan_tag_present(skb)) {\n-\t\t\tflagsize |= BD_FLG_VLAN_TAG;\n-\t\t\tvlan_tag = skb_vlan_tag_get(skb);\n-\t\t}\n-\n-\t\tace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);\n-\n-\t\tidx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);\n-\n-\t\tfor (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {\n-\t\t\tconst skb_frag_t *frag = &skb_shinfo(skb)->frags[i];\n-\t\t\tstruct tx_ring_info *info;\n-\n-\t\t\tinfo = ap->skb->tx_skbuff + idx;\n-\t\t\tdesc = ap->tx_ring + idx;\n-\n-\t\t\tmapping = skb_frag_dma_map(&ap->pdev->dev, frag, 0,\n-\t\t\t\t\t\t skb_frag_size(frag),\n-\t\t\t\t\t\t DMA_TO_DEVICE);\n-\n-\t\t\tflagsize = skb_frag_size(frag) << 16;\n-\t\t\tif (skb->ip_summed == CHECKSUM_PARTIAL)\n-\t\t\t\tflagsize |= BD_FLG_TCP_UDP_SUM;\n-\t\t\tidx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);\n-\n-\t\t\tif (i == skb_shinfo(skb)->nr_frags - 1) {\n-\t\t\t\tflagsize |= BD_FLG_END;\n-\t\t\t\tif (tx_ring_full(ap, ap->tx_ret_csm, idx))\n-\t\t\t\t\tflagsize |= BD_FLG_COAL_NOW;\n-\n-\t\t\t\t/*\n-\t\t\t\t * Only the last fragment frees\n-\t\t\t\t * the skb!\n-\t\t\t\t */\n-\t\t\t\tinfo->skb = skb;\n-\t\t\t} else {\n-\t\t\t\tinfo->skb = NULL;\n-\t\t\t}\n-\t\t\tdma_unmap_addr_set(info, mapping, mapping);\n-\t\t\tdma_unmap_len_set(info, maplen, skb_frag_size(frag));\n-\t\t\tace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);\n-\t\t}\n-\t}\n-\n-\twmb();\n-\tap->tx_prd = idx;\n-\tace_set_txprd(regs, ap, idx);\n-\n-\tif (flagsize & BD_FLG_COAL_NOW) {\n-\t\tnetif_stop_queue(dev);\n-\n-\t\t/*\n-\t\t * A TX-descriptor producer (an IRQ) might have gotten\n-\t\t * between, making the ring free again. Since xmit is\n-\t\t * serialized, this is the only situation we have to\n-\t\t * re-test.\n-\t\t */\n-\t\tif (!tx_ring_full(ap, ap->tx_ret_csm, idx))\n-\t\t\tnetif_wake_queue(dev);\n-\t}\n-\n-\treturn NETDEV_TX_OK;\n-\n-overflow:\n-\t/*\n-\t * This race condition is unavoidable with lock-free drivers.\n-\t * We wake up the queue _before_ tx_prd is advanced, so that we can\n-\t * enter hard_start_xmit too early, while tx ring still looks closed.\n-\t * This happens ~1-4 times per 100000 packets, so that we can allow\n-\t * to loop syncing to other CPU. Probably, we need an additional\n-\t * wmb() in ace_tx_intr as well.\n-\t *\n-\t * Note that this race is relieved by reserving one more entry\n-\t * in tx ring than it is necessary (see original non-SG driver).\n-\t * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which\n-\t * is already overkill.\n-\t *\n-\t * Alternative is to return with 1 not throttling queue. In this\n-\t * case loop becomes longer, no more useful effects.\n-\t */\n-\tif (time_before(jiffies, maxjiff)) {\n-\t\tbarrier();\n-\t\tcpu_relax();\n-\t\tgoto restart;\n-\t}\n-\n-\t/* The ring is stuck full. */\n-\tprintk(KERN_WARNING \"%s: Transmit ring stuck full\\n\", dev->name);\n-\treturn NETDEV_TX_BUSY;\n-}\n-\n-\n-static int ace_change_mtu(struct net_device *dev, int new_mtu)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\n-\twritel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);\n-\tWRITE_ONCE(dev->mtu, new_mtu);\n-\n-\tif (new_mtu > ACE_STD_MTU) {\n-\t\tif (!(ap->jumbo)) {\n-\t\t\tprintk(KERN_INFO \"%s: Enabling Jumbo frame \"\n-\t\t\t \"support\\n\", dev->name);\n-\t\t\tap->jumbo = 1;\n-\t\t\tif (!test_and_set_bit(0, &ap->jumbo_refill_busy))\n-\t\t\t\tace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);\n-\t\t\tace_set_rxtx_parms(dev, 1);\n-\t\t}\n-\t} else {\n-\t\twhile (test_and_set_bit(0, &ap->jumbo_refill_busy));\n-\t\tace_sync_irq(dev->irq);\n-\t\tace_set_rxtx_parms(dev, 0);\n-\t\tif (ap->jumbo) {\n-\t\t\tstruct cmd cmd;\n-\n-\t\t\tcmd.evt = C_RESET_JUMBO_RNG;\n-\t\t\tcmd.code = 0;\n-\t\t\tcmd.idx = 0;\n-\t\t\tace_issue_cmd(regs, &cmd);\n-\t\t}\n-\t}\n-\n-\treturn 0;\n-}\n-\n-static int ace_get_link_ksettings(struct net_device *dev,\n-\t\t\t\t struct ethtool_link_ksettings *cmd)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tu32 link;\n-\tu32 supported;\n-\n-\tmemset(cmd, 0, sizeof(struct ethtool_link_ksettings));\n-\n-\tsupported = (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |\n-\t\t SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |\n-\t\t SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |\n-\t\t SUPPORTED_Autoneg | SUPPORTED_FIBRE);\n-\n-\tcmd->base.port = PORT_FIBRE;\n-\n-\tlink = readl(®s->GigLnkState);\n-\tif (link & LNK_1000MB) {\n-\t\tcmd->base.speed = SPEED_1000;\n-\t} else {\n-\t\tlink = readl(®s->FastLnkState);\n-\t\tif (link & LNK_100MB)\n-\t\t\tcmd->base.speed = SPEED_100;\n-\t\telse if (link & LNK_10MB)\n-\t\t\tcmd->base.speed = SPEED_10;\n-\t\telse\n-\t\t\tcmd->base.speed = 0;\n-\t}\n-\tif (link & LNK_FULL_DUPLEX)\n-\t\tcmd->base.duplex = DUPLEX_FULL;\n-\telse\n-\t\tcmd->base.duplex = DUPLEX_HALF;\n-\n-\tif (link & LNK_NEGOTIATE)\n-\t\tcmd->base.autoneg = AUTONEG_ENABLE;\n-\telse\n-\t\tcmd->base.autoneg = AUTONEG_DISABLE;\n-\n-#if 0\n-\t/*\n-\t * Current struct ethtool_cmd is insufficient\n-\t */\n-\tecmd->trace = readl(®s->TuneTrace);\n-\n-\tecmd->txcoal = readl(®s->TuneTxCoalTicks);\n-\tecmd->rxcoal = readl(®s->TuneRxCoalTicks);\n-#endif\n-\n-\tethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,\n-\t\t\t\t\t\tsupported);\n-\n-\treturn 0;\n-}\n-\n-static int ace_set_link_ksettings(struct net_device *dev,\n-\t\t\t\t const struct ethtool_link_ksettings *cmd)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tu32 link, speed;\n-\n-\tlink = readl(®s->GigLnkState);\n-\tif (link & LNK_1000MB)\n-\t\tspeed = SPEED_1000;\n-\telse {\n-\t\tlink = readl(®s->FastLnkState);\n-\t\tif (link & LNK_100MB)\n-\t\t\tspeed = SPEED_100;\n-\t\telse if (link & LNK_10MB)\n-\t\t\tspeed = SPEED_10;\n-\t\telse\n-\t\t\tspeed = SPEED_100;\n-\t}\n-\n-\tlink = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |\n-\t\tLNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;\n-\tif (!ACE_IS_TIGON_I(ap))\n-\t\tlink |= LNK_TX_FLOW_CTL_Y;\n-\tif (cmd->base.autoneg == AUTONEG_ENABLE)\n-\t\tlink |= LNK_NEGOTIATE;\n-\tif (cmd->base.speed != speed) {\n-\t\tlink &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);\n-\t\tswitch (cmd->base.speed) {\n-\t\tcase SPEED_1000:\n-\t\t\tlink |= LNK_1000MB;\n-\t\t\tbreak;\n-\t\tcase SPEED_100:\n-\t\t\tlink |= LNK_100MB;\n-\t\t\tbreak;\n-\t\tcase SPEED_10:\n-\t\t\tlink |= LNK_10MB;\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\n-\tif (cmd->base.duplex == DUPLEX_FULL)\n-\t\tlink |= LNK_FULL_DUPLEX;\n-\n-\tif (link != ap->link) {\n-\t\tstruct cmd cmd;\n-\t\tprintk(KERN_INFO \"%s: Renegotiating link state\\n\",\n-\t\t dev->name);\n-\n-\t\tap->link = link;\n-\t\twritel(link, ®s->TuneLink);\n-\t\tif (!ACE_IS_TIGON_I(ap))\n-\t\t\twritel(link, ®s->TuneFastLink);\n-\t\twmb();\n-\n-\t\tcmd.evt = C_LNK_NEGOTIATION;\n-\t\tcmd.code = 0;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t}\n-\treturn 0;\n-}\n-\n-static void ace_get_drvinfo(struct net_device *dev,\n-\t\t\t struct ethtool_drvinfo *info)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\n-\tstrscpy(info->driver, \"acenic\", sizeof(info->driver));\n-\tsnprintf(info->fw_version, sizeof(info->version), \"%i.%i.%i\",\n-\t\t ap->firmware_major, ap->firmware_minor, ap->firmware_fix);\n-\n-\tif (ap->pdev)\n-\t\tstrscpy(info->bus_info, pci_name(ap->pdev),\n-\t\t\tsizeof(info->bus_info));\n-\n-}\n-\n-/*\n- * Set the hardware MAC address.\n- */\n-static int ace_set_mac_addr(struct net_device *dev, void *p)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tstruct sockaddr *addr=p;\n-\tconst u8 *da;\n-\tstruct cmd cmd;\n-\n-\tif(netif_running(dev))\n-\t\treturn -EBUSY;\n-\n-\teth_hw_addr_set(dev, addr->sa_data);\n-\n-\tda = (const u8 *)dev->dev_addr;\n-\n-\twritel(da[0] << 8 | da[1], ®s->MacAddrHi);\n-\twritel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],\n-\t ®s->MacAddrLo);\n-\n-\tcmd.evt = C_SET_MAC_ADDR;\n-\tcmd.code = 0;\n-\tcmd.idx = 0;\n-\tace_issue_cmd(regs, &cmd);\n-\n-\treturn 0;\n-}\n-\n-\n-static void ace_set_multicast_list(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tstruct cmd cmd;\n-\n-\tif ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {\n-\t\tcmd.evt = C_SET_MULTICAST_MODE;\n-\t\tcmd.code = C_C_MCAST_ENABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t\tap->mcast_all = 1;\n-\t} else if (ap->mcast_all) {\n-\t\tcmd.evt = C_SET_MULTICAST_MODE;\n-\t\tcmd.code = C_C_MCAST_DISABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t\tap->mcast_all = 0;\n-\t}\n-\n-\tif ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {\n-\t\tcmd.evt = C_SET_PROMISC_MODE;\n-\t\tcmd.code = C_C_PROMISC_ENABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t\tap->promisc = 1;\n-\t}else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {\n-\t\tcmd.evt = C_SET_PROMISC_MODE;\n-\t\tcmd.code = C_C_PROMISC_DISABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t\tap->promisc = 0;\n-\t}\n-\n-\t/*\n-\t * For the time being multicast relies on the upper layers\n-\t * filtering it properly. The Firmware does not allow one to\n-\t * set the entire multicast list at a time and keeping track of\n-\t * it here is going to be messy.\n-\t */\n-\tif (!netdev_mc_empty(dev) && !ap->mcast_all) {\n-\t\tcmd.evt = C_SET_MULTICAST_MODE;\n-\t\tcmd.code = C_C_MCAST_ENABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t}else if (!ap->mcast_all) {\n-\t\tcmd.evt = C_SET_MULTICAST_MODE;\n-\t\tcmd.code = C_C_MCAST_DISABLE;\n-\t\tcmd.idx = 0;\n-\t\tace_issue_cmd(regs, &cmd);\n-\t}\n-}\n-\n-\n-static struct net_device_stats *ace_get_stats(struct net_device *dev)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_mac_stats __iomem *mac_stats =\n-\t\t(struct ace_mac_stats __iomem *)ap->regs->Stats;\n-\n-\tdev->stats.rx_missed_errors = readl(&mac_stats->drop_space);\n-\tdev->stats.multicast = readl(&mac_stats->kept_mc);\n-\tdev->stats.collisions = readl(&mac_stats->coll);\n-\n-\treturn &dev->stats;\n-}\n-\n-\n-static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src,\n-\t\t u32 dest, int size)\n-{\n-\tvoid __iomem *tdest;\n-\tshort tsize, i;\n-\n-\tif (size <= 0)\n-\t\treturn;\n-\n-\twhile (size > 0) {\n-\t\ttsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),\n-\t\t\t min_t(u32, size, ACE_WINDOW_SIZE));\n-\t\ttdest = (void __iomem *) ®s->Window +\n-\t\t\t(dest & (ACE_WINDOW_SIZE - 1));\n-\t\twritel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);\n-\t\tfor (i = 0; i < (tsize / 4); i++) {\n-\t\t\t/* Firmware is big-endian */\n-\t\t\twritel(be32_to_cpup(src), tdest);\n-\t\t\tsrc++;\n-\t\t\ttdest += 4;\n-\t\t\tdest += 4;\n-\t\t\tsize -= 4;\n-\t\t}\n-\t}\n-}\n-\n-\n-static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)\n-{\n-\tvoid __iomem *tdest;\n-\tshort tsize = 0, i;\n-\n-\tif (size <= 0)\n-\t\treturn;\n-\n-\twhile (size > 0) {\n-\t\ttsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),\n-\t\t\t\tmin_t(u32, size, ACE_WINDOW_SIZE));\n-\t\ttdest = (void __iomem *) ®s->Window +\n-\t\t\t(dest & (ACE_WINDOW_SIZE - 1));\n-\t\twritel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);\n-\n-\t\tfor (i = 0; i < (tsize / 4); i++) {\n-\t\t\twritel(0, tdest + i*4);\n-\t\t}\n-\n-\t\tdest += tsize;\n-\t\tsize -= tsize;\n-\t}\n-}\n-\n-\n-/*\n- * Download the firmware into the SRAM on the NIC\n- *\n- * This operation requires the NIC to be halted and is performed with\n- * interrupts disabled and with the spinlock hold.\n- */\n-static int ace_load_firmware(struct net_device *dev)\n-{\n-\tconst struct firmware *fw;\n-\tconst char *fw_name = \"acenic/tg2.bin\";\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tconst __be32 *fw_data;\n-\tu32 load_addr;\n-\tint ret;\n-\n-\tif (!(readl(®s->CpuCtrl) & CPU_HALTED)) {\n-\t\tprintk(KERN_ERR \"%s: trying to download firmware while the \"\n-\t\t \"CPU is running!\\n\", ap->name);\n-\t\treturn -EFAULT;\n-\t}\n-\n-\tif (ACE_IS_TIGON_I(ap))\n-\t\tfw_name = \"acenic/tg1.bin\";\n-\n-\tret = request_firmware(&fw, fw_name, &ap->pdev->dev);\n-\tif (ret) {\n-\t\tprintk(KERN_ERR \"%s: Failed to load firmware \\\"%s\\\"\\n\",\n-\t\t ap->name, fw_name);\n-\t\treturn ret;\n-\t}\n-\n-\tfw_data = (void *)fw->data;\n-\n-\t/* Firmware blob starts with version numbers, followed by\n-\t load and start address. Remainder is the blob to be loaded\n-\t contiguously from load address. We don't bother to represent\n-\t the BSS/SBSS sections any more, since we were clearing the\n-\t whole thing anyway. */\n-\tap->firmware_major = fw->data[0];\n-\tap->firmware_minor = fw->data[1];\n-\tap->firmware_fix = fw->data[2];\n-\n-\tap->firmware_start = be32_to_cpu(fw_data[1]);\n-\tif (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) {\n-\t\tprintk(KERN_ERR \"%s: bogus load address %08x in \\\"%s\\\"\\n\",\n-\t\t ap->name, ap->firmware_start, fw_name);\n-\t\tret = -EINVAL;\n-\t\tgoto out;\n-\t}\n-\n-\tload_addr = be32_to_cpu(fw_data[2]);\n-\tif (load_addr < 0x4000 || load_addr >= 0x80000) {\n-\t\tprintk(KERN_ERR \"%s: bogus load address %08x in \\\"%s\\\"\\n\",\n-\t\t ap->name, load_addr, fw_name);\n-\t\tret = -EINVAL;\n-\t\tgoto out;\n-\t}\n-\n-\t/*\n-\t * Do not try to clear more than 512KiB or we end up seeing\n-\t * funny things on NICs with only 512KiB SRAM\n-\t */\n-\tace_clear(regs, 0x2000, 0x80000-0x2000);\n-\tace_copy(regs, &fw_data[3], load_addr, fw->size-12);\n- out:\n-\trelease_firmware(fw);\n-\treturn ret;\n-}\n-\n-\n-/*\n- * The eeprom on the AceNIC is an Atmel i2c EEPROM.\n- *\n- * Accessing the EEPROM is `interesting' to say the least - don't read\n- * this code right after dinner.\n- *\n- * This is all about black magic and bit-banging the device .... I\n- * wonder in what hospital they have put the guy who designed the i2c\n- * specs.\n- *\n- * Oh yes, this is only the beginning!\n- *\n- * Thanks to Stevarino Webinski for helping tracking down the bugs in the\n- * code i2c readout code by beta testing all my hacks.\n- */\n-static void eeprom_start(struct ace_regs __iomem *regs)\n-{\n-\tu32 local;\n-\n-\treadl(®s->LocalCtrl);\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal = readl(®s->LocalCtrl);\n-\tlocal |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal |= EEPROM_CLK_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal &= ~EEPROM_DATA_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal &= ~EEPROM_CLK_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-}\n-\n-\n-static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic)\n-{\n-\tshort i;\n-\tu32 local;\n-\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal = readl(®s->LocalCtrl);\n-\tlocal &= ~EEPROM_DATA_OUT;\n-\tlocal |= EEPROM_WRITE_ENABLE;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\n-\tfor (i = 0; i < 8; i++, magic <<= 1) {\n-\t\tudelay(ACE_SHORT_DELAY);\n-\t\tif (magic & 0x80)\n-\t\t\tlocal |= EEPROM_DATA_OUT;\n-\t\telse\n-\t\t\tlocal &= ~EEPROM_DATA_OUT;\n-\t\twritel(local, ®s->LocalCtrl);\n-\t\treadl(®s->LocalCtrl);\n-\t\tmb();\n-\n-\t\tudelay(ACE_SHORT_DELAY);\n-\t\tlocal |= EEPROM_CLK_OUT;\n-\t\twritel(local, ®s->LocalCtrl);\n-\t\treadl(®s->LocalCtrl);\n-\t\tmb();\n-\t\tudelay(ACE_SHORT_DELAY);\n-\t\tlocal &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);\n-\t\twritel(local, ®s->LocalCtrl);\n-\t\treadl(®s->LocalCtrl);\n-\t\tmb();\n-\t}\n-}\n-\n-\n-static int eeprom_check_ack(struct ace_regs __iomem *regs)\n-{\n-\tint state;\n-\tu32 local;\n-\n-\tlocal = readl(®s->LocalCtrl);\n-\tlocal &= ~EEPROM_WRITE_ENABLE;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_LONG_DELAY);\n-\tlocal |= EEPROM_CLK_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\t/* sample data in middle of high clk */\n-\tstate = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;\n-\tudelay(ACE_SHORT_DELAY);\n-\tmb();\n-\twritel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\n-\treturn state;\n-}\n-\n-\n-static void eeprom_stop(struct ace_regs __iomem *regs)\n-{\n-\tu32 local;\n-\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal = readl(®s->LocalCtrl);\n-\tlocal |= EEPROM_WRITE_ENABLE;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal &= ~EEPROM_DATA_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal |= EEPROM_CLK_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\tlocal |= EEPROM_DATA_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_LONG_DELAY);\n-\tlocal &= ~EEPROM_CLK_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\tmb();\n-}\n-\n-\n-/*\n- * Read a whole byte from the EEPROM.\n- */\n-static int read_eeprom_byte(struct net_device *dev, unsigned long offset)\n-{\n-\tstruct ace_private *ap = netdev_priv(dev);\n-\tstruct ace_regs __iomem *regs = ap->regs;\n-\tunsigned long flags;\n-\tu32 local;\n-\tint result = 0;\n-\tshort i;\n-\n-\t/*\n-\t * Don't take interrupts on this CPU will bit banging\n-\t * the %#%#@$ I2C device\n-\t */\n-\tlocal_irq_save(flags);\n-\n-\teeprom_start(regs);\n-\n-\teeprom_prep(regs, EEPROM_WRITE_SELECT);\n-\tif (eeprom_check_ack(regs)) {\n-\t\tlocal_irq_restore(flags);\n-\t\tprintk(KERN_ERR \"%s: Unable to sync eeprom\\n\", ap->name);\n-\t\tresult = -EIO;\n-\t\tgoto eeprom_read_error;\n-\t}\n-\n-\teeprom_prep(regs, (offset >> 8) & 0xff);\n-\tif (eeprom_check_ack(regs)) {\n-\t\tlocal_irq_restore(flags);\n-\t\tprintk(KERN_ERR \"%s: Unable to set address byte 0\\n\",\n-\t\t ap->name);\n-\t\tresult = -EIO;\n-\t\tgoto eeprom_read_error;\n-\t}\n-\n-\teeprom_prep(regs, offset & 0xff);\n-\tif (eeprom_check_ack(regs)) {\n-\t\tlocal_irq_restore(flags);\n-\t\tprintk(KERN_ERR \"%s: Unable to set address byte 1\\n\",\n-\t\t ap->name);\n-\t\tresult = -EIO;\n-\t\tgoto eeprom_read_error;\n-\t}\n-\n-\teeprom_start(regs);\n-\teeprom_prep(regs, EEPROM_READ_SELECT);\n-\tif (eeprom_check_ack(regs)) {\n-\t\tlocal_irq_restore(flags);\n-\t\tprintk(KERN_ERR \"%s: Unable to set READ_SELECT\\n\",\n-\t\t ap->name);\n-\t\tresult = -EIO;\n-\t\tgoto eeprom_read_error;\n-\t}\n-\n-\tfor (i = 0; i < 8; i++) {\n-\t\tlocal = readl(®s->LocalCtrl);\n-\t\tlocal &= ~EEPROM_WRITE_ENABLE;\n-\t\twritel(local, ®s->LocalCtrl);\n-\t\treadl(®s->LocalCtrl);\n-\t\tudelay(ACE_LONG_DELAY);\n-\t\tmb();\n-\t\tlocal |= EEPROM_CLK_OUT;\n-\t\twritel(local, ®s->LocalCtrl);\n-\t\treadl(®s->LocalCtrl);\n-\t\tmb();\n-\t\tudelay(ACE_SHORT_DELAY);\n-\t\t/* sample data mid high clk */\n-\t\tresult = (result << 1) |\n-\t\t\t((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);\n-\t\tudelay(ACE_SHORT_DELAY);\n-\t\tmb();\n-\t\tlocal = readl(®s->LocalCtrl);\n-\t\tlocal &= ~EEPROM_CLK_OUT;\n-\t\twritel(local, ®s->LocalCtrl);\n-\t\treadl(®s->LocalCtrl);\n-\t\tudelay(ACE_SHORT_DELAY);\n-\t\tmb();\n-\t\tif (i == 7) {\n-\t\t\tlocal |= EEPROM_WRITE_ENABLE;\n-\t\t\twritel(local, ®s->LocalCtrl);\n-\t\t\treadl(®s->LocalCtrl);\n-\t\t\tmb();\n-\t\t\tudelay(ACE_SHORT_DELAY);\n-\t\t}\n-\t}\n-\n-\tlocal |= EEPROM_DATA_OUT;\n-\twritel(local, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\twritel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tudelay(ACE_LONG_DELAY);\n-\twritel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);\n-\treadl(®s->LocalCtrl);\n-\tmb();\n-\tudelay(ACE_SHORT_DELAY);\n-\teeprom_stop(regs);\n-\n-\tlocal_irq_restore(flags);\n- out:\n-\treturn result;\n-\n- eeprom_read_error:\n-\tprintk(KERN_ERR \"%s: Unable to read eeprom byte 0x%02lx\\n\",\n-\t ap->name, offset);\n-\tgoto out;\n-}\n-\n-module_pci_driver(acenic_pci_driver);\ndiff --git a/arch/loongarch/configs/loongson32_defconfig b/arch/loongarch/configs/loongson32_defconfig\nindex 276b1577e0be..37e5eada5a67 100644\n--- a/arch/loongarch/configs/loongson32_defconfig\n+++ b/arch/loongarch/configs/loongson32_defconfig\n@@ -571,7 +571,6 @@ CONFIG_VIRTIO_NET=m\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n # CONFIG_NET_VENDOR_AGERE is not set\n # CONFIG_NET_VENDOR_ALACRITECH is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMAZON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_AQUANTIA is not set\ndiff --git a/arch/loongarch/configs/loongson64_defconfig b/arch/loongarch/configs/loongson64_defconfig\nindex a14db1a95e7e..7648f6c73929 100644\n--- a/arch/loongarch/configs/loongson64_defconfig\n+++ b/arch/loongarch/configs/loongson64_defconfig\n@@ -587,7 +587,6 @@ CONFIG_VIRTIO_NET=m\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n # CONFIG_NET_VENDOR_AGERE is not set\n # CONFIG_NET_VENDOR_ALACRITECH is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMAZON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_AQUANTIA is not set\ndiff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig\nindex 68c363366bce..64da32b570aa 100644\n--- a/arch/mips/configs/cavium_octeon_defconfig\n+++ b/arch/mips/configs/cavium_octeon_defconfig\n@@ -60,7 +60,6 @@ CONFIG_PATA_OCTEON_CF=y\n CONFIG_NETDEVICES=y\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/mips/configs/loongson2k_defconfig b/arch/mips/configs/loongson2k_defconfig\nindex a5c50b63d478..ca534a6b66de 100644\n--- a/arch/mips/configs/loongson2k_defconfig\n+++ b/arch/mips/configs/loongson2k_defconfig\n@@ -137,7 +137,6 @@ CONFIG_NETDEVICES=y\n CONFIG_TUN=m\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_ARC is not set\n # CONFIG_NET_VENDOR_ATHEROS is not set\ndiff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig\nindex 575aaf242361..12cb1a6a1360 100644\n--- a/arch/mips/configs/loongson3_defconfig\n+++ b/arch/mips/configs/loongson3_defconfig\n@@ -184,7 +184,6 @@ CONFIG_VETH=m\n CONFIG_VIRTIO_NET=m\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_ARC is not set\n # CONFIG_NET_VENDOR_ATHEROS is not set\ndiff --git a/arch/mips/configs/malta_qemu_32r6_defconfig b/arch/mips/configs/malta_qemu_32r6_defconfig\nindex accb471a1d93..dafc9a716e85 100644\n--- a/arch/mips/configs/malta_qemu_32r6_defconfig\n+++ b/arch/mips/configs/malta_qemu_32r6_defconfig\n@@ -85,7 +85,6 @@ CONFIG_ATA_GENERIC=y\n CONFIG_NETDEVICES=y\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n CONFIG_PCNET32=y\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/mips/configs/maltaaprp_defconfig b/arch/mips/configs/maltaaprp_defconfig\nindex 6bda67c5f68f..7361bca6a405 100644\n--- a/arch/mips/configs/maltaaprp_defconfig\n+++ b/arch/mips/configs/maltaaprp_defconfig\n@@ -87,7 +87,6 @@ CONFIG_ATA_GENERIC=y\n CONFIG_NETDEVICES=y\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n CONFIG_PCNET32=y\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/mips/configs/maltasmvp_defconfig b/arch/mips/configs/maltasmvp_defconfig\nindex e4082537f80f..c848a1bfca5c 100644\n--- a/arch/mips/configs/maltasmvp_defconfig\n+++ b/arch/mips/configs/maltasmvp_defconfig\n@@ -86,7 +86,6 @@ CONFIG_ATA_PIIX=y\n CONFIG_NETDEVICES=y\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n CONFIG_PCNET32=y\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/mips/configs/maltasmvp_eva_defconfig b/arch/mips/configs/maltasmvp_eva_defconfig\nindex 58f5af45fa98..905248e01b95 100644\n--- a/arch/mips/configs/maltasmvp_eva_defconfig\n+++ b/arch/mips/configs/maltasmvp_eva_defconfig\n@@ -89,7 +89,6 @@ CONFIG_ATA_GENERIC=y\n CONFIG_NETDEVICES=y\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n CONFIG_PCNET32=y\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/mips/configs/maltaup_defconfig b/arch/mips/configs/maltaup_defconfig\nindex 9bfef7de0d1c..b9bbe02f3595 100644\n--- a/arch/mips/configs/maltaup_defconfig\n+++ b/arch/mips/configs/maltaup_defconfig\n@@ -86,7 +86,6 @@ CONFIG_ATA_GENERIC=y\n CONFIG_NETDEVICES=y\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n CONFIG_PCNET32=y\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig\nindex 77050ae3945f..2428a6a72747 100644\n--- a/arch/mips/configs/mtx1_defconfig\n+++ b/arch/mips/configs/mtx1_defconfig\n@@ -257,7 +257,6 @@ CONFIG_PCMCIA_3C589=m\n CONFIG_VORTEX=m\n CONFIG_TYPHOON=m\n CONFIG_ADAPTEC_STARFIRE=m\n-CONFIG_ACENIC=m\n CONFIG_AMD8111_ETH=m\n CONFIG_PCNET32=m\n CONFIG_PCMCIA_NMCLAN=m\ndiff --git a/arch/parisc/configs/generic-32bit_defconfig b/arch/parisc/configs/generic-32bit_defconfig\nindex 5444ce6405f3..ad2fb69184f3 100644\n--- a/arch/parisc/configs/generic-32bit_defconfig\n+++ b/arch/parisc/configs/generic-32bit_defconfig\n@@ -78,7 +78,6 @@ CONFIG_DUMMY=m\n CONFIG_TUN=m\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/parisc/configs/generic-64bit_defconfig b/arch/parisc/configs/generic-64bit_defconfig\nindex ce91f9d1fdbf..b21287a9250c 100644\n--- a/arch/parisc/configs/generic-64bit_defconfig\n+++ b/arch/parisc/configs/generic-64bit_defconfig\n@@ -97,7 +97,6 @@ CONFIG_NETCONSOLE_DYNAMIC=y\n CONFIG_TUN=y\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_ATHEROS is not set\n # CONFIG_NET_VENDOR_BROADCOM is not set\ndiff --git a/arch/powerpc/configs/44x/akebono_defconfig b/arch/powerpc/configs/44x/akebono_defconfig\nindex 02e88648a2e6..11ad5ed3cc90 100644\n--- a/arch/powerpc/configs/44x/akebono_defconfig\n+++ b/arch/powerpc/configs/44x/akebono_defconfig\n@@ -47,7 +47,6 @@ CONFIG_SATA_AHCI_PLATFORM=y\n # CONFIG_ATA_SFF is not set\n # CONFIG_NET_VENDOR_3COM is not set\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_ARC is not set\n # CONFIG_NET_VENDOR_ATHEROS is not set\ndiff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig\nindex 428f17b45513..4247d9a30eba 100644\n--- a/arch/powerpc/configs/g5_defconfig\n+++ b/arch/powerpc/configs/g5_defconfig\n@@ -92,8 +92,6 @@ CONFIG_NETDEVICES=y\n CONFIG_BONDING=m\n CONFIG_DUMMY=m\n CONFIG_TUN=m\n-CONFIG_ACENIC=m\n-CONFIG_ACENIC_OMIT_TIGON_I=y\n CONFIG_TIGON3=y\n CONFIG_E1000=y\n CONFIG_SUNGEM=y\ndiff --git a/arch/powerpc/configs/powernv_defconfig b/arch/powerpc/configs/powernv_defconfig\nindex 9ac746cfb4be..ce72c6d22ca2 100644\n--- a/arch/powerpc/configs/powernv_defconfig\n+++ b/arch/powerpc/configs/powernv_defconfig\n@@ -158,8 +158,6 @@ CONFIG_NETCONSOLE=m\n CONFIG_TUN=m\n CONFIG_VETH=m\n CONFIG_VORTEX=m\n-CONFIG_ACENIC=m\n-CONFIG_ACENIC_OMIT_TIGON_I=y\n CONFIG_PCNET32=m\n CONFIG_TIGON3=y\n CONFIG_BNX2X=m\ndiff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig\nindex 2b0720f2753b..7603af319385 100644\n--- a/arch/powerpc/configs/ppc64_defconfig\n+++ b/arch/powerpc/configs/ppc64_defconfig\n@@ -204,8 +204,6 @@ CONFIG_NETCONSOLE=y\n CONFIG_TUN=m\n CONFIG_VIRTIO_NET=m\n CONFIG_VORTEX=m\n-CONFIG_ACENIC=m\n-CONFIG_ACENIC_OMIT_TIGON_I=y\n CONFIG_PCNET32=m\n CONFIG_TIGON3=y\n CONFIG_BNX2X=m\ndiff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig\nindex 90247b2a0ab0..e44c65693b51 100644\n--- a/arch/powerpc/configs/ppc64e_defconfig\n+++ b/arch/powerpc/configs/ppc64e_defconfig\n@@ -96,8 +96,6 @@ CONFIG_DUMMY=m\n CONFIG_NETCONSOLE=y\n CONFIG_TUN=m\n CONFIG_VORTEX=y\n-CONFIG_ACENIC=y\n-CONFIG_ACENIC_OMIT_TIGON_I=y\n CONFIG_PCNET32=y\n CONFIG_TIGON3=y\n CONFIG_E100=y\ndiff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig\nindex 3c08f46f3d41..b70307b70af0 100644\n--- a/arch/powerpc/configs/ppc6xx_defconfig\n+++ b/arch/powerpc/configs/ppc6xx_defconfig\n@@ -410,7 +410,6 @@ CONFIG_PCMCIA_3C589=m\n CONFIG_VORTEX=m\n CONFIG_TYPHOON=m\n CONFIG_ADAPTEC_STARFIRE=m\n-CONFIG_ACENIC=m\n CONFIG_AMD8111_ETH=m\n CONFIG_PCNET32=m\n CONFIG_PCMCIA_NMCLAN=m\ndiff --git a/arch/powerpc/configs/skiroot_defconfig b/arch/powerpc/configs/skiroot_defconfig\nindex 86c74146824a..ff1bed4b6d2c 100644\n--- a/arch/powerpc/configs/skiroot_defconfig\n+++ b/arch/powerpc/configs/skiroot_defconfig\n@@ -125,8 +125,6 @@ CONFIG_DM_MULTIPATH=m\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n # CONFIG_NET_VENDOR_AGERE is not set\n # CONFIG_NET_VENDOR_ALACRITECH is not set\n-CONFIG_ACENIC=m\n-CONFIG_ACENIC_OMIT_TIGON_I=y\n # CONFIG_NET_VENDOR_AMAZON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_AQUANTIA is not set\ndiff --git a/arch/s390/configs/debug_defconfig b/arch/s390/configs/debug_defconfig\nindex 98fd0a2f51c6..2a94abcabd72 100644\n--- a/arch/s390/configs/debug_defconfig\n+++ b/arch/s390/configs/debug_defconfig\n@@ -524,7 +524,6 @@ CONFIG_NLMON=m\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n # CONFIG_NET_VENDOR_AGERE is not set\n # CONFIG_NET_VENDOR_ALACRITECH is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMAZON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_AQUANTIA is not set\ndiff --git a/arch/s390/configs/defconfig b/arch/s390/configs/defconfig\nindex 0f4cedcab3ce..763fc7db101f 100644\n--- a/arch/s390/configs/defconfig\n+++ b/arch/s390/configs/defconfig\n@@ -514,7 +514,6 @@ CONFIG_NLMON=m\n # CONFIG_NET_VENDOR_ADAPTEC is not set\n # CONFIG_NET_VENDOR_AGERE is not set\n # CONFIG_NET_VENDOR_ALACRITECH is not set\n-# CONFIG_NET_VENDOR_ALTEON is not set\n # CONFIG_NET_VENDOR_AMAZON is not set\n # CONFIG_NET_VENDOR_AMD is not set\n # CONFIG_NET_VENDOR_AQUANTIA is not set\n", "prefixes": [ "net-next", "v2" ] }