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{ "id": 2237923, "url": "http://patchwork.ozlabs.org/api/1.1/covers/2237923/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/cover/bmm.hihq3sdm4a.gcc.gcc-TEST.karmea01.158.1.0@forge-stage.sourceware.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<bmm.hihq3sdm4a.gcc.gcc-TEST.karmea01.158.1.0@forge-stage.sourceware.org>", "date": "2026-05-13T16:04:10", "name": "[v1,0/6,RFC] aarch64: port NEON intrinsics to pragma-based framework", "submitter": { "id": 92188, "url": "http://patchwork.ozlabs.org/api/1.1/people/92188/?format=api", "name": "Karl Meakin via Sourceware Forge", "email": "forge-bot+karmea01@forge-stage.sourceware.org" }, "mbox": "http://patchwork.ozlabs.org/project/gcc/cover/bmm.hihq3sdm4a.gcc.gcc-TEST.karmea01.158.1.0@forge-stage.sourceware.org/mbox/", "series": [ { "id": 504183, "url": "http://patchwork.ozlabs.org/api/1.1/series/504183/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=504183", "date": "2026-05-13T16:04:10", "name": "aarch64: port NEON intrinsics to pragma-based framework", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/504183/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2237923/comments/", "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n 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[38.145.34.39])\n by sourceware.org (Postfix) with ESMTPS id 6E2B44BB8F50\n for <gcc-patches@gcc.gnu.org>; Wed, 13 May 2026 16:05:10 +0000 (GMT)", "from forge-stage.sourceware.org (localhost [IPv6:::1])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256)\n (No client certificate requested)\n by forge-stage.sourceware.org (Postfix) with ESMTPS id 44C2E42D14;\n Wed, 13 May 2026 16:05:10 +0000 (UTC)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org B82654BBC0C3", "OpenDKIM Filter v2.11.0 sourceware.org 6E2B44BB8F50" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 6E2B44BB8F50", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 6E2B44BB8F50", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1778688310; cv=none;\n b=mGykbx/x8rMeiuZMdZ7fW986zzmZA2L0Smwuf6rqUIu06L4h63mvue+DstPvqNiThb5f198Bp5LOgn07PYT7/6s82ECUZ84OgKdo1eKrg0XzCvKROJGErsu07h1vx385Msg7HLJUiK9HsyrbgOE9QEZiGBks/KfcxyAO1Yvcolg=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1778688310; c=relaxed/simple;\n bh=XADK8uzy9X/XEpDZlm8PEFdSUfMHRFqUCRzSJqAFA/k=;\n h=From:Date:Subject:To:Message-ID;\n b=ZaPJnTEIQkvUYpz+kDM/Bm2PbrJa8DSRjfkQdr9VbwIEEnLHWUO1svCquXW9Z9bzHM7R+FSvQWcnoSgBn7POwBKQshCKHrPWOHksIsUhzScd80Pbufrk2K5Rpte0EhSVX4CJAIo5Lz/tAUA7TBnbqM65JSejO3ffFbSryGUxBME=", "ARC-Authentication-Results": "i=1; sourceware.org", "From": "Karl Meakin via Sourceware Forge\n <forge-bot+karmea01@forge-stage.sourceware.org>", "Date": "Wed, 13 May 2026 16:04:10 +0000", "Subject": "[PATCH v1 0/6] [RFC] aarch64: port NEON intrinsics to pragma-based\n framework", "To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>", "Cc": "ktkachov@nvidia.com, richard.earnshaw@arm.com, tamar.christina@arm.com,\n karl.meakin@arm.com", "Message-ID": "\n <bmm.hihq3sdm4a.gcc.gcc-TEST.karmea01.158.1.0@forge-stage.sourceware.org>", "X-Mailer": "batrachomyomachia", "X-Pull-Request-Organization": "gcc", "X-Pull-Request-Repository": "gcc-TEST", "X-Pull-Request": "https://forge.sourceware.org/gcc/gcc-TEST/pulls/158", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Reply-To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n ktkachov@nvidia.com, richard.earnshaw@arm.com, tamar.christina@arm.com,\n karl.meakin@arm.com, karmea01@sourceware.org", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Hi gcc-patches mailing list,\nKarl Meakin via Sourceware Forge <forge-bot+karmea01@forge-stage.sourceware.org> has requested that the following forgejo pull request\nbe published on the mailing list.\n\nCreated on: 2026-05-13 15:39:36+00:00\nLatest update: 2026-05-13 16:04:14+00:00\nChanges: 120 changed files, 20490 additions, 16808 deletions\nHead revision: karmea01/gcc-TEST ref dsg/karmea01/neon-port commit bbc2b70b1d7614ca85791fad04d28ef127250c8c\nBase revision: gcc/gcc-TEST ref trunk commit ecfbd7d1b92886024ac6e94000425b3cd0bd0194 r17-500-gecfbd7d1b92886\nMerge base: ecfbd7d1b92886024ac6e94000425b3cd0bd0194\nFull diff url: https://forge.sourceware.org/gcc/gcc-TEST/pulls/158.diff\nDiscussion: https://forge.sourceware.org/gcc/gcc-TEST/pulls/158\nRequested Reviewers:\n\nThis patch is a proof of concept patch which ports a few NEON intrinsics (intrinsics defined in `arm_neon.h`) to the \"pragma-based\" framework used by SVE/SME intrinsics.\nIf successful, I will follow up with further patches porting the rest.\n\ntested with `make check`\n\nchangelog:\n* v1: Initial revision\n\n\nChanged files:\n- A: gcc/config/aarch64/aarch64-acle-builtins.h\n- A: gcc/config/aarch64/aarch64-neon-builtins-base.cc\n- A: gcc/config/aarch64/aarch64-neon-builtins-base.def\n- A: gcc/config/aarch64/aarch64-neon-builtins-base.h\n- A: gcc/config/aarch64/aarch64-neon-builtins-functions.h\n- A: gcc/config/aarch64/aarch64-neon-builtins-shapes.cc\n- A: gcc/config/aarch64/aarch64-neon-builtins-shapes.h\n- A: gcc/config/aarch64/aarch64-neon-builtins.cc\n- A: gcc/config/aarch64/aarch64-neon-builtins.def\n- A: gcc/config/aarch64/aarch64-neon-builtins.h\n- A: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_indices.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/aarch64-neon.exp\n- A: gcc/testsuite/gcc.target/aarch64/neon/arm_neon_test.h\n- A: gcc/testsuite/gcc.target/aarch64/neon/vadd.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vand.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vbcax.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vbic.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vbsl.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vcls.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vclz.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vcnt.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vcombine.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vcopy_lane.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vcreate.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vdup.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vdup_lane.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/veor.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/veor3.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vext.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vget_high.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vget_lane.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vget_low.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vmov_n.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vmvn.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vorn.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vorr.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vrax1.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vrbit.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vreinterpret.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vrev.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vset_lane.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vtrn.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vuzp.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vxar.c\n- A: gcc/testsuite/gcc.target/aarch64/neon/vzip.c\n- A: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_indices.c\n- D: gcc/config/aarch64/aarch64-sve-builtins.h\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f32_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f64_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p8_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s32_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s64_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s8_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u32_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u64_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u8_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f32_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f64_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p8_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s32_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s64_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s8_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u16_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c\n- D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c\n- M: gcc/config.gcc\n- M: gcc/config/aarch64/aarch64-builtins.cc\n- M: gcc/config/aarch64/aarch64-builtins.h\n- M: gcc/config/aarch64/aarch64-c.cc\n- M: gcc/config/aarch64/aarch64-protos.h\n- M: gcc/config/aarch64/aarch64-simd-builtins.def\n- M: gcc/config/aarch64/aarch64-simd-pragma-builtins.def\n- M: gcc/config/aarch64/aarch64-simd.md\n- M: gcc/config/aarch64/aarch64-sve-builtins-base.cc\n- M: gcc/config/aarch64/aarch64-sve-builtins-base.h\n- M: gcc/config/aarch64/aarch64-sve-builtins-functions.h\n- M: gcc/config/aarch64/aarch64-sve-builtins-shapes.cc\n- M: gcc/config/aarch64/aarch64-sve-builtins-shapes.h\n- M: gcc/config/aarch64/aarch64-sve-builtins-sme.cc\n- M: gcc/config/aarch64/aarch64-sve-builtins-sme.h\n- M: gcc/config/aarch64/aarch64-sve-builtins-sve2.cc\n- M: gcc/config/aarch64/aarch64-sve-builtins-sve2.h\n- M: gcc/config/aarch64/aarch64-sve-builtins.cc\n- M: gcc/config/aarch64/aarch64-sve-builtins.def\n- M: gcc/config/aarch64/aarch64.cc\n- M: gcc/config/aarch64/aarch64.md\n- M: gcc/config/aarch64/arm_neon.h\n- M: gcc/config/aarch64/iterators.md\n- M: gcc/config/aarch64/t-aarch64\n- M: gcc/testsuite/g++.target/aarch64/lane-bound-1.C\n- M: gcc/testsuite/g++.target/aarch64/pr103147-6.C\n- M: gcc/testsuite/g++.target/aarch64/pr117048.C\n- M: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c\n- M: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c\n- M: gcc/testsuite/gcc.target/aarch64/lane-bound-3.c\n- M: gcc/testsuite/gcc.target/aarch64/pr103147-6.c\n- M: gcc/testsuite/gcc.target/aarch64/pr113573.c\n- M: gcc/testsuite/gcc.target/aarch64/sha3_1.c\n- M: gcc/testsuite/gcc.target/aarch64/sha3_2.c\n- M: gcc/testsuite/gcc.target/aarch64/sha3_3.c\n- M: gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_6.c\n- M: gcc/testsuite/gcc.target/aarch64/simd/mf8_data_2.c\n- M: gcc/testsuite/gcc.target/aarch64/simd/vset_lane_s16_const_1.c\n- M: gcc/testsuite/gcc.target/aarch64/sme/inlining_10.c\n- M: gcc/testsuite/gcc.target/aarch64/sme/inlining_11.c\n- M: gcc/testsuite/gcc.target/aarch64/target_attr_10.c\n- M: gcc/testsuite/gcc.target/aarch64/vmov_n_1.c\n\n\nKarl Meakin (6):\n aarch64: Rename `aarch64-sve-builtins.h` to `aarch64-acle-builtins.h`\n aarch64: Port NEON add intrinsics to pragma-based framework\n aarch64: Port NEON vector manipulation intrinsics to pragma-based\n framework\n aarch64: Port NEON bit manipulation intrinsics to pragma-based\n framework\n aarch64: Port NEON permutation intrinsics to pragma-based framework\n aarch64: Port NEON reinterpret intrinsics to pragma-based framework\n\n gcc/config.gcc | 49 +-\n ...sve-builtins.h => aarch64-acle-builtins.h} | 1000 +-\n gcc/config/aarch64/aarch64-builtins.cc | 548 +-\n gcc/config/aarch64/aarch64-builtins.h | 1 +\n gcc/config/aarch64/aarch64-c.cc | 17 +-\n .../aarch64/aarch64-neon-builtins-base.cc | 770 +\n .../aarch64/aarch64-neon-builtins-base.def | 147 +\n .../aarch64/aarch64-neon-builtins-base.h | 29 +\n .../aarch64/aarch64-neon-builtins-functions.h | 29 +\n .../aarch64/aarch64-neon-builtins-shapes.cc | 132 +\n .../aarch64/aarch64-neon-builtins-shapes.h | 29 +\n gcc/config/aarch64/aarch64-neon-builtins.cc | 86 +\n gcc/config/aarch64/aarch64-neon-builtins.def | 40 +\n gcc/config/aarch64/aarch64-neon-builtins.h | 28 +\n gcc/config/aarch64/aarch64-protos.h | 4 +-\n gcc/config/aarch64/aarch64-simd-builtins.def | 36 -\n .../aarch64/aarch64-simd-pragma-builtins.def | 105 -\n gcc/config/aarch64/aarch64-simd.md | 13 +-\n .../aarch64/aarch64-sve-builtins-base.cc | 16 +-\n .../aarch64/aarch64-sve-builtins-base.h | 2 +-\n .../aarch64/aarch64-sve-builtins-functions.h | 2 +-\n .../aarch64/aarch64-sve-builtins-shapes.cc | 47 +-\n .../aarch64/aarch64-sve-builtins-shapes.h | 2 +-\n .../aarch64/aarch64-sve-builtins-sme.cc | 8 +-\n gcc/config/aarch64/aarch64-sve-builtins-sme.h | 2 +-\n .../aarch64/aarch64-sve-builtins-sve2.cc | 8 +-\n .../aarch64/aarch64-sve-builtins-sve2.h | 2 +-\n gcc/config/aarch64/aarch64-sve-builtins.cc | 917 +-\n gcc/config/aarch64/aarch64-sve-builtins.def | 11 +\n gcc/config/aarch64/aarch64.cc | 40 +-\n gcc/config/aarch64/aarch64.md | 6 -\n gcc/config/aarch64/arm_neon.h | 22960 ++++++----------\n gcc/config/aarch64/iterators.md | 2 +-\n gcc/config/aarch64/t-aarch64 | 56 +-\n .../g++.target/aarch64/lane-bound-1.C | 2 +-\n gcc/testsuite/g++.target/aarch64/pr103147-6.C | 1 +\n gcc/testsuite/g++.target/aarch64/pr117048.C | 2 +-\n .../aarch64/advsimd-intrinsics/bf16_dup.c | 6 +-\n .../bf16_vect_copy_lane_1.c | 3 +-\n .../vcopy_lane_bf16_indices_1.c | 18 -\n .../vcopy_lane_bf16_indices_2.c | 18 -\n .../advsimd-intrinsics/vcopy_lane_indices.c | 68 +\n .../vcopy_laneq_bf16_indices_1.c | 17 -\n .../vcopy_laneq_bf16_indices_2.c | 17 -\n .../vcopyq_lane_bf16_indices_1.c | 17 -\n .../vcopyq_lane_bf16_indices_2.c | 17 -\n .../vcopyq_laneq_bf16_indices_1.c | 17 -\n .../vcopyq_laneq_bf16_indices_2.c | 17 -\n .../gcc.target/aarch64/lane-bound-3.c | 4 +-\n .../gcc.target/aarch64/neon/aarch64-neon.exp | 39 +\n .../gcc.target/aarch64/neon/arm_neon_test.h | 24 +\n gcc/testsuite/gcc.target/aarch64/neon/vadd.c | 203 +\n gcc/testsuite/gcc.target/aarch64/neon/vand.c | 116 +\n gcc/testsuite/gcc.target/aarch64/neon/vbcax.c | 60 +\n gcc/testsuite/gcc.target/aarch64/neon/vbic.c | 116 +\n gcc/testsuite/gcc.target/aarch64/neon/vbsl.c | 214 +\n gcc/testsuite/gcc.target/aarch64/neon/vcls.c | 88 +\n gcc/testsuite/gcc.target/aarch64/neon/vclz.c | 88 +\n gcc/testsuite/gcc.target/aarch64/neon/vcnt.c | 25 +\n .../gcc.target/aarch64/neon/vcombine.c | 120 +\n .../gcc.target/aarch64/neon/vcopy_lane.c | 428 +\n .../gcc.target/aarch64/neon/vcreate.c | 119 +\n gcc/testsuite/gcc.target/aarch64/neon/vdup.c | 226 +\n .../gcc.target/aarch64/neon/vdup_lane.c | 647 +\n gcc/testsuite/gcc.target/aarch64/neon/veor.c | 116 +\n gcc/testsuite/gcc.target/aarch64/neon/veor3.c | 60 +\n gcc/testsuite/gcc.target/aarch64/neon/vext.c | 216 +\n .../gcc.target/aarch64/neon/vget_high.c | 116 +\n .../gcc.target/aarch64/neon/vget_lane.c | 232 +\n .../gcc.target/aarch64/neon/vget_low.c | 100 +\n .../gcc.target/aarch64/neon/vmov_n.c | 212 +\n gcc/testsuite/gcc.target/aarch64/neon/vmvn.c | 102 +\n gcc/testsuite/gcc.target/aarch64/neon/vorn.c | 116 +\n gcc/testsuite/gcc.target/aarch64/neon/vorr.c | 116 +\n gcc/testsuite/gcc.target/aarch64/neon/vrax1.c | 11 +\n gcc/testsuite/gcc.target/aarch64/neon/vrbit.c | 46 +\n .../gcc.target/aarch64/neon/vreinterpret.c | 3143 +++\n gcc/testsuite/gcc.target/aarch64/neon/vrev.c | 311 +\n .../gcc.target/aarch64/neon/vset_lane.c | 234 +\n gcc/testsuite/gcc.target/aarch64/neon/vtrn.c | 566 +\n gcc/testsuite/gcc.target/aarch64/neon/vuzp.c | 566 +\n gcc/testsuite/gcc.target/aarch64/neon/vxar.c | 25 +\n gcc/testsuite/gcc.target/aarch64/neon/vzip.c | 559 +\n gcc/testsuite/gcc.target/aarch64/pr103147-6.c | 1 +\n gcc/testsuite/gcc.target/aarch64/pr113573.c | 62 +-\n gcc/testsuite/gcc.target/aarch64/sha3_1.c | 2 +-\n gcc/testsuite/gcc.target/aarch64/sha3_2.c | 2 +-\n gcc/testsuite/gcc.target/aarch64/sha3_3.c | 2 +-\n .../aarch64/simd/fold_to_highpart_6.c | 24 +-\n .../gcc.target/aarch64/simd/mf8_data_2.c | 1 -\n .../aarch64/simd/vget_lane_f32_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_f64_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_indices.c | 46 +\n .../aarch64/simd/vget_lane_p16_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_p8_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_s16_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_s32_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_s64_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_s8_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_u16_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_u32_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_u64_indices_1.c | 17 -\n .../aarch64/simd/vget_lane_u8_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_f32_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_f64_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_p16_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_p8_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_s16_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_s32_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_s64_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_s8_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_u16_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_u32_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_u64_indices_1.c | 17 -\n .../aarch64/simd/vgetq_lane_u8_indices_1.c | 17 -\n .../aarch64/simd/vset_lane_s16_const_1.c | 2 +-\n .../gcc.target/aarch64/sme/inlining_10.c | 7 -\n .../gcc.target/aarch64/sme/inlining_11.c | 7 -\n .../gcc.target/aarch64/target_attr_10.c | 4 +-\n gcc/testsuite/gcc.target/aarch64/vmov_n_1.c | 2 +-\n 120 files changed, 20490 insertions(+), 16808 deletions(-)\n rename gcc/config/aarch64/{aarch64-sve-builtins.h => aarch64-acle-builtins.h} (59%)\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.cc\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.def\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.h\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-functions.h\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-shapes.cc\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-shapes.h\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins.cc\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins.def\n create mode 100644 gcc/config/aarch64/aarch64-neon-builtins.h\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_indices.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/aarch64-neon.exp\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/arm_neon_test.h\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vadd.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vand.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbcax.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbic.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbsl.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcls.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vclz.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcnt.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcombine.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcopy_lane.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcreate.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vdup.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vdup_lane.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/veor.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/veor3.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vext.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_high.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_lane.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_low.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vmov_n.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vmvn.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vorn.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vorr.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrax1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrbit.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vreinterpret.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrev.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vset_lane.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vtrn.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vuzp.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vxar.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vzip.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f32_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f64_indices_1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_indices.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p8_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s32_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s64_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s8_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u32_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u64_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u8_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f32_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f64_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p8_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s32_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s64_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s8_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u16_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c\n delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c" }