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{ "id": 2232502, "url": "http://patchwork.ozlabs.org/api/1.1/covers/2232502/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260504-feat-mte4-v5-0-232a648e63c6@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260504-feat-mte4-v5-0-232a648e63c6@gmail.com>", "date": "2026-05-04T15:50:33", "name": "[v5,00/15] target/arm: add support for MTE4", "submitter": { "id": 91863, "url": "http://patchwork.ozlabs.org/api/1.1/people/91863/?format=api", "name": "Gabriel Brookman", "email": "brookmangabriel@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260504-feat-mte4-v5-0-232a648e63c6@gmail.com/mbox/", "series": [ { "id": 502688, "url": "http://patchwork.ozlabs.org/api/1.1/series/502688/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502688", "date": "2026-05-04T15:50:33", "name": "target/arm: add support for MTE4", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/502688/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2232502/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=a9CuE2IV;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "X-B4-Tracking": "v=1; b=H4sIAAAAAAAC/13P3W7CMAwF4FdBuV5Q4vwRrngPtAuvdUqklaK2i\n kBV330GDS3r5bH9HcmLmGjMNInjbhEjlTzl4crBfexEc8FrRzK3nAUocFqrKBPhLPuZrPTBKvS\n 8oIMRfH8bKeX7q+v8yfmSp3kYH6/qop/T3xatq5aipZIBKLkmQfApnroe8/e+GXrxbClQS19LY\n BkxaICvkDD4rTRv6ZVWrpaG5cGjamOkBGS30v5J8+/nYlm2iEmZ4Pj3tpbruv4AKRvEEFABAAA\n =", "X-Change-ID": "20251109-feat-mte4-6740a6202e83", "To": "qemu-devel@nongnu.org", "Cc": "Peter Maydell <peter.maydell@linaro.org>,\n Gustavo Romero <gustavo.romero@linaro.org>,\n Richard Henderson <richard.henderson@linaro.org>, qemu-arm@nongnu.org,\n Laurent Vivier <laurent@vivier.eu>,\n Gabriel Brookman <brookmangabriel@gmail.com>, Helge Deller <deller@gmx.de>,\n Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,\n Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>", "X-Mailer": "b4 0.15.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777909867; l=5358;\n i=brookmangabriel@gmail.com; s=20251009; h=from:subject:message-id;\n bh=vkM8MTwAC7Qh0VqBIvcRvwtzVXpQlBcOPy5g2DnK9Xk=;\n b=NdxR7soFVnAv2MRyhSNqm/QYxwg1zpS6z4pMbBt4sloJfICyX/UY3NAXrqM01xN0WquxruE3d\n eWW4NM7QnokAlV7tOddo0UkZX+xJER43lH7ukX0c+0wZgUAW4Ddd0ZR", "X-Developer-Key": "i=brookmangabriel@gmail.com; a=ed25519;\n pk=m9TtPDal6WzoHNnQiHHKf8dTrv3DUCPUUTujuo8vNrw=", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::830;\n envelope-from=brookmangabriel@gmail.com; helo=mail-qt1-x830.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This series implements ARM's Enhanced Memory Tagging Extension\n(MTE4). MTE4 implies the presence of several subfeatures:\nFEAT_MTE_CANONICAL_TAGS, FEAT_MTE_TAGGED_FAR, FEAT_MTE_STORE_ONLY,\nFEAT_MTE_NO_ADDRESS_TAGS, and FEAT_MTE_PERM, none of which are\ncurrently implemented in QEMU. This patch implements all five.\n\nTesting:\n - Included for FAR and STORE_ONLY.\n - The MTE_CANONICAL/NAT test from v2, modified so MTE_CANONICAL is\n enabled in user mode (removed from tree in v3).\n - A bare-metal testsuite that sets up page tables for S1 and S2\n translation, to test the Tagged NoTagAccess fault.\n - The bare-metal testsuite also was used to test LDGM and similar\n instructions not permitted in user-mode.\n - The bare-metal testsuite also was used to test the mtx related\n patches.\n\nThanks,\nGabriel Brookman\n\nResolves: https://gitlab.com/qemu-project/qemu/-/issues/3116\nSigned-off-by: Gabriel Brookman <brookmangabriel@gmail.com>\n---\nChanges in v5:\n- MTX check feature split into three commits as per Richard's suggestion\n- MTX passed down to instruction helpers in a new argument\n- allocation_tag_mem_probe checks for probe in MTEPERM case\n- tbi helper combined into tbi_or_mtx_helper\n- MTX checks added to sme and sve functions\n- bug with type conversion in LDGM helper fixed\n- fixed multi-page tag-check bug and multi-page ST2G bug\n- removed erroneous changes to _stub functions\n- reorganized PAuth & MTX interactions to make them more readable\n- Link to v4: https://lore.kernel.org/qemu-devel/20260309-feat-mte4-v4-0-daaf0375620d@gmail.com\n\nChanges in v4:\n- MTX now interacts with PAuth.\n- Canonical tag checking only takes place in canonically tagged regions\n- MTX bits enable tag checking\n- MTX bits are placed in MTEDESC for access in mte_check helper\n- Separate feature bits are used to delineate each feature\n- PRCTL functions renamed and refactored as per Richard's suggestion\n- Link to v3: https://lore.kernel.org/qemu-devel/20260105-feat-mte4-v3-0-86a0d99ef2e4@gmail.com\n\nChanges in v3:\n- Added prctl for MTE_STORE_ONLY to linux-user\n- mte_check is no longer generated on read when STORE_ONLY enabled\n- Implemented LDGM instruction\n- Removed \"long\" datatype as per Richard's suggestion\n- Implemented masking for VA range checks when MTX bit enabled\n- Implemented MTE_PERM, with NoTagAccess attribute\n- Removed user-mode test for MTE_CANONICAL, since can't enable in\n user-mode.\n- Removed TBI from mte_check generation logic\n- Link to v2: https://lore.kernel.org/qemu-devel/20251116-feat-mte4-v2-0-9a7122b7fa76@gmail.com\n\nChanges in v2:\n- Added tests for STORE_ONLY.\n- Refined commit messages.\n- Added FEAT_MTE_CANONICAL_TAGS and FEAT_MTE_NO_ADDRESS_TAGS + tests.\n- fixed TCSO bit macro names.\n- Link to v1: https://lore.kernel.org/qemu-devel/20251111-feat-mte4-v1-0-72ef5cf276f9@gmail.com\n\nTo: qemu-devel@nongnu.org\nCc: Peter Maydell <peter.maydell@linaro.org>\nCc: qemu-arm@nongnu.org\nCc: Laurent Vivier <laurent@vivier.eu>\nCc: Helge Deller <deller@gmx.de>\nCc: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>\n\n---\nGabriel Brookman (15):\n target/arm: implement MTE_PERM\n target/arm: add TCSO bitmasks to SCTLR\n target/arm: mte_check unemitted on STORE_ONLY load\n linux-user: add MTE_STORE_ONLY to prctl\n target/arm: emit tag check when MTX without TBI\n target/arm: add MTX to MTEDESC and DisasContext\n target/arm: add canonical tag check, mtx helpers\n target/arm: add canonical MTE check logic\n target/arm: load on canonical tag loads ext bits\n target/arm: fault on tag store to canonical tag\n target/arm: skip tag bit bounds check if MTX is on\n target/arm: tag is not a part of PAuth with MTX\n docs: add MTE4 features to docs\n tests/tcg: add test for MTE FAR\n tests/tcg: add test for MTE_STORE_ONLY\n\n docs/system/arm/emulation.rst | 5 +\n linux-user/aarch64/mte_user_helper.c | 11 ++-\n linux-user/aarch64/mte_user_helper.h | 14 ++-\n linux-user/aarch64/target_prctl.h | 6 +-\n target/arm/cpu-features.h | 15 +++\n target/arm/cpu.h | 5 +\n target/arm/gdbstub64.c | 2 +-\n target/arm/helper.c | 36 +++++--\n target/arm/internals.h | 40 ++++++--\n target/arm/ptw.c | 54 +++++++++--\n target/arm/tcg/cpu64.c | 8 ++\n target/arm/tcg/helper-a64-defs.h | 16 ++--\n target/arm/tcg/helper-a64.c | 7 +-\n target/arm/tcg/hflags.c | 25 ++++-\n target/arm/tcg/mte_helper.c | 176 ++++++++++++++++++++++++++++++-----\n target/arm/tcg/pauth_helper.c | 18 +++-\n target/arm/tcg/sme_helper.c | 4 +-\n target/arm/tcg/sve_helper.c | 6 +-\n target/arm/tcg/translate-a64.c | 45 ++++++---\n target/arm/tcg/translate.h | 3 +\n tests/tcg/aarch64/Makefile.target | 2 +-\n tests/tcg/aarch64/mte-10.c | 49 ++++++++++\n tests/tcg/aarch64/mte-9.c | 48 ++++++++++\n tests/tcg/aarch64/mte.h | 7 +-\n 24 files changed, 512 insertions(+), 90 deletions(-)\n---\nbase-commit: 3d626609ccae61a2e552bccd59c7a0931bab8261\nchange-id: 20251109-feat-mte4-6740a6202e83\n\nBest regards,\n-- \nGabriel Brookman <brookmangabriel@gmail.com>" }