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{ "id": 2227732, "url": "http://patchwork.ozlabs.org/api/1.1/covers/2227732/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/1777017460-243543-1-git-send-email-shawn.lin@rock-chips.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<1777017460-243543-1-git-send-email-shawn.lin@rock-chips.com>", "date": "2026-04-24T07:57:33", "name": "[v4,0/7] Add Devres managed IRQ vectors allocation", "submitter": { "id": 66993, "url": "http://patchwork.ozlabs.org/api/1.1/people/66993/?format=api", "name": "Shawn Lin", "email": "shawn.lin@rock-chips.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/cover/1777017460-243543-1-git-send-email-shawn.lin@rock-chips.com/mbox/", "series": [ { "id": 501313, "url": "http://patchwork.ozlabs.org/api/1.1/series/501313/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501313", "date": "2026-04-24T07:57:33", "name": "Add Devres managed IRQ vectors allocation", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/501313/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2227732/comments/", "headers": { "Return-Path": "\n <linux-pci+bounces-53116-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=JX7E3fPz;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; 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a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777017495; c=relaxed/simple;\n\tbh=w0tT0pMAY8FDQMQ1E+O97sxqFcjrhFbKyuBgF0aq6p8=;\n\th=From:To:Cc:Subject:Date:Message-Id;\n b=O+ZIRnBuF9clKCrQKJtJTGCGJIubcLz5u3mtTIG+jvF7985sLuZIoeaXyZ17Z57jADyKgm5xuLnXuoekEZEluCRodviZ+e3KKSt67Qap8UcL4ORlTuyOH/FNKq2J9ClmoLvl1Lo3w+FkKL45Wic/8BIjdUwUZ4xwU4F76KVyPtI=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com;\n spf=pass smtp.mailfrom=rock-chips.com;\n dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=JX7E3fPz; arc=none smtp.client-ip=45.254.49.20", "From": "Shawn Lin <shawn.lin@rock-chips.com>", "To": "Bjorn Helgaas <bhelgaas@google.com>", "Cc": "Nirmal Patel <nirmal.patel@linux.intel.com>,\n\tJonathan Derrick <jonathan.derrick@linux.dev>,\n\tKurt Schwemmer <kurt.schwemmer@microsemi.com>,\n\tLogan Gunthorpe <logang@deltatee.com>,\n\tPhilipp Stanner <phasta@kernel.org>,\n\tlinux-pci@vger.kernel.org,\n\tShawn Lin <shawn.lin@rock-chips.com>", "Subject": "[PATCH v4 0/7] Add Devres managed IRQ vectors allocation", "Date": "Fri, 24 Apr 2026 15:57:33 +0800", "Message-Id": "<1777017460-243543-1-git-send-email-shawn.lin@rock-chips.com>", "X-Mailer": "git-send-email 2.7.4", "X-HM-Tid": "0a9dbe7ede8309cckunm66d640875e979", "X-HM-MType": "1", "X-HM-Spam-Status": "e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlCSEsYVklOTUNJGE9OTBlKQ1YVFA\n\tkWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSU\n\tJDQ0xVSktLVUtZBg++", "DKIM-Signature": "a=rsa-sha256;\n\tb=JX7E3fPzkzFo8a5zAYfFpqHqsYfgHTufD2IZmiMJVskJS6I7n60Z4Z+RUzamp+QsgYuykYMF1me4Z9ptFjQVafuLIEWTojVkvSo6vssGK0/Yi96/sRdC/TX8t7cisM5ttDwvQYiqrVnHjC8m3IjIK0lDb5Gn3BbCJ+4i9WOIvK4=;\n c=relaxed/relaxed; s=default; d=rock-chips.com; v=1;\n\tbh=rMZ5mT8wR5QKhYbHC9DsNc+Q+jnAnsA8E3Uw38Fc1Pc=;\n\th=date:mime-version:subject:message-id:from;", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>" }, "content": "There is a long-standing design ambiguity in the PCI/MSI subsystem regarding\nthe management of IRQ vectors. Currently, the management operates in a \"hybrid\"\nmode. Sometimes it's handled by devres but sometimes not, creating potential\nfor resource management bugs.\n\nHistorically, pcim_enable_device() implicitly triggers automatic IRQ vector\nmanagement when calling pci_alloc_irq_vectors[_affinity], as pcim_enable_device()\nsets the is_managed flag, thus pcim_msi_release() will register a cleanup action.\nHowever, using pci_enable_device() will not make pci_alloc_irq_vectors[_affinity]\nregister a cleanup action.\n\nThis creates an ambiguous ownership model. Many drivers follow a pattern of:\n1. Calling pci_alloc_irq_vectors() to allocate interrupts.\n2. Also calling pci_free_irq_vectors() in their error paths or remove routines.\n\nWhen such a driver also uses pcim_enable_device(), the devres framework may\nattempt to free the IRQ vectors a second time upon device release, leading to\na double-free. Analysis of the tree shows this hazardous pattern exists widely,\nwhile 37 other drivers correctly rely solely on the implicit cleanup.\n\nTo identify the scope of this issue, I used the following shell commands to\nsearch for drivers using pcim_enable_device and allocation functions but missing\nthe explicit free call:\n\ngrep -rl \"pcim_enable_device\" drivers/ \\\n | xargs grep -l -E \"pci_alloc_irq_vectors|pci_alloc_irq_vectors_affinity\" 2>/dev/null \\\n | xargs grep -L \"pci_free_irq_vectors\" 2>/dev/null\n\ndrivers/dma/hsu/pci.c\ndrivers/dma/hisi_dma.c\ndrivers/hid/intel-thc-hidintel-quicki2c/pci-quicki2c.\ndrivers/hid/intel-thc-hid/intel-quickspi/pci-quickspi.c\ndrivers/hid/intel-ish-hid/ipc/pci-ish.c\ndrivers/accel/ivpu/ivpu_drv.c\ndrivers/accel/qaic/qaic_drv.c\ndrivers/accel/amdxdna/aie2_pci.c\ndrivers/platform/x86/intel/ehl_pse_io.c\ndrivers/media/pci/intel/ipu6/ipu6.c\ndrivers/mfd/intel-lpss-pci.c\ndrivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c\ndrivers/crypto/marvell/octeontx2/otx2_cptpf_main.c\ndrivers/crypto/marvell/octeontx2/otx2_cptvf_main.c\ndrivers/crypto/inside-secure/safexcel.c\ndrivers/thunderbolt/nhi.c\ndrivers/i2c/busses/i2c-mchp-pci1xxxx.c\ndrivers/i2c/busses/i2c-amd-mp2-pci.c\ndrivers/i2c/busses/i2c-thunderx-pcidrv.c\ndrivers/i2c/busses/i2c-designware-pcidrv.c\ndrivers/tty/serial/8250/8250_exar.c\ndrivers/tty/serial/8250/8250_pci.c\ndrivers/tty/serial/8250/8250_mid.c\ndrivers/gpio/gpio-merrifield.c\ndrivers/iommu/riscv/iommu-pci.c\ndrivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c\ndrivers/pci/switch/switchtec.c\ndrivers/pci/controller/vmd.c\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c\ndrivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c\ndrivers/net/ethernet/cavium/thunder/thunder_bgx.c\ndrivers/net/ethernet/realtek/r8169_main.c\ndrivers/mmc/host/cavium-thunderx.c\ndrivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.c\ndrivers/cxl/pci.c\ndrivers/spi/spi-pxa2xx-pci.c\ndrivers/spi/spi-pci1xxxx.c\n\nTo count how many drivers, including using lagacy APIs, have the double-free bugs, the\nfollowing shell commands find out 60 drivers.\ngrep -rl \"pcim_enable_device\" drivers/ --include=\"*.c\" \\\n | xargs grep -l -E \"pci_alloc_irq_vectors|pci_alloc_irq_vectors_affinity\" 2>/dev/null \\\n | xargs grep -l \"pci_free_irq_vectors\" 2>/dev/null \\\n | tee /dev/tty \\\n | wc -l\n\ndrivers/dma/dw-edma/dw-edma-pcie.c\ndrivers/dma/plx_dma.c\ndrivers/dma/amd/ae4dma/ae4dma-pci.c\ndrivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c\ndrivers/perf/hisilicon/hisi_pcie_pmu.c\ndrivers/perf/hisilicon/hns3_pmu.c\ndrivers/platform/x86/intel_ips.c\n....\ndrivers/hwtracing/intel_th/pci.c\ndrivers/bus/mhi/host/pci_generic.c\ndrivers/fpga/dfl-pci.c\n51\n\ngrep -rl \"pcim_enable_device\" drivers/ --include=\"*.c\" \\\n | xargs grep -l -E \"pci_enable_msi|pci_enable_msix\" 2>/dev/null \\\n | xargs grep -l \"pci_disable_msi\" 2>/dev/null \\\n | tee /dev/tty \\\n | wc -l\n\ndrivers/dma/ioat/init.c\ndrivers/dma/amd/ptdma/ptdma-pci.c\ndrivers/thermal/intel/int340x_thermal/processor_thermal_device_pci_legacy.c\ndrivers/crypto/ccp/sp-pci.c\ndrivers/i2c/busses/i2c-ismt.c\ndrivers/pci/msi/api.c\ndrivers/misc/mei/pci-me.c\ndrivers/misc/mei/pci-txe.c\ndrivers/block/mtip32xx/mtip32xx.c\n9\n\nThis series introduces new managed APIs: pcim_alloc_irq_vectors() and\npcim_alloc_irq_vectors_affinity(). Drivers that wish to have devres-managed IRQ\nvectors should use these functions to ensure proper automatic cleanup without\nambiguity.\n\nRegarding the removal strategy discussed in v3 [1], two approaches were considered:\na) Introducing another hybrid function temporarily.\nb) Duplicating code temporarily.\n\nFollowing the discussion with Philipp, I agree that adding another hybrid function\ndoes not guarantee the completion of the final cleanup work. Therefore, starting\nfrom v4, I have chosen to duplicate the necessary code temporarily. Helper functions\nhave been factored out to minimize code duplication.\n\nIn the short term, the series converts two drivers within the PCI subsystem to\nuse the new APIs. The long-term goal is to convert all other drivers which wish to\nuse these managed functions. For the legacy APIs, like pci_enable_msix_range_*() and\npci_enable_msi(), we won't consider to provide devres-managed version for them but to\nfix the only 9 double-free drivers by using the new APIs provided by this series. And\nonce ready, we could remove the problematic hybrid management pattern from\npcim_setup_msi_release() entirely.\n\n[1]: https://lore.kernel.org/linux-pci/9dc66010d61670dc5182062ef5f1a932f7374323.camel@mailbox.org/T/#t\n\n\nChanges in v4:\n- Rework to create dedicated devres-managed function (Philipp)\n\nChanges in v3:\n- Rework the commit message and function doc (Philipp)\n- Remove setting is_msi_managed flag from new APIs (Philipp)\n\nChanges in v2:\n- Rebase\n- Introduce patches only for PCI subsystem to convert the API\n\nShawn Lin (7):\n PCI/MSI: Split __pci_enable_msi_range() for reuse\n PCI/MSI: Split __pci_enable_msix_range() for reuse\n PCI/MSI: Introduce __pcim_enable_msi_range()\n PCI/MSI: Introduce __pcim_enable_msix_range()\n PCI/MSI: Add Devres managed IRQ vectors allocation\n PCI: switchtec: Replace pci_alloc_irq_vectors() with\n pcim_alloc_irq_vectors()\n PCI: vmd: Replace pci_alloc_irq_vectors() with\n pcim_alloc_irq_vectors()\n\n drivers/pci/controller/vmd.c | 4 +-\n drivers/pci/msi/api.c | 84 +++++++++++++++++++++++++++++++\n drivers/pci/msi/msi.c | 110 +++++++++++++++++++++++++++++++++++------\n drivers/pci/msi/msi.h | 3 ++\n drivers/pci/switch/switchtec.c | 6 +--\n include/linux/pci.h | 22 +++++++++\n 6 files changed, 210 insertions(+), 19 deletions(-)" }