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pr=C", "From": "<pshete@nvidia.com>", "To": "<linusw@kernel.org>, <thierry.reding@kernel.org>", "CC": "<pshete@nvidia.com>, <jonathanh@nvidia.com>, <robh@kernel.org>,\n\t<krzk+dt@kernel.org>, <conor+dt@kernel.org>, <webgeek1234@gmail.com>,\n\t<rosenp@gmail.com>, <linux-tegra@vger.kernel.org>,\n\t<linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>", "Subject": "[PATCH v2 0/6] Add Tegra238 and Tegra264 pinctrl support", "Date": "Mon, 20 Apr 2026 10:05:55 +0000", "Message-ID": "<20260420100601.343707-1-pshete@nvidia.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260409131340.168556-1-pshete@nvidia.com>", "References": "<20260409131340.168556-1-pshete@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN2PEPF00004FBC:EE_|MN0PR12MB5763:EE_", "X-MS-Office365-Filtering-Correlation-Id": "e114ebe3-0e23-4157-4e47-08de9ec47de4", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|1800799024|7416014|376014|36860700016|82310400026|13003099007|56012099003|18002099003|22082099003;", "X-Microsoft-Antispam-Message-Info": "\n\t53FESsq9Job+CUv9uVZD9iMLucCEI8e6z+30BF8kFHKHOI1eQlnJrbx2eJbI9xYXgchfPCJrWVUxNvhqdw5e3syadc932bvteN7FZfCC7kSz41csvpPd3XHQJCPoko0gJtCuvbftqBpEVNX7PO37TFRWONo8rNFc0MAidGbPia5NFZTqW4lcTmEGJjRFjkTejAaFBCeBlXQhWluOim0q60lrGxPRnZFVJtEo1mmtohbCjswQ/l9kXhY2SVnzyguoFGkjsZ4lYGADQEvDzieCmLveTPtLL18YaiH3b0WAQhGvauwf6L7JJk3zmCPWWi7N3V2E/V5q//YARyQuNtQuiMcLVCRbCiSjNCa0CYoNQ9B0mYXZze1HxgbAU1SzgtTl8qUrmLBnE42BJtoC7HWZRXsSLr5iDlDH/R+l9xQ1qz02g2jeNu3NgEQBA84sGNL1brgMt4metkmlTGSAkseeyrzSOF/0jDc6SgfqRdSHI/R7KNqcHAMhMoXc+wzwQu8IfB2BiFSHA2O0WA5W8ii/5QYR/NeKFJLq2cKO4j/ouo9+zdfgUIxbRdmwM7qSriT7u0RmSNeWMb0Fpbzhnowb1Y6ljUzv19rhN5dPQAjMXm4oqZfBcCgdGQZJNBFbakicdj7MDsrj74Jbid1S2+w9eaw4wWjxIJapqVLr9gzrP9pBRME+BkKQ1PbLA4JE4bWWHLIm+o+bcE3gXE5d+F/u45DlU8gHX2dPJtCnhAHjd6XYYR+ahpbi2FmbJ6/9WKrHvIcd9DQlH+Mf+9nzjVLC+Q==", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(36860700016)(82310400026)(13003099007)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tRaOOfE4Bb67vvQGiy//L3prpXE8gjQ4dSPkIytqQp1xmRNjfZJ4TWxr6xFr39jwDSrw7ENOwiDtvDu4KB2AsxBIoL8Oh55Lb4tXuFakfAMr8tbFG9RYATrLHIA6Ooj5R3i2rU5LcfA/H6c9h9DE5e5fSZWQpXjtKmEKvnDDPVevG3nKlHJp0hAz8ONDJeQlX4PKvPwMiiJgKRNjBPQG+JgBaS1shXrdJagFVyJ94mFoNyqtV6sGa5Z/MLt1FRpbJGssxBMh1Gc+s/ukVve5jOEX/TynKl1noF74h5GmUDVDGBKiilv/vt68fymSfcqkORLIisrU/s2sED2WWCezkIdmfNxypVIHilddnsXKbqV81Jil4FZ+XDQZg4JL1U96prSZEJage6hbsc2p1osOM02WPtcNgyPZrzi0J1Ed81TCd5zBUOb5yjrspJiRrNdnR", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "20 Apr 2026 10:06:29.4182\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e114ebe3-0e23-4157-4e47-08de9ec47de4", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tBN2PEPF00004FBC.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN0PR12MB5763" }, "content": "From: Prathamesh Shete <pshete@nvidia.com>\n\nAdd pinctrl driver support for Tegra238 and Tegra264\nalong with the corresponding device tree binding\ndocumentation. Additionally, export tegra_pinctrl_probe()\nto allow the drivers to be built as loadable modules. \n\nChanges in v2:\n - Drop the \"arm64: defconfig: make Tegra238 and Tegra264 Pinctrl ...\"\n patch and instead add 'default m if ARCH_TEGRA_{238,264}_SOC' to\n the PINCTRL_TEGRA238 / PINCTRL_TEGRA264 Kconfig entries so the\n drivers are auto-enabled as modules.\n - New patch \"arm64: tegra: Add pinctrl nodes for Tegra264\" that\n describes the three Tegra264 pin controllers (pinmux_main,\n pinmux_aon, pinmux_uphy) in tegra264.dtsi.\n - dt-bindings (Tegra238 and Tegra264 pinmux):\n * Add 'required: compatible, reg' to the top-level schemas.\n * Switch 'unevaluatedProperties: false' to\n 'additionalProperties: false' on the top-level schemas.\n - Reword commit messages to use imperative mood\n\nLink to v1:\nhttps://lore.kernel.org/linux-tegra/20260409131340.168556-1-pshete@nvidia.com/\n\nPrathamesh Shete (6):\n pinctrl: tegra: Export tegra_pinctrl_probe()\n dt-bindings: pinctrl: Document Tegra238 pin controllers\n pinctrl: tegra: Add Tegra238 pinmux driver\n dt-bindings: pinctrl: Document Tegra264 pin controllers\n pinctrl: tegra: Add Tegra264 pinmux driver\n arm64: tegra: Add pinctrl nodes for Tegra264\n\n .../pinctrl/nvidia,tegra238-pinmux-aon.yaml | 82 +\n .../nvidia,tegra238-pinmux-common.yaml | 73 +\n .../pinctrl/nvidia,tegra238-pinmux.yaml | 219 ++\n .../pinctrl/nvidia,tegra264-pinmux-aon.yaml | 80 +\n .../nvidia,tegra264-pinmux-common.yaml | 84 +\n .../pinctrl/nvidia,tegra264-pinmux-main.yaml | 167 ++\n .../pinctrl/nvidia,tegra264-pinmux-uphy.yaml | 78 +\n arch/arm64/boot/dts/nvidia/tegra264.dtsi | 15 +\n drivers/pinctrl/tegra/Kconfig | 20 +\n drivers/pinctrl/tegra/Makefile | 2 +\n drivers/pinctrl/tegra/pinctrl-tegra.c | 2 +\n drivers/pinctrl/tegra/pinctrl-tegra238.c | 2056 +++++++++++++++\n drivers/pinctrl/tegra/pinctrl-tegra264.c | 2216 +++++++++++++++++\n 13 files changed, 5094 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-aon.yaml\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-common.yaml\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux.yaml\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-aon.yaml\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-common.yaml\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-uphy.yaml\n create mode 100644 drivers/pinctrl/tegra/pinctrl-tegra238.c\n create mode 100644 drivers/pinctrl/tegra/pinctrl-tegra264.c" }