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{ "id": 2223752, "url": "http://patchwork.ozlabs.org/api/1.1/covers/2223752/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/20260416070330.3006528-1-varadarajan.narayanan@oss.qualcomm.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260416070330.3006528-1-varadarajan.narayanan@oss.qualcomm.com>", "date": "2026-04-16T07:03:25", "name": "[v7,0/5] Implement reset to EDL for qcs9100", "submitter": { "id": 92283, "url": "http://patchwork.ozlabs.org/api/1.1/people/92283/?format=api", "name": "Varadarajan Narayanan", "email": "varadarajan.narayanan@oss.qualcomm.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/cover/20260416070330.3006528-1-varadarajan.narayanan@oss.qualcomm.com/mbox/", "series": [ { "id": 500084, "url": "http://patchwork.ozlabs.org/api/1.1/series/500084/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=500084", "date": "2026-04-16T07:03:25", "name": "Implement reset to EDL for qcs9100", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/500084/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2223752/comments/", "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=W19NrX5h;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=aQYZhjeE;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"W19NrX5h\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"aQYZhjeE\";\n\tdkim-atps=neutral", "phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com", "phobos.denx.de; spf=pass\n smtp.mailfrom=varadarajan.narayanan@oss.qualcomm.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fx8BL2f3Sz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 16 Apr 2026 17:03:54 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 6BF6F83EEF;\n\tThu, 16 Apr 2026 09:03:45 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id BF5D7840AB; Thu, 16 Apr 2026 09:03:44 +0200 (CEST)", "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 0691083C2B\n for <u-boot@lists.denx.de>; Thu, 16 Apr 2026 09:03:41 +0200 (CEST)", "from pps.filterd (m0279862.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63G1VUja3089238\n for <u-boot@lists.denx.de>; Thu, 16 Apr 2026 07:03:40 GMT", "from mail-pl1-f197.google.com (mail-pl1-f197.google.com\n [209.85.214.197])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4djp6a8wxn-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for <u-boot@lists.denx.de>; Thu, 16 Apr 2026 07:03:39 +0000 (GMT)", "by mail-pl1-f197.google.com with SMTP id\n d9443c01a7336-2b249541063so71307535ad.3\n for <u-boot@lists.denx.de>; Thu, 16 Apr 2026 00:03:39 -0700 (PDT)", "from hu-varada-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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sumit.garg@kernel.org, varadarajan.narayanan@oss.qualcomm.com,\n marek.vasut+renesas@mailbox.org, aswin.murugan@oss.qualcomm.com,\n simon.glass@canonical.com, tien.fong.chee@altera.com,\n michal.simek@amd.com, visitorckw@gmail.com, clamor95@gmail.com,\n u-boot@lists.denx.de, u-boot-qcom@groups.io", "Subject": "[PATCH v7 0/5] Implement reset to EDL for qcs9100", "Date": "Thu, 16 Apr 2026 12:33:25 +0530", "Message-Id": "<20260416070330.3006528-1-varadarajan.narayanan@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-ORIG-GUID": "WR3Mk61VTlHBvL-tiB3mb7ZxH8MZPIDe", "X-Authority-Analysis": "v=2.4 cv=NuvhtcdJ c=1 sm=1 tr=0 ts=69e089cb cx=c_pps\n a=cmESyDAEBpBGqyK7t0alAg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8\n a=EUspDBNiAAAA:8 a=YfCOm-DyAAAA:8 a=COk6AnOGAAAA:8 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"clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Using the 'reboot edl' command in Linux, the platform can reboot to the\nEmergency Download mode. Implement the same for U-Boot.\n\nv7: * This seems to have slipped through the cracks though all patches have R-b\n * So reposting the same after rebasing to ToT based on https://lore.kernel.org/u-boot/20260217143957.GZ2747538@bill-the-cat/\n * No code changes\n * Size change details\n------------------------\nqcom_qcs9100\n------------------------\n aarch64: (for 1/1 boards) all +145.0 data -40.0 rodata +89.0 text +96.0\n qcom_qcs9100 : all +145 data -40 rodata +89 text +96\n u-boot: add: 9/0, grow: 4/0 bytes: 656/0 (656)\n function old new delta\n sysreset_walk_arg - 124 +124\n _u_boot_list_2_driver_2_qcom_psci_sysreset - 120 +120\n qcom_psci_sysreset_request_arg - 84 +84\n smc_call - 68 +68\n do_reset 100 160 +60\n psci_system_reset2 - 44 +44\n psci_features - 44 +44\n sysreset_request_arg - 32 +32\n qcom_psci_sysreset_ops - 32 +32\n psci_bind 188 212 +24\n qcom_pshold_ops 24 32 +8\n qcom_psci_sysreset_get_status - 8 +8\n psci_sysreset_ops 24 32 +8\n------------------------\nqemu_arm\n------------------------\nBuilding 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: x86: there is no CONFIG_UBOOT_ROMSIZE_KB_12288\n06: qcom_defconfig: enable psci based sysreset\n 2 0 0 /2 qemu_arm\nCompleted: 2 total built, 2 newly), duration 0:00:19, rate 0.11\n/tmp/qemu_arm/master/boards.cfg is up to date. Nothing to do.\nSummary of 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: x86: there is no CONFIG_UBOOT_ROMSIZE_KB_12288\n06: qcom_defconfig: enable psci based sysreset\n(no errors to report)\n\n------------------------\nqemu_arm64\n------------------------\n aarch64: (for 1/1 boards) all +8.0 data +8.0\n qemu_arm64 : all +8 data +8\n u-boot: add: 0/0, grow: 1/0 bytes: 8/0 (8)\n function old new delta\n psci_sysreset_ops 24 32 +8\n\nv6: * https://lore.kernel.org/u-boot/20260121063920.1500293-1-varadarajan.narayanan@oss.qualcomm.com/\n * Add r-b Sumit\n * Wrap the new code inside CONFIG_SYSRESET_CMD_RESET_ARGS\n * Size change details\n------------------------\nqcom_qcs9100\n------------------------\nBuilding 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: Merge tag 'u-boot-imx-master-20260117' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx\n07: qcom_defconfig: enable psci based sysreset\n 2 0 0 /2 qcom_qcs9100\nCompleted: 2 total built, 2 newly), duration 0:00:25, rate 0.08\n/tmp/qcom_qcs9100/tot/boards.cfg is up to date. Nothing to do.\nSummary of 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: Merge tag 'u-boot-imx-master-20260117' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx\n07: qcom_defconfig: enable psci based sysreset\n aarch64: (for 1/1 boards) all +145.0 data -40.0 rodata +89.0 text +96.0\n qcom_qcs9100 : all +145 data -40 rodata +89 text +96\n u-boot: add: 9/0, grow: 4/0 bytes: 656/0 (656)\n function old new delta\n sysreset_walk_arg - 124 +124\n _u_boot_list_2_driver_2_qcom_psci_sysreset - 120 +120\n qcom_psci_sysreset_request_arg - 84 +84\n smc_call - 68 +68\n do_reset 100 160 +60\n psci_system_reset2 - 44 +44\n psci_features - 44 +44\n sysreset_request_arg - 32 +32\n qcom_psci_sysreset_ops - 32 +32\n psci_bind 188 212 +24\n qcom_pshold_ops 24 32 +8\n qcom_psci_sysreset_get_status - 8 +8\n psci_sysreset_ops 24 32 +8\n(no errors to report)\n\n------------------------\nqemu_arm\n------------------------\nBuilding 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: Merge tag 'u-boot-imx-master-20260117' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx\n07: qcom_defconfig: enable psci based sysreset\n 2 0 0 /2 qemu_arm\nCompleted: 2 total built, 2 newly), duration 0:00:19, rate 0.11\n/tmp/qemu_arm/tot/boards.cfg is up to date. Nothing to do.\nSummary of 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: Merge tag 'u-boot-imx-master-20260117' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx\n07: qcom_defconfig: enable psci based sysreset\n(no errors to report)\n\n------------------------\nqemu_arm64\n------------------------\nBuilding 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: Merge tag 'u-boot-imx-master-20260117' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx\n07: qcom_defconfig: enable psci based sysreset\n 2 0 0 /2 qemu_arm64\nCompleted: 2 total built, 2 newly), duration 0:00:18, rate 0.11\n/tmp/qemu_arm64/tot/boards.cfg is up to date. Nothing to do.\nSummary of 2 commits for 1 boards (1 thread, 16 jobs per thread)\n01: Merge tag 'u-boot-imx-master-20260117' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx\n07: qcom_defconfig: enable psci based sysreset\n aarch64: (for 1/1 boards) all +8.0 data +8.0\n qemu_arm64 : all +8 data +8\n u-boot: add: 0/0, grow: 1/0 bytes: 8/0 (8)\n function old new delta\n psci_sysreset_ops 24 32 +8\n(no errors to report)\n\nv5: * Update author and signed-off-by email id from quicinc.com to oss.qualcomm.com\n * Add r-b tags\n * Enable CONFIG_SYSRESET_QCOM_PSCI in qcom_defconfig instead of qcs9100_defconfig\n\nv4: * Update documentation about '-edl' option\n * Add API to check for support of PSCI functions\n * Check if RESET2 is supported before issuing the command\n * Fix compiler warnings\n\nv3: * Introduce a sysreset op that will pass down the 'reset' command\n arguments to registered handlers\n * Handle 'reset to edl' alone in qcom-psci driver\n\nv2: * Rebased to recent sources\n * Dropped the first patch as it is not applicable anymore\n * Bind the new driver from psci driver\n\nVaradarajan Narayanan (5):\n arm: psci: Add API to check for support of specific PSCI function\n drivers: sysreset: Add sysreset op that can take arguments\n sysreset: Implement PSCI based reset to EDL mode for QCOM SoCs\n cmd: boot: Add '-edl' option to reset command documentation\n qcom_defconfig: enable psci based sysreset\n\n arch/arm/cpu/armv8/fwcall.c | 15 +++++++++\n arch/arm/include/asm/system.h | 1 +\n cmd/boot.c | 3 ++\n configs/qcom_defconfig | 2 ++\n doc/usage/cmd/reset.rst | 2 ++\n drivers/firmware/psci.c | 4 +++\n drivers/sysreset/Kconfig | 14 +++++++++\n drivers/sysreset/Makefile | 1 +\n drivers/sysreset/sysreset-uclass.c | 37 ++++++++++++++++++++++\n drivers/sysreset/sysreset_qcom-psci.c | 45 +++++++++++++++++++++++++++\n include/sysreset.h | 18 +++++++++++\n 11 files changed, 142 insertions(+)\n create mode 100644 drivers/sysreset/sysreset_qcom-psci.c" }