Show a cover letter.

GET /api/1.1/covers/2222597/?format=api
HTTP 200 OK
Allow: GET, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2222597,
    "url": "http://patchwork.ozlabs.org/api/1.1/covers/2222597/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260413071401.1151-1-jian.yang@mediatek.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260413071401.1151-1-jian.yang@mediatek.com>",
    "date": "2026-04-13T07:13:54",
    "name": "[0/2] PCI: mediatek-gen3: Fix the control timing of PERST#",
    "submitter": {
        "id": 85572,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/85572/?format=api",
        "name": "Jian Yang",
        "email": "jian.yang@mediatek.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260413071401.1151-1-jian.yang@mediatek.com/mbox/",
    "series": [
        {
            "id": 499653,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/499653/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=499653",
            "date": "2026-04-13T07:13:55",
            "name": "PCI: mediatek-gen3: Fix the control timing of PERST#",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/499653/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/covers/2222597/comments/",
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-52416-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256\n header.s=dk header.b=UJBWpx5R;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-52416-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com\n header.b=\"UJBWpx5R\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=60.244.123.138",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=mediatek.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=mediatek.com"
        ],
        "Received": [
            "from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvJYw2NQ8z1yDF\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 13 Apr 2026 17:14:28 +1000 (AEST)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id 778B93007A41\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 13 Apr 2026 07:14:23 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id DEDD83932D5;\n\tMon, 13 Apr 2026 07:14:18 +0000 (UTC)",
            "from mailgw01.mediatek.com (unknown [60.244.123.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id EDAD9392825;\n\tMon, 13 Apr 2026 07:14:14 +0000 (UTC)",
            "from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by\n mailgw01.mediatek.com\n\t(envelope-from <jian.yang@mediatek.com>)\n\t(Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256)\n\twith ESMTP id 625899409; Mon, 13 Apr 2026 15:14:08 +0800",
            "from mtkmbs11n1.mediatek.inc (172.21.101.185) by\n mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.2562.29; Mon, 13 Apr 2026 15:14:07 +0800",
            "from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by\n mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id\n 15.2.2562.29 via Frontend Transport; Mon, 13 Apr 2026 15:14:06 +0800"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776064458; cv=none;\n b=t59Wi7tRCpjsDoqY2Vp+ULclXrXDbHmkVRzgaXdw/ADUAWWvhIfgoUiSvyfsP/2NEkqitcaNHbyrE5xrucX3ftrIpBZIEp2SD3BT6Y20VwjIrYbQEUr/J2d0vGVF5uQBbApEJut1kDLW5QtaGTP1M+Gn2qfhSkqW++bNv39jIyM=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776064458; c=relaxed/simple;\n\tbh=Cnmn2buu/BBhg4jRMHO4PlOEaMBYpDcJsakE3dc8acw=;\n\th=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type;\n b=JgX+81Z0TOrUIha/XqR5GqE3U2Sb1+gnsg38JuoXHJ6lZyYAtqvL9zNVEA3KaDoGQAM389Lu99hvAokYKwxYCgrFSh7+Q1lyE2c8veD7GTEQ/+vjcY6foURgjdq3D4gRjhGvFZFGpjrTYt1v3LCYgg8MANvp3dLKL15EADHE1c4=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=mediatek.com;\n spf=pass smtp.mailfrom=mediatek.com;\n dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com\n header.b=UJBWpx5R; arc=none smtp.client-ip=60.244.123.138",
        "X-UUID": [
            "5d09009e370811f1ae70033691e9ac7d-20260413",
            "5d09009e370811f1ae70033691e9ac7d-20260413"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n d=mediatek.com; s=dk;\n\th=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From;\n bh=+9DOIPBCDXn1gL4EYuRhhyUJKMqKeMJcK0WHANYjnaQ=;\n\tb=UJBWpx5Rvxo5tloIEnswGWZ9Xa7i4JKEvGpSj6WlRyLYZMw0vu6XduZXGv44MbHQgyV0LVm3mHqQyEFWzi13CVBxkyu70Vb6KTF9j0lMhJaSsQNT09+SEe2Bfp2tNgNqAr3BM5jhzJSk6jPZfdWOfpBo4MI5MKKH0Fgn+yKPoWo=;",
        "X-CID-P-RULE": "Release_Ham",
        "X-CID-O-INFO": "VERSION:1.3.12,REQID:9d5decaf-a3eb-420f-a3e9-974a4289e68c,IP:0,U\n\tRL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION\n\t:release,TS:-5",
        "X-CID-META": "VersionHash:e7bac3a,CLOUDID:6ad5cb24-cb5c-4236-a89a-9a7fb20c9bc4,B\n\tulkID:nil,BulkQuantity:0,Recheck:0,SF:102|836|865|888|898,TC:-5,Content:0|\n\t15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0\n\t,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0",
        "X-CID-BVR": "2,SSN|SDN",
        "X-CID-BAS": "2,SSN|SDN,0,_",
        "X-CID-FACTOR": "TF_CID_SPAM_SNR",
        "X-CID-RHF": "D41D8CD98F00B204E9800998ECF8427E",
        "From": "Jian Yang <jian.yang@mediatek.com>",
        "To": "Matthias Brugger <matthias.bgg@gmail.com>,\n AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,\n Ryder Lee <ryder.lee@mediatek.com>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>",
        "CC": "<linux-pci@vger.kernel.org>, <linux-mediatek@lists.infradead.org>,\n\t<linux-kernel@vger.kernel.org>,\n\t<Project_Global_Chrome_Upstream_Group@mediatek.com>,\n\t<jian.yang@mediatek.com>, <chuanjia.liu@mediatek.com>,\n\t<yonglong.wu@mediatek.com>",
        "Subject": "[PATCH 0/2] PCI: mediatek-gen3: Fix the control timing of PERST#",
        "Date": "Mon, 13 Apr 2026 15:13:54 +0800",
        "Message-ID": "<20260413071401.1151-1-jian.yang@mediatek.com>",
        "X-Mailer": "git-send-email 2.46.0",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain"
    },
    "content": "Dear maintainers,\n\nThe purpose of this patch series is to fix the PERST# control timing\nin the MediaTek PCIe Gen3 controller driver so that it complies with\nthe PCIe CEM specification.\n\nIn the current MediaTek PCIe Gen3 controller driver, there are two\nissues with PERST# timing:\n1. During the power-up phase (i.e., before PCIe link-up), on some\nMediaTek SoCs PERST# is de-asserted before the REFCLK becomes stable;\n2. During system shutdown, PERST# is not asserted before power is\nremoved.\n\nPatch 1 fixes the reset signal sequencing during the power-up phase.\n\nPatch 2 adds a shutdown callback to control PERST# during system\nshutdown.\n\nBest regards,\nJian Yang\n\nJian Yang (2):\n  PCI: mediatek-gen3: Fix PERST# control sequence at system startup\n    phase\n  PCI: mediatek-gen3: Add shutdown callback to cotnrol PERST# signal\n\n drivers/pci/controller/pcie-mediatek-gen3.c | 30 ++++++++++++++++++---\n 1 file changed, 27 insertions(+), 3 deletions(-)"
}