Cover Letter Detail
Show a cover letter.
GET /api/1.1/covers/2221927/?format=api
{ "id": 2221927, "url": "http://patchwork.ozlabs.org/api/1.1/covers/2221927/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260410-sdxi-base-v1-0-1d184cb5c60a@amd.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260410-sdxi-base-v1-0-1d184cb5c60a@amd.com>", "date": "2026-04-10T13:07:10", "name": "[00/23] dmaengine: Smart Data Accelerator Interface (SDXI) basic support", "submitter": { "id": 91626, "url": "http://patchwork.ozlabs.org/api/1.1/people/91626/?format=api", "name": "Nathan Lynch via B4 Relay", "email": "devnull+nathan.lynch.amd.com@kernel.org" }, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260410-sdxi-base-v1-0-1d184cb5c60a@amd.com/mbox/", "series": [ { "id": 499458, "url": "http://patchwork.ozlabs.org/api/1.1/series/499458/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=499458", "date": "2026-04-10T13:07:10", "name": "dmaengine: Smart Data Accelerator Interface (SDXI) basic support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499458/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2221927/comments/", "headers": { "Return-Path": "\n <linux-pci+bounces-52312-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=JBqfXyEb;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-52312-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"JBqfXyEb\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fscY63Q7jz1yGb\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Apr 2026 23:07:54 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 4792A300D68C\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Apr 2026 13:07:52 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 07CF23382C5;\n\tFri, 10 Apr 2026 13:07:50 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id D2AF6311C2A;\n\tFri, 10 Apr 2026 13:07:49 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPS id 759FEC19421;\n\tFri, 10 Apr 2026 13:07:49 +0000 (UTC)", "from aws-us-west-2-korg-lkml-1.web.codeaurora.org\n (localhost.localdomain [127.0.0.1])\n\tby smtp.lore.kernel.org (Postfix) with ESMTP id 6AEAFF4485B;\n\tFri, 10 Apr 2026 13:07:49 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775826469; cv=none;\n b=XB8HA/BIQE9Ng0aPTlnszJs74YzLT3nMdRTFsf+Rm+oVNcL5GBUxhXRNkTso9OjvJ2L6W2Q9qemow8J/vg95duH0ay/ctxjwN0vEHWvUACCAsoH9KwPaV0+2hV2wn5NYru2ZyTMNh1QSW9y99WrumQRcOYfkQNgom3kHV/bym44=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775826469; c=relaxed/simple;\n\tbh=9rBcO8VxjER3OnuYfoq9G9H5KIuoJGxGfKEMHDiZlyY=;\n\th=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc;\n b=nmZAaZiWXH3982FuuNty6wcuiYts45+rNU/OMBdC1EsD/2ootKfiDUSlNkTP8f/SZ/TTLvbl1nIjlBq7By/k6JyymUhqCYGlv9kdf6F0Vv0AilDIJosawjIYHF2GaPkw9y9e72EAgYsOhQ2AtA/N9eMCYi2TSaDsPwhwsiBp7gU=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=JBqfXyEb; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775826469;\n\tbh=9rBcO8VxjER3OnuYfoq9G9H5KIuoJGxGfKEMHDiZlyY=;\n\th=From:Subject:Date:To:Cc:Reply-To:From;\n\tb=JBqfXyEb9TOT8FgY/nbT253IAXAJWn6WZXPN4ECiK0zkxL8r0ZdUm7ivM6yFvmx/+\n\t X0gypKP5qvXxp1oFFfeCUhf1WLxVBIizLagwF55RfkvU59V752i0H3a2+9JBm9wv/H\n\t BFKmo60dOGs0Xclw2gsZDZ8r39OmFE7cySVUaRtVuG6065THkKCCa81tjN7DdC//4T\n\t eWlaPXRsnVq+MGLDx8T182DCXVlzgJcHAJNPX2gFVum4/2Oic3rNULkkRJVzrxvrVk\n\t AeglrkNCCo5Womy993S9+W2pri7JZF7VBMHp6z9pBA5/DKLEGi4wqVBxhvRbram7GX\n\t BQD+GizXJzQng==", "From": "Nathan Lynch via B4 Relay <devnull+nathan.lynch.amd.com@kernel.org>", "Subject": "[PATCH 00/23] dmaengine: Smart Data Accelerator Interface (SDXI)\n basic support", "Date": "Fri, 10 Apr 2026 08:07:10 -0500", "Message-Id": "<20260410-sdxi-base-v1-0-1d184cb5c60a@amd.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "X-B4-Tracking": "v=1; b=H4sIAAAAAAAC/02MQQrCMBBFr1JmbSSTGGJceQ9xkWZGm0Ub6JSgl\n NzdoBtXnwf/vR2E18wCl2GHlWuWXJYOeBggTXF5ssrUGYw2Tp/RKqFXVmMUVt6ST+FBiZ2H/p+\n ybGV9f1MV+9x+VtDuz6qotCJtTxjRBDPGa5zpmMoM99baBxF+B9CQAAAA", "X-Change-ID": "20250813-sdxi-base-73d7c9fdce57", "To": "Vinod Koul <vkoul@kernel.org>", "Cc": "Wei Huang <wei.huang2@amd.com>,\n Mario Limonciello <mario.limonciello@amd.com>,\n Bjorn Helgaas <bhelgaas@google.com>,\n Jonathan Cameron <jonathan.cameron@huawei.com>,\n Stephen Bates <Stephen.Bates@amd.com>, PradeepVineshReddy.Kodamati@amd.com,\n John.Kariuki@amd.com, linux-pci@vger.kernel.org,\n linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,\n Nathan Lynch <nathan.lynch@amd.com>", "X-Mailer": "b4 0.15.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1775826467; l=6024;\n i=nathan.lynch@amd.com; s=20260410; h=from:subject:message-id;\n bh=9rBcO8VxjER3OnuYfoq9G9H5KIuoJGxGfKEMHDiZlyY=;\n b=gAwlqr9NKfu+gJarBGqfqo48zzVDQS3J4QnIesv9toDOQO891IMNga67nVexAyP4Pm4cjv4uW\n oxiFF3l5Vd7DriNYBpEMFpb7EjiywwC8C6tkz/ueyeKCXXbp7BcoEZv", "X-Developer-Key": "i=nathan.lynch@amd.com; a=ed25519;\n pk=PK4ozhq+/z9/2Jl5rgDmvHa9raVomv79qM8p1RAFpEw=", "X-Endpoint-Received": "by B4 Relay for nathan.lynch@amd.com/20260410 with\n auth_id=728", "X-Original-From": "Nathan Lynch <nathan.lynch@amd.com>", "Reply-To": "nathan.lynch@amd.com" }, "content": "The Smart Data Accelerator Interface (SDXI) is a vendor-neutral\narchitecture for memory-to-memory data movement offload designed for\nkernel bypass and virtualization.\n\nGeneral information on SDXI may be found at:\nhttps://www.snia.org/sdxi\n\nThis submission adds a driver with basic support for PCIe-hosted SDXI\n1.0 implementations and includes a DMA engine provider with memcpy\ncapability. A more limited RFC version was posted in September 2025;\nthe code has seen multiple substantial updates since then, described\nbelow.\n\nPlanned future SDXI work (out of scope for this series):\n\n* Character device for exposing SDXI contexts to user space.\n\n* Support for operation types to be added in future SDXI revisions.\n\n* Greater configurability for control structures, e.g. descriptor ring\n size.\n\nThe latest released version of the SDXI specification is 1.0:\nhttps://www.snia.org/sites/default/files/technical-work/sdxi/release/SNIA-SDXI-Specification-v1.0a.pdf\n\nDraft versions of future SDXI specifications in development may be found at:\nhttps://www.snia.org/tech_activities/publicreview#sdxi\n\n---\nChanges in v1:\n- Reorder series and introduce functionality incrementally while\n remaining buildable and functional at each step. (Jonathan Cameron)\n- Use devres APIs where possible for device resources (JC)\n- Use cleanup APIs to significantly reduce use of goto-oriented error\n unwinding. (JC)\n- Drop SDXI_DEBUG config option. (JC)\n- Cite SDXI spec version and section number consistently throughout. (JC)\n- Combine local variable declarations of same type. (JC)\n- Mark descriptor structs __packed. (JC)\n- Use designated initializers in descriptor encoding functions. (JC)\n- Prefer dev_err_probe() over sdxi_err() in sdxi_pci_init(). (JC)\n- Prune unnecessary includes throughout source files. (JC)\n- Remove unnecessary/unhelpful comments in several places. (JC)\n- Remove SDXI spec material from \"Add SNIA SDXI accelerator sub-class\"\n commit message and reword the remainder. (Bjorn Helgaas)\n- Remove unnecessary local for DMA_BIT_MASK() argument in\n sdxi_pci_init(). (BH)\n- Use \"{ }\" for final null entry in id table, not \"{ 0, }\". (BH)\n- Replace sample descriptor submission code from the SDXI spec with an\n improved API that has unit tests, eliminates a copy step for\n callers, and can block until ring space becomes available if\n desired.\n- Omit the error log facility for now; it can be reintroduced later.\n- Use a per-device xarray to allocate context IDs and map them to\n context objects.\n- Implement interrupt-based completion signaling for memcpy operations\n in the DMA engine provider, DMA provider code mostly rewritten.\n\nNon-changes in v1:\n- Mario suggested that pci_clear_master() is needed in\n sdxi_pci_init()'s error path and in sdxi_pci_exit() (now\n sdxi_pci_remove()). However, sdxi uses pcim_enable_device(), which\n appears to ensure that master is cleared for the device. Happy to\n revisit this if I'm mistaken.\n\n- Link to RFC: https://lore.kernel.org/r/20250905-sdxi-base-v1-0-d0341a1292ba@amd.com\n\n---\nNathan Lynch (23):\n PCI: Add SNIA SDXI accelerator sub-class\n MAINTAINERS: Add entry for SDXI driver\n dmaengine: sdxi: Add PCI initialization\n dmaengine: sdxi: Feature discovery and initial configuration\n dmaengine: sdxi: Configure context tables\n dmaengine: sdxi: Allocate DMA pools\n dmaengine: sdxi: Allocate administrative context\n dmaengine: sdxi: Install administrative context\n dmaengine: sdxi: Start functions on probe, stop on remove\n dmaengine: sdxi: Complete administrative context jump start\n dmaengine: sdxi: Add client context alloc and release APIs\n dmaengine: sdxi: Add descriptor ring management\n dmaengine: sdxi: Add unit tests for descriptor ring reservations\n dmaengine: sdxi: Attach descriptor ring state to contexts\n dmaengine: sdxi: Per-context access key (AKey) table entry allocator\n dmaengine: sdxi: Generic descriptor manipulation helpers\n dmaengine: sdxi: Add completion status block API\n dmaengine: sdxi: Encode context start, stop, and sync descriptors\n dmaengine: sdxi: Provide context start and stop APIs\n dmaengine: sdxi: Encode nop, copy, and interrupt descriptors\n dmaengine: sdxi: Add unit tests for descriptor encoding\n dmaengine: sdxi: MSI/MSI-X vector allocation and mapping\n dmaengine: sdxi: Add DMA engine provider\n\n MAINTAINERS | 7 +\n drivers/dma/Kconfig | 2 +\n drivers/dma/Makefile | 1 +\n drivers/dma/sdxi/.kunitconfig | 4 +\n drivers/dma/sdxi/Kconfig | 18 ++\n drivers/dma/sdxi/Makefile | 16 ++\n drivers/dma/sdxi/completion.c | 79 ++++++\n drivers/dma/sdxi/completion.h | 24 ++\n drivers/dma/sdxi/context.c | 504 ++++++++++++++++++++++++++++++++++++\n drivers/dma/sdxi/context.h | 105 ++++++++\n drivers/dma/sdxi/descriptor.c | 198 ++++++++++++++\n drivers/dma/sdxi/descriptor.h | 135 ++++++++++\n drivers/dma/sdxi/descriptor_kunit.c | 484 ++++++++++++++++++++++++++++++++++\n drivers/dma/sdxi/device.c | 333 ++++++++++++++++++++++++\n drivers/dma/sdxi/dma.c | 497 +++++++++++++++++++++++++++++++++++\n drivers/dma/sdxi/dma.h | 12 +\n drivers/dma/sdxi/hw.h | 254 ++++++++++++++++++\n drivers/dma/sdxi/mmio.h | 57 ++++\n drivers/dma/sdxi/pci.c | 120 +++++++++\n drivers/dma/sdxi/ring.c | 158 +++++++++++\n drivers/dma/sdxi/ring.h | 84 ++++++\n drivers/dma/sdxi/ring_kunit.c | 105 ++++++++\n drivers/dma/sdxi/sdxi.h | 149 +++++++++++\n include/linux/pci_ids.h | 1 +\n 24 files changed, 3347 insertions(+)\n---\nbase-commit: c03d8b5462bcb0022f9477d09eb37dae66c3a769\nchange-id: 20250813-sdxi-base-73d7c9fdce57\n\nBest regards,\n-- \nNathan Lynch <nathan.lynch@amd.com>" }