Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.0/patches/2223087/?format=api
{ "id": 2223087, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2223087/?format=api", "project": { "id": 41, "url": "http://patchwork.ozlabs.org/api/1.0/projects/41/?format=api", "name": "GNU C Library", "link_name": "glibc", "list_id": "libc-alpha.sourceware.org", "list_email": "libc-alpha@sourceware.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260414122311.173644-2-claudiu.zissulescu-ianculescu@oracle.com>", "date": "2026-04-14T12:23:10", "name": "[1/2] sframe: Add SFrame v3 decode support for regular FDEs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "64b362b6d91c7fd77b64122656ecb439d45ee3cd", "submitter": { "id": 90509, "url": "http://patchwork.ozlabs.org/api/1.0/people/90509/?format=api", "name": "Claudiu Zissulescu", "email": "claudiu.zissulescu-ianculescu@oracle.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/20260414122311.173644-2-claudiu.zissulescu-ianculescu@oracle.com/mbox/", "series": [ { "id": 499827, "url": "http://patchwork.ozlabs.org/api/1.0/series/499827/?format=api", "date": "2026-04-14T12:23:09", "name": "sframe: Add SFrame V3 stack backtracing support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499827/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223087/checks/", "tags": {}, "headers": { "Return-Path": "<libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "libc-alpha@sourceware.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "libc-alpha@sourceware.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oracle.com header.i=@oracle.com header.a=rsa-sha256\n header.s=corp-2025-04-25 header.b=nldq3/nD;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=oracle.onmicrosoft.com header.i=@oracle.onmicrosoft.com\n header.a=rsa-sha256 header.s=selector2-oracle-onmicrosoft-com\n header.b=qxNpF4eO;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org;\n receiver=patchwork.ozlabs.org)", "sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=oracle.com header.i=@oracle.com header.a=rsa-sha256\n header.s=corp-2025-04-25 header.b=nldq3/nD;\n\tdkim=pass (1024-bit key,\n unprotected) header.d=oracle.onmicrosoft.com header.i=@oracle.onmicrosoft.com\n header.a=rsa-sha256 header.s=selector2-oracle-onmicrosoft-com\n header.b=qxNpF4eO", "sourceware.org;\n dmarc=pass (p=reject dis=none) header.from=oracle.com", "sourceware.org; spf=pass smtp.mailfrom=oracle.com", "server2.sourceware.org;\n arc=pass smtp.remote-ip=205.220.177.32" ], "Received": [ "from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fw3NV6Xfdz1y2d\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 22:23:54 +1000 (AEST)", "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 139AF4BA2E15\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 12:23:53 +0000 (GMT)", "from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com\n [205.220.177.32])\n by sourceware.org (Postfix) with ESMTPS id 4226D4BA2E1C\n for <libc-alpha@sourceware.org>; Tue, 14 Apr 2026 12:23:24 +0000 (GMT)", "from pps.filterd (m0246632.ppops.net [127.0.0.1])\n by mx0b-00069f02.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63E9fMaE1404684\n for <libc-alpha@sourceware.org>; Tue, 14 Apr 2026 12:23:23 GMT", "from iadpaimrmta02.imrmtpd1.prodappiadaev1.oraclevcn.com\n (iadpaimrmta02.appoci.oracle.com [147.154.18.20])\n by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 4dh8682bj0-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK)\n for <libc-alpha@sourceware.org>; Tue, 14 Apr 2026 12:23:23 +0000 (GMT)", "from pps.filterd\n (iadpaimrmta02.imrmtpd1.prodappiadaev1.oraclevcn.com [127.0.0.1])\n by iadpaimrmta02.imrmtpd1.prodappiadaev1.oraclevcn.com (8.18.1.7/8.18.1.7)\n with ESMTP id 63ECJPS0031839\n for <libc-alpha@sourceware.org>; Tue, 14 Apr 2026 12:23:23 GMT", "from sn4pr2101cu001.outbound.protection.outlook.com\n (mail-southcentralusazon11012046.outbound.protection.outlook.com\n [40.93.195.46])\n by iadpaimrmta02.imrmtpd1.prodappiadaev1.oraclevcn.com (PPS) with ESMTPS id\n 4dh7nmma3u-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK)\n for <libc-alpha@sourceware.org>; Tue, 14 Apr 2026 12:23:22 +0000 (GMT)", "from CY5PR10MB6011.namprd10.prod.outlook.com (2603:10b6:930:28::16)\n by MN2PR10MB4285.namprd10.prod.outlook.com (2603:10b6:208:198::18)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9769.48; Tue, 14 Apr\n 2026 12:23:19 +0000", "from CY5PR10MB6011.namprd10.prod.outlook.com\n ([fe80::c792:6d38:1377:61cc]) by CY5PR10MB6011.namprd10.prod.outlook.com\n ([fe80::c792:6d38:1377:61cc%4]) with mapi id 15.20.9769.046; Tue, 14 Apr 2026\n 12:23:19 +0000" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org 139AF4BA2E15", "OpenDKIM Filter v2.11.0 sourceware.org 4226D4BA2E1C" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 4226D4BA2E1C", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 4226D4BA2E1C", "ARC-Seal": [ "i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1776169404; cv=pass;\n b=r6Q8q2m55zMu9Q7y4zBmKsNJtO43YcsLAdmZKSR9CV3Un1z8r3kysBCREI7QmGBQyJTwxnObD1eESvzOMb7EwELSoP7vM2v2JmojsCc2vbL5MndOIf6a0t5HQyltFL0B0m2wBdWCSrDmeKzcEkewixRu16NxeP0pSsprfWFGn4U=", "i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=VF2aFTfiW81et8Ru09X3jbL6fkTKbCoQ3jU3/OvjEfXSNvOhhg4O8DBuAz04QK16lhEbLpVNr0bPrJx8C6WOCXSAZXj8QahDFSHQ3x/SJTGuKX9LQF1HHJoQIyAR/0DAWv6FQWs90e/2Rr3ryDfGXwyT96s0Kgjdf2QNsCfS72gzSnvhmk2/BwSroLDW80SS4WgQBWv+wQVFNfcGtQTCjy2P0yHDJJmlMdJ7RNFklSNj5N9leVUbU2bpz9C4aa2bhUqGRoBfry3WEFMGQZ8l/ijvapQNhyQ29GbEjZeyInjc7EUXhWSULLWOP5ythsKfS+8vl0Nn3EUNnIWAT8o+lQ==" ], "ARC-Message-Signature": [ "i=2; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776169404; c=relaxed/simple;\n bh=urGsg958fE8uQGoSFSdNC7TfDePVLmpWF4gQzsoVIiE=;\n h=DKIM-Signature:DKIM-Signature:From:To:Subject:Date:Message-ID:\n MIME-Version;\n b=iXQRn2Pz5CSI4cYzljnnhICNGrkIyKnh8bAcrSdYw/u+utA/rkAWkx2Fr2k/PsIL5eI/mVnxcZ/FNaZgOXJt3NnRe31HQvqvmvQkNJ/mFIeUMeJTRU6zrqPn9equlAeJww2exb9G55KtbpTRNPUiER6kklxi9hHP3g9chVZWJYI=", "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=SNxr9O4I12bCJ3du/a20ngvgFeQJRRQgY1s63syTE2M=;\n b=JJerKVTUYxERw5GyarKgAyNKjV7IB6pfTdUZWa3FGwiFb+etzffHUGpeCI5E5vA5wuES596BjpL+ewqMTLyXQrGC0Uw7BT+CAGodfsFTZ2gDhXmn6FGejvbJBPXr0C0pJ9Lh7VW+x345zVjQKbgAA2q6boR62UiZF85JOAcZamEOySAiSyuWLn3R46raBcNhHdOfn69D5mkWIuXfxUWGZd8EnqtSb3oKgqshgDvFihX6lm7z88/9YncBARSl+xHan6kqFM8C46dQk+Jw3sUUTuf1P405GCWxcOLh68IEIO7Dlgxaba3EIvzaCMD59pSpJUHC+uZZIckpJI48vZxukg==" ], "ARC-Authentication-Results": [ "i=2; server2.sourceware.org", "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=oracle.com; dmarc=pass action=none header.from=oracle.com;\n dkim=pass header.d=oracle.com; arc=none" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=cc\n :content-transfer-encoding:content-type:date:from:in-reply-to\n :message-id:mime-version:references:subject:to; s=\n corp-2025-04-25; bh=SNxr9O4I12bCJ3du/a20ngvgFeQJRRQgY1s63syTE2M=; b=\n nldq3/nDC2+4s3iVzMLdFK/iLHsu8iLS5mW1S/ynOov3A4cC+FZHCufO6bhQouDP\n MjH/XlKERv0hgMTzyL5gJP/nbbLmW7v6TNepzXRvvRLMC6Rjy86J4IXyvO8SbXNk\n JwhQ3oy2x/03vCSzq3WgHvBqUpoTK0xjT0/FxOH1PJB2RUPI7/E7GUK5fQvjEa+D\n 01hbMZUPxuupzltXEgcrk3D+lUZoui3xwRVWS5PHewMfSuaivM2kFQPwRJm+GxHI\n 1hbBDb93Z4GkJh/uwcZvyomV/xwIMB9xYBv1mhKh/RvaR6PXmJpDNU/vf7/L2JRf\n 8QbZNISU31zEqJ0GnuKFTA==", "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=oracle.onmicrosoft.com; s=selector2-oracle-onmicrosoft-com;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=SNxr9O4I12bCJ3du/a20ngvgFeQJRRQgY1s63syTE2M=;\n b=qxNpF4eOP/izvh4n1fSLN6spr+YRVa5mgb6t+m15m5yLrIRBCowq6yg99XbLsBokFcG+JcXVfqqDodGYpm7ZILpazrmk1pG467LExH44s/kWohPYesaNBEFTeyBQ97dqFHOs2m0CF5Q7neDbRDaOEUzMfQuswg5vPnRal/SO1CE=" ], "From": "claudiu.zissulescu-ianculescu@oracle.com", "To": "libc-alpha@sourceware.org", "Cc": "elena.zannoni@oracle.com, jose.marchesi@oracle.com", "Subject": "[PATCH 1/2] sframe: Add SFrame v3 decode support for regular FDEs", "Date": "Tue, 14 Apr 2026 15:23:10 +0300", "Message-ID": "<20260414122311.173644-2-claudiu.zissulescu-ianculescu@oracle.com>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "\n <20260414122311.173644-1-claudiu.zissulescu-ianculescu@oracle.com>", "References": "<20260414122311.173644-1-claudiu.zissulescu-ianculescu@oracle.com>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "VI1PR04CA0051.eurprd04.prod.outlook.com\n (2603:10a6:802:2::22) To CY5PR10MB6011.namprd10.prod.outlook.com\n (2603:10b6:930:28::16)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY5PR10MB6011:EE_|MN2PR10MB4285:EE_", "X-MS-Office365-Filtering-Correlation-Id": "ba8a053c-6e5c-4f04-2c27-08de9a209cdd", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230040|1800799024|376014|366016|56012099003|22082099003|18002099003;", "X-Microsoft-Antispam-Message-Info": "\n 0nsNCY6lwDVx6zaCwNiqGS4qAnVspXX69eR+WziXq+IUkpik0mhAPSd4qss8OfMk+MtCVk+Z8QX1vusRtTrKoSud10u7UfqCWHQxh97QwDGaB4hvGuoRS13ajmyhP6XQS/efYrho6SZUXQlOh8jqpXCRFjjuoLHCQXfJZqz4fwLOQRu8dntvNB7A0rGz21VhrEVmAJXIbQKnUDhek4kwbPyYo/G+Oq9RNqhsMcjmgfXdZLd0AxC2ZtB0QVsVg6rDGjiS5TP2+Uim70R66O4axbVrbVjQ4lXe1XdCFJ0fv2vd+c4tYXBAOMTlUp9q59Z5yYwcyXeBesxMHXOwhrklkk571hqSzQX2GvdjP9a+Iw6hBWEFeO+tBf6odZv6+Kv6do8YtH5WNUh9jFdEpqmK9ucyXwmlrOlvr5Eh3C7yGO9AXZydUYU0WTdjm/zxA4rkbPeDBQmjr1Z9AljYmeRKCLfKmpbiwrg++R/fcyLCpL1yQcmhvRAk7xX5Urv7NbSQltmeIYA5/nYEcnds46xQqgBw5jqqF9e7lFkiPgr68r3NhoF9lx3M1H7/bfcZvUBt3HoRab8hJ8qJNMsEwtghMlMVwroZL+x4SFCVC5iG7X2zKQZS5vwSXiC0DEApRLgN9W2NCRSTwft25kU1Pkoglpa21UHCjquJcvMXTPE+Ata0cHMeMu3LJ5jLKc0XRS5q2AFvgF0S4zKEop0alTvX6LPHFnPQVULlN4MyN0cSCb8=", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:CY5PR10MB6011.namprd10.prod.outlook.com; PTR:; CAT:NONE;\n SFS:(13230040)(1800799024)(376014)(366016)(56012099003)(22082099003)(18002099003);\n DIR:OUT; SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n ibo8qaEkebGLuXc3+WWuYJC57PHN+rNDooRNdABg6Nf+CAWctsCoGD54KdraOVh8Bf+BJw30a0jKkpPxy07PobYYtxDqy404zgSbNxuJzkbt8PedNXBQv6drJ2RBlMEmhn02AVvl90PfZ3J5Jca5zwWu/6KRVxFlsFdhEdRR8eW3TsJ8hfzJtfjX4X7ZPNmoYSRk1pteLfRiGo+9gkauqC5KfQkoEY6u/he8BJ/3SYaprtSm68m7X/sKsUP65WVwVQkp2CZ1KwNQQRrWqexhhVi16vu52SdsZ2pxH+92b6Pc7+NdfsjiIACm7c5XbtbKKOHXErYadejqNWUQgJzY4A2DDjvZsfAgAh4LAveuExqMq5sx7jYm7SESkxT4/8/Y1yFaOrwqFjyg4q331t74ZcsxDIbapl4E7RgCsPbojih1iVu4JyBKXXsaHQ5qzRz6qHT1MgTmDuBot32GEinFFbZ54NOQpThBlamh0sDy1McCjQZ89lUNopQ9wIjY7u8zhZZTyGt2UqEAYfSFv4Wh/JN0d10wRDNj7gwMTVx6SncyXv8+6a/n0PrEU/Mf1IoDcJcCbsRQo0eYQ09I1CXnPIm0EzJ7ERIpBKcwCse2YmK1bi5/+D8L9dCb3tfa24yN2i/7dsyQcMxtq96rtuIv9rPHvjiJ/1BGu5qjWMLOzSP7KNvxuYlJDJg7RxnsR9cCOcfZclt++ua75wyZhekx9dIXH+pAN441QSw55tT1PBm+QzU6+ceMQ+cVnQmjtl/iFMqlXbbC1wPiguEImIiqreFkjEc+znz1M3GYWP8DmiZWVC9325quc8NWeS/9dPN+xSNxeYNa+mntRCH2bI9j3TckqY2KoxUtXzV8yVs4mMEbFKOCUXmeGqaQsfKtcr1zfbCxsahv9whaj91l3UPWFAEx1HA0vDxWr6yYT/67pEVDkXUa3cQPrwJWTyeYUIVneSQV1F47hBMHltEKSJKZVck5nCqjprccd7a+10WlGKl0dnoVE192lpsotPDu4L4ZAb6CsktF1TwCOA9S0lCdReo70Zb3oZC7IB3A9vN6gOWY8+JCh8iVl3jKpPVKlBwKT66Is18izz2AAprCGONMmE0HB0pAtlc6T8YDvtWcrm3mYWZalUdz/8BoLOvBsaGt2i3XLcEtuGay6Hqakf12aM9KRV+1FocyupVoDnK5M/nu6xaI/rNkcAH68DN5Zl/AMvWHAw3fq20LBHTm08V0tLXQEtmeUzetvvsY/Faf/zQ0GbaDXdE85pO6f3y5WXeAPK8oXEVbblvpGKRmNUxiiBB/GS2jTDRUuCHSI9Zao54SgqCmSsUjl6+Y6Qd3VS3AvnnRGj9+mpK2pmRGJZVSO29SIjOOfvztR5U0slqzDNaxhynp/Fv/NVN4TLGv0dhhd+UvTpawn9FdPuCtp21+v3bnW28HumtshqSOoaW40nMUkOPjMucYUjIC6q3uKlNax7g33EYRkzKO3bNVdgMSfzN7+Zd6DaAvPLI57PtOWgLytO+yEIYZPju12OuaW3yRQVrLvuvMu1JBeD1aIqHdbaxM8saUTOzkuRSKhKA8oMRiXTkzKm6dDNBiTtdq4W+Vku9xjE2gXnJkTR5r+iOojkLajtErrUMMhuaIsW/ynQTn32QS27P0iCfrV+CfsSQ8eKtpgVEdq0Q6AmiKeVfG2Q77igTKZq0cnoAhmmrQFgWJ+4L5Hmpk8QHt79yLcHb0dUxVld1MY/lzquQO5vOxd/v9Qi2Ug4tQRgqbx/efwBjdjyvHrWqFlH850rVA6kRn", "X-Exchange-RoutingPolicyChecked": "\n HCSXIlRYqHxMnvfxjHepPbjQNqHCxn17R72TG1Tsw//kJ9wOwVxvXar2U+kAzOl85eMWvmpE+WZCudNSrlXyOpm041lhx1w5HENV0pZlhtbmiVZXgXv6uG506r8b9a5u6/N4xCpXf6Nw0mDiIW47ZWkR5ldf/uLXbkH0XMT28CBalIAmb1ubeEyzJuOJc5sFFGf2FzjU/QpNBZrUuIlMLQI1da07yrzVY22sa0ulAyF1ljbR62tdFYupyLLNvmcEjMvRF3jI9IxNhj8mI7NYJ/FTccJboWeNIyclx6/b+9QyPbnL22VXno5vUW3PiPkdGy/rUps4S7QeKPsqoADDFQ==", "X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0": "\n lWI6ScEaCBARiAxl29tHW7f+Cf8wFkS4daODBqFUxvN477xhoEKuffxtQxsY8Y4DNa9V0zJnrGqCfu3r+oqoRWXWI2O3pMcrlWXCbHKhEnHJTMSlz/w7Cjusr5uVeiZowQptbCJBtFNUbEZAx5kepOKhqW/S0dBeKqlC1P4Y825Kw/jmBE/5tyGfNBhiggpMiQN3TdIYAuM5FzLAzUtCR/xFrD/50mn2gugaVqM7Tl0MaQwJJU3w98OZyX434D/hqL4IbZkyfQ+o4ZqNneNgEcvQpomhfG6TxT5CsM3fqtTI9m3S87R6KuGhACrmV3GAat4ptp3cMwlShcW0F+kYjn4+2ZoVjxztC7jcVJyy4ud7dvM9QKYlJsu9O+lxlHCs73xAav2T50sEY84/6rOSWtrkYL2xTZHaJf5OCdWBvfdH+54H8c+WaDsW3UAHZcXEhqA0AY1VPJlZ44bmGeBXUq7ixtGvjqF62Qn1cLGB8FG60l+9gqG8JkddmpvCBzBl2X28ykOlYByWF+nscYPZOGxWtFk/xL501euXzmga7DF1W5G3+lX80BpBBNYo6IDzA6FkWlSwExFhRbEG+CqMuGxwgnhSf9uvepGi+hcyakw=", "X-OriginatorOrg": "oracle.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n ba8a053c-6e5c-4f04-2c27-08de9a209cdd", "X-MS-Exchange-CrossTenant-AuthSource": "CY5PR10MB6011.namprd10.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "14 Apr 2026 12:23:19.7606 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "4e2c6054-71cb-48f1-bd6c-3a9705aca71b", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n pYatvk7M+YmYLkVZ+Wgg+b32BpzuBdx0y5uQplEQf8izircIQKUIugD0e6+fvzfzYkzMEuqSGiQlk9UtvQ+8mAIE69pKFSn7Oo6WwWQwtUjgQAMr/PmJH+F+Lzgtxoip38eY8yOnjVIO7TmB0WOLtQ==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR10MB4285", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-14_03,2026-04-13_04,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=notspam policy=default score=0\n lowpriorityscore=0 phishscore=0 mlxlogscore=999 bulkscore=0 spamscore=0\n malwarescore=0 suspectscore=0 mlxscore=0 adultscore=0 classifier=spam\n adjust=0 reason=mlx scancount=1 engine=8.19.0-2604070000\n definitions=main-2604140115", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDE0MDExNSBTYWx0ZWRfX/lYaF+xaSC8P\n PBlEElp/f/N/8Q95ieVa7xApaz7oRYRehM0D3CiyItE660DQMO0FftQI2ojLs/TF7gZxNIz6qbN\n Jzgy4WJmDllNICwN977qXzcSy3fS9JcrNO5ypGXw9ByfQv0Gk7DgLoD/jSxMBD8FPzd6T8r/JEJ\n vf3zS2bxxak+YaSfDk6lzgHwVnddkR0XrovHAY2fdwrvJ1ZYTtWuDQiMOm0I4DAXiQrGZmFAYyP\n 0NBpz21y9aiE0dUeWAjYoRr05GUcMckM6/DRwGSLj3bdC4hH/Nsd7/eHt8eKeF89S6gWqIcnUY3\n c7UPa/L0wE0G6mw7+oLEhcE4iFaTjOVWTgwSefK+nUcpEimQ//NmsotL2gUtkA/jprRcd7LL+aY\n 2e8qizEVWuMywNzoieGYnhj+wqusDz/P4qp42oRTtiJrARbbCodJr0DWczcl0Up38BwdCrtrh0R\n lRmydEjbehg9ICltPOFf5xWEYiGc0BeSsqe0i0E8=", "X-Proofpoint-GUID": "HxapdR7lNKMkL_omiaGjRqVEhm0b5Sjg", "X-Proofpoint-ORIG-GUID": "HxapdR7lNKMkL_omiaGjRqVEhm0b5Sjg", "X-Authority-Analysis": "v=2.4 cv=JY6Ma0KV c=1 sm=1 tr=0 ts=69de31bb b=1 cx=c_pps\n a=e1sVV491RgrpLwSTMOnk8w==:117\n a=e1sVV491RgrpLwSTMOnk8w==:17\n a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19\n a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=A5OVakUREuEA:10\n a=GoEa3M9JfhUA:10 a=VkNPw1HP01LnGYTKEx00:22 a=jiCTI4zE5U7BLdzWsZGv:22\n a=3I1J8UUJPc9JN9BFgKH3:22 a=yPCof4ZbAAAA:8 a=XaIcZU7q1KEy9Zk2DxEA:9\n a=esB8q-t_bEDkH78P:21 cc=ntf awl=host:13825", "X-BeenThere": "libc-alpha@sourceware.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Libc-alpha mailing list <libc-alpha.sourceware.org>", "List-Unsubscribe": "<https://sourceware.org/mailman/options/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe>", "List-Archive": "<https://sourceware.org/pipermail/libc-alpha/>", "List-Post": "<mailto:libc-alpha@sourceware.org>", "List-Help": "<mailto:libc-alpha-request@sourceware.org?subject=help>", "List-Subscribe": "<https://sourceware.org/mailman/listinfo/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=subscribe>", "Errors-To": "libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org" }, "content": "From: Claudiu Zissulescu <claudiu.zissulescu-ianculescu@oracle.com>\n\nAdd SFrame v3 format definitions and modify the backtrace routines to\nhandle both v2 and v3 function descriptor layouts.\n\nThe sframe stack trace backtracer now detects the outer most frame\nreturning without error. Also, the decoder reads v3 index/attribute\nrecords, performs explicit bounds checks for FRE access, and uses\nint64_t PC/start-address handling for version-agnostic lookup.\n---\n sysdeps/generic/sframe-read.c | 328 +++++++++++++++++++++++++---------\n sysdeps/generic/sframe-read.h | 4 +-\n sysdeps/generic/sframe.c | 4 +\n sysdeps/generic/sframe.h | 156 ++++++++++++++--\n 4 files changed, 397 insertions(+), 95 deletions(-)", "diff": "diff --git a/sysdeps/generic/sframe-read.c b/sysdeps/generic/sframe-read.c\nindex 0b339cc981..9464cd71e6 100644\n--- a/sysdeps/generic/sframe-read.c\n+++ b/sysdeps/generic/sframe-read.c\n@@ -21,6 +21,18 @@\n #include <assert.h>\n #include <sframe-read.h>\n \n+/* Representation of SFrame FDE internal to libsframe. */\n+typedef struct sframe_func_desc_entry_int\n+{\n+ int64_t func_start_address;\n+ uint32_t func_size;\n+ uint32_t func_start_fre_off;\n+ uint32_t func_num_fres;\n+ uint8_t func_info;\n+ uint8_t func_info2;\n+ uint8_t func_rep_size;\n+} sframe_func_desc_entry_int;\n+\n /* Get the SFrame header size. */\n \n static inline uint32_t\n@@ -52,33 +64,51 @@ sframe_get_fre_ra_mangled_p (uint8_t fre_info)\n /* Access functions for info from function descriptor entry. */\n \n static uint32_t\n-sframe_get_fre_type (sframe_func_desc_entry *fdep)\n+sframe_get_fre_type (sframe_func_desc_entry_int *fdep, uint8_t version)\n {\n- uint32_t fre_type = 0;\n- if (fdep != NULL)\n- fre_type = SFRAME_V1_FUNC_FRE_TYPE (fdep->sfde_func_info);\n- return fre_type;\n+ if (fdep == NULL)\n+ return 0;\n+ if (version == SFRAME_VERSION_3)\n+ return SFRAME_V3_FDE_FRE_TYPE (fdep->func_info);\n+ return SFRAME_V1_FUNC_FRE_TYPE (fdep->func_info);\n+}\n+\n+static uint32_t\n+sframe_get_fde_pc_type (sframe_func_desc_entry_int *fdep, uint8_t version)\n+{\n+ if (fdep == NULL)\n+ return 0;\n+ if (version == SFRAME_VERSION_3)\n+ return SFRAME_V3_FDE_PC_TYPE (fdep->func_info);\n+ return SFRAME_V1_FUNC_FDE_TYPE (fdep->func_info);\n }\n \n static uint32_t\n-sframe_get_fde_type (sframe_func_desc_entry *fdep)\n+sframe_get_fde_type (sframe_func_desc_entry_int *fdep, uint8_t version)\n {\n- uint32_t fde_type = 0;\n- if (fdep != NULL)\n- fde_type = SFRAME_V1_FUNC_FDE_TYPE (fdep->sfde_func_info);\n- return fde_type;\n+ if (fdep == NULL)\n+ return 0;\n+ if (version == SFRAME_VERSION_3)\n+ return SFRAME_V3_FDE_TYPE (fdep->func_info2);\n+ return SFRAME_FDE_TYPE_DEFAULT;\n }\n \n-/* Check if SFrame header has valid data. Only consider SFrame type\n- 2. */\n+/* Check if SFrame header has valid data (v2 or v3). */\n \n static bool\n sframe_header_sanity_check_p (sframe_header *hp)\n {\n+ uint8_t valid_flags;\n+\n /* Check preamble is valid. */\n if ((hp->sfh_preamble.sfp_magic != SFRAME_MAGIC)\n- || (hp->sfh_preamble.sfp_version != SFRAME_VERSION_2)\n- || (hp->sfh_preamble.sfp_flags & ~SFRAME_V2_F_ALL_FLAGS))\n+ || (hp->sfh_preamble.sfp_version != SFRAME_VERSION_2\n+\t && hp->sfh_preamble.sfp_version != SFRAME_VERSION_3))\n+ return false;\n+\n+ valid_flags = (hp->sfh_preamble.sfp_version == SFRAME_VERSION_3\n+\t\t ? SFRAME_V3_F_ALL_FLAGS : SFRAME_V2_F_ALL_FLAGS);\n+ if (hp->sfh_preamble.sfp_flags & ~valid_flags)\n return false;\n \n /* Check offsets are valid. */\n@@ -181,6 +211,78 @@ sframe_decoder_get_header (sframe_decoder_ctx *dctx)\n return hp;\n }\n \n+static inline uint8_t\n+sframe_decoder_get_version (sframe_decoder_ctx *dctx)\n+{\n+ sframe_header *hp = sframe_decoder_get_header (dctx);\n+ return hp != NULL ? hp->sfh_preamble.sfp_version : 0;\n+}\n+\n+/* Read function descriptor data at FUNC_IDX in DCTX and fill FDEP. */\n+\n+static bool\n+sframe_decoder_get_funcdesc_at_index (sframe_decoder_ctx *dctx,\n+\t\t\t\t uint32_t func_idx,\n+\t\t\t\t sframe_func_desc_entry_int *fdep)\n+{\n+ sframe_header *dhp;\n+ uint8_t version;\n+\n+ if (fdep == NULL)\n+ return false;\n+\n+ dhp = sframe_decoder_get_header (dctx);\n+ if (dhp == NULL\n+ || func_idx >= dhp->sfh_num_fdes\n+ || dctx->sfd_funcdesc == NULL)\n+ return false;\n+\n+ version = sframe_decoder_get_version (dctx);\n+ if (version == SFRAME_VERSION_3)\n+ {\n+ const sframe_func_desc_idx_v3 *fdip;\n+ const sframe_func_desc_attr_v3 *fdap;\n+ uint32_t fre_off, fre_bytes;\n+\n+ if (dctx->sfd_fres == NULL || dctx->sfd_fre_nbytes < 0)\n+\treturn false;\n+\n+ fdip = ((const sframe_func_desc_idx_v3 *) dctx->sfd_funcdesc) + func_idx;\n+ fre_off = fdip->sfdi_func_start_fre_off;\n+ fre_bytes = (uint32_t) dctx->sfd_fre_nbytes;\n+ if (fre_off > fre_bytes\n+\t || fre_bytes - fre_off < sizeof (sframe_func_desc_attr_v3))\n+\treturn false;\n+\n+ fdap = (const sframe_func_desc_attr_v3 *) (dctx->sfd_fres + fre_off);\n+ fdep->func_start_address = fdip->sfdi_func_start_offset;\n+ fdep->func_size = fdip->sfdi_func_size;\n+ fdep->func_start_fre_off = fre_off;\n+ fdep->func_num_fres = fdap->sfda_func_num_fres;\n+ fdep->func_info = fdap->sfda_func_info;\n+ fdep->func_info2 = fdap->sfda_func_info2;\n+ fdep->func_rep_size = fdap->sfda_func_rep_size;\n+ return true;\n+ }\n+\n+ if (version == SFRAME_VERSION_2)\n+ {\n+ const sframe_func_desc_entry_v2 *fdp;\n+\n+ fdp = ((const sframe_func_desc_entry_v2 *) dctx->sfd_funcdesc) + func_idx;\n+ fdep->func_start_address = fdp->sfde_func_start_address;\n+ fdep->func_size = fdp->sfde_func_size;\n+ fdep->func_start_fre_off = fdp->sfde_func_start_fre_off;\n+ fdep->func_num_fres = fdp->sfde_func_num_fres;\n+ fdep->func_info = fdp->sfde_func_info;\n+ fdep->func_info2 = 0;\n+ fdep->func_rep_size = fdp->sfde_func_rep_size;\n+ return true;\n+ }\n+\n+ return false;\n+}\n+\n /* Get the offset of the sfde_func_start_address field (from the start of the\n on-disk layout of the SFrame section) of the FDE at FUNC_IDX in the decoder\n context DCTX. */\n@@ -209,9 +311,16 @@ sframe_decoder_get_offsetof_fde_start_addr (sframe_decoder_ctx *dctx,\n else if (errp != NULL)\n *errp = _URC_NO_REASON;\n \n+ if (sframe_decoder_get_version (dctx) == SFRAME_VERSION_3)\n+ return (sframe_get_hdr_size (dhp)\n+\t + dhp->sfh_fdeoff\n+\t + func_idx * sizeof (sframe_func_desc_idx_v3)\n+\t + offsetof (sframe_func_desc_idx_v3, sfdi_func_start_offset));\n+\n return (sframe_get_hdr_size (dhp)\n-\t + func_idx * sizeof (sframe_func_desc_entry)\n-\t + offsetof (sframe_func_desc_entry, sfde_func_start_address));\n+\t + dhp->sfh_fdeoff\n+\t + func_idx * sizeof (sframe_func_desc_entry_v2)\n+\t + offsetof (sframe_func_desc_entry_v2, sfde_func_start_address));\n }\n \n \n@@ -222,13 +331,22 @@ sframe_decoder_get_offsetof_fde_start_addr (sframe_decoder_ctx *dctx,\n \n If FUNC_IDX is not a valid index in the given decoder object, returns 0. */\n \n-static int32_t\n+static int64_t\n sframe_decoder_get_secrel_func_start_addr (sframe_decoder_ctx *dctx,\n-\t\t\t\t\t uint32_t func_idx)\n+\t\t\t\t\t uint32_t func_idx,\n+\t\t\t\t\t sframe_func_desc_entry_int *fdep)\n {\n- int32_t func_start_addr;\n+ int64_t func_start_addr;\n _Unwind_Reason_Code err = 0;\n- int32_t offsetof_fde_in_sec = 0;\n+ uint32_t offsetof_fde_in_sec = 0;\n+ sframe_func_desc_entry_int fdesc;\n+\n+ if (fdep == NULL)\n+ {\n+ if (!sframe_decoder_get_funcdesc_at_index (dctx, func_idx, &fdesc))\n+\treturn 0;\n+ fdep = &fdesc;\n+ }\n \n /* Check if we have SFRAME_F_FDE_FUNC_START_PCREL. */\n sframe_header *sh = &dctx->sfd_header;\n@@ -241,7 +359,7 @@ sframe_decoder_get_secrel_func_start_addr (sframe_decoder_ctx *dctx,\n \treturn 0;\n }\n \n- func_start_addr = dctx->sfd_funcdesc[func_idx].sfde_func_start_address;\n+ func_start_addr = fdep->func_start_address;\n \n return func_start_addr + offsetof_fde_in_sec;\n }\n@@ -251,25 +369,28 @@ sframe_decoder_get_secrel_func_start_addr (sframe_decoder_ctx *dctx,\n FUNC_IDX). */\n \n static bool\n-sframe_fre_check_range_p (sframe_decoder_ctx *dctx, uint32_t func_idx,\n+sframe_fre_check_range_p (sframe_decoder_ctx *dctx,\n+\t\t\t sframe_func_desc_entry_int *fdep,\n+\t\t\t uint32_t func_idx,\n \t\t\t uint32_t start_ip_offset, uint32_t end_ip_offset,\n-\t\t\t int32_t pc)\n+\t\t\t int64_t pc)\n {\n- sframe_func_desc_entry *fdep;\n- int32_t func_start_addr;\n+ int64_t func_start_addr;\n uint8_t rep_block_size;\n- uint32_t fde_type;\n- uint32_t pc_offset;\n+ uint32_t fde_pc_type;\n+ uint64_t pc_offset;\n bool mask_p;\n+ uint8_t version;\n \n- fdep = &dctx->sfd_funcdesc[func_idx];\n if (fdep == NULL)\n return false;\n \n- func_start_addr = sframe_decoder_get_secrel_func_start_addr (dctx, func_idx);\n- fde_type = sframe_get_fde_type (fdep);\n- mask_p = (fde_type == SFRAME_FDE_TYPE_PCMASK);\n- rep_block_size = fdep->sfde_func_rep_size;\n+ version = sframe_decoder_get_version (dctx);\n+ func_start_addr = sframe_decoder_get_secrel_func_start_addr (dctx, func_idx,\n+\t\t\t\t\t\t\t fdep);\n+ fde_pc_type = sframe_get_fde_pc_type (fdep, version);\n+ mask_p = (fde_pc_type == SFRAME_FDE_TYPE_PCMASK);\n+ rep_block_size = fdep->func_rep_size;\n \n if (func_start_addr > pc)\n return false;\n@@ -279,7 +400,11 @@ sframe_fre_check_range_p (sframe_decoder_ctx *dctx, uint32_t func_idx,\n /* For SFrame FDEs encoding information for repetitive pattern of insns,\n masking with the rep_block_size is necessary to find the matching FRE. */\n if (mask_p)\n+ {\n+ if (rep_block_size == 0)\n+\treturn false;\n pc_offset = pc_offset % rep_block_size;\n+ }\n \n return (start_ip_offset <= pc_offset) && (end_ip_offset >= pc_offset);\n }\n@@ -360,68 +485,72 @@ sframe_decode_fre_start_address (const char *fre_buf,\n /* Find the function descriptor entry starting which contains the specified\n address ADDR. */\n \n-static sframe_func_desc_entry *\n-sframe_get_funcdesc_with_addr_internal (sframe_decoder_ctx *ctx, int32_t addr,\n-\t\t\t\t\tint *errp, uint32_t *func_idx)\n+static bool\n+sframe_get_funcdesc_with_addr_internal (sframe_decoder_ctx *ctx, int64_t addr,\n+\t\t\t\t\tsframe_func_desc_entry_int *fdep,\n+\t\t\t\t\tuint32_t *func_idx)\n {\n sframe_header *dhp;\n- sframe_func_desc_entry *fdp;\n int low, high;\n \n- if (ctx == NULL)\n- return NULL;\n+ if (ctx == NULL || fdep == NULL || func_idx == NULL)\n+ return false;\n \n dhp = sframe_decoder_get_header (ctx);\n \n if (dhp == NULL || dhp->sfh_num_fdes == 0 || ctx->sfd_funcdesc == NULL)\n- return NULL;\n+ return false;\n /* If the FDE sub-section is not sorted on PCs, skip the lookup because\n binary search cannot be used. */\n if ((dhp->sfh_preamble.sfp_flags & SFRAME_F_FDE_SORTED) == 0)\n- return NULL;\n+ return false;\n \n- /* Do the binary search. */\n- fdp = (sframe_func_desc_entry *) ctx->sfd_funcdesc;\n low = 0;\n high = dhp->sfh_num_fdes - 1;\n while (low <= high)\n {\n int mid = low + (high - low) / 2;\n+ sframe_func_desc_entry_int mid_fde;\n+ int64_t start_addr;\n+\n+ if (!sframe_decoder_get_funcdesc_at_index (ctx, mid, &mid_fde))\n+\treturn false;\n \n- /* Given sfde_func_start_address <= addr,\n-\t addr - sfde_func_start_address must be positive. */\n- if (sframe_decoder_get_secrel_func_start_addr (ctx, mid) <= addr\n-\t && ((uint32_t)(addr - sframe_decoder_get_secrel_func_start_addr (ctx,\n-\t\t\t\t\t\t\t\t\t mid))\n-\t < fdp[mid].sfde_func_size))\n+ start_addr = sframe_decoder_get_secrel_func_start_addr (ctx, mid,\n+\t\t\t\t\t\t\t &mid_fde);\n+ /* Given start_addr <= addr, addr - start_addr must be positive. */\n+ if (start_addr <= addr\n+\t && ((uint64_t) (addr - start_addr) < mid_fde.func_size))\n \t{\n \t *func_idx = mid;\n-\t return fdp + mid;\n+\t *fdep = mid_fde;\n+\t return true;\n \t}\n \n- if (sframe_decoder_get_secrel_func_start_addr (ctx, mid) < addr)\n+ if (start_addr < addr)\n \tlow = mid + 1;\n else\n \thigh = mid - 1;\n }\n \n- return NULL;\n+ return false;\n }\n \n /* Get the end IP offset for the FRE at index i in the FDEP. The buffer FRES\n is the starting location for the FRE. */\n \n static uint32_t\n-sframe_fre_get_end_ip_offset (sframe_func_desc_entry *fdep, unsigned int i,\n-\t\t\t const char *fres)\n+sframe_fre_get_end_ip_offset (sframe_func_desc_entry_int *fdep,\n+\t\t\t uint8_t version,\n+\t\t\t unsigned int i, const char *fres)\n {\n uint32_t end_ip_offset = 0;\n uint32_t fre_type;\n \n- fre_type = sframe_get_fre_type (fdep);\n+ fre_type = sframe_get_fre_type (fdep, version);\n \n /* Get the start address of the next FRE in sequence. */\n- if (i < fdep->sfde_func_num_fres - 1)\n+ if (i < fdep->func_num_fres - 1)\n {\n sframe_decode_fre_start_address (fres, &end_ip_offset, fre_type);\n end_ip_offset -= 1;\n@@ -429,7 +558,7 @@ sframe_fre_get_end_ip_offset (sframe_func_desc_entry *fdep, unsigned int i,\n else\n /* The end IP offset for the FRE needs to be deduced from the function\n size. */\n- end_ip_offset = fdep->sfde_func_size - 1;\n+ end_ip_offset = fdep->func_size - 1;\n \n return end_ip_offset;\n }\n@@ -528,11 +657,13 @@ _Unwind_Reason_Code\n __sframe_decode (sframe_decoder_ctx *dctx, const char *sf_buf)\n {\n const sframe_preamble *sfp;\n+ char *frame_buf;\n+ const char *payload;\n size_t hdrsz;\n+ size_t fde_desc_size;\n+ size_t fde_table_size;\n sframe_header *sfheaderp;\n- char *frame_buf;\n-\n- int fidx_size;\n+ uint8_t version;\n uint32_t fre_bytes;\n \n if (sf_buf == NULL)\n@@ -555,15 +686,23 @@ __sframe_decode (sframe_decoder_ctx *dctx, const char *sf_buf)\n return _URC_END_OF_STACK;\n \n hdrsz = sframe_get_hdr_size (sfheaderp);\n- frame_buf += hdrsz;\n+ payload = frame_buf + hdrsz;\n+ version = sfheaderp->sfh_preamble.sfp_version;\n+\n+ fde_desc_size = (version == SFRAME_VERSION_3\n+\t\t ? sizeof (sframe_func_desc_idx_v3)\n+\t\t : sizeof (sframe_func_desc_entry_v2));\n+ fde_table_size = sfheaderp->sfh_num_fdes * fde_desc_size;\n+ if (sfheaderp->sfh_freoff < sfheaderp->sfh_fdeoff\n+ || (size_t) (sfheaderp->sfh_freoff - sfheaderp->sfh_fdeoff)\n+\t < fde_table_size)\n+ return _URC_END_OF_STACK;\n \n /* Handle the SFrame Function Descriptor Entry section. */\n- fidx_size\n- = sfheaderp->sfh_num_fdes * sizeof (sframe_func_desc_entry);\n- dctx->sfd_funcdesc = (sframe_func_desc_entry *)frame_buf;\n- frame_buf += (fidx_size);\n+ dctx->sfd_funcdesc\n+ = (sframe_func_desc_entry_v2 *) (payload + sfheaderp->sfh_fdeoff);\n \n- dctx->sfd_fres = frame_buf;\n+ dctx->sfd_fres = (char *) (payload + sfheaderp->sfh_freoff);\n fre_bytes = sfheaderp->sfh_fre_len;\n dctx->sfd_fre_nbytes = fre_bytes;\n \n@@ -574,55 +713,84 @@ __sframe_decode (sframe_decoder_ctx *dctx, const char *sf_buf)\n _URC_END_OF_STACK if failure. */\n \n _Unwind_Reason_Code\n-__sframe_find_fre (sframe_decoder_ctx *ctx, int32_t pc,\n+__sframe_find_fre (sframe_decoder_ctx *ctx, int64_t pc,\n \t\t sframe_frame_row_entry *frep)\n {\n- sframe_func_desc_entry *fdep;\n+ sframe_func_desc_entry_int fdep;\n uint32_t func_idx;\n+ uint8_t version;\n uint32_t fre_type, i;\n uint32_t start_ip_offset;\n- int32_t func_start_addr;\n+ int64_t func_start_addr;\n uint32_t end_ip_offset;\n+ const char *fres_end;\n const char *fres;\n size_t size = 0;\n- int err = 0;\n \n if ((ctx == NULL) || (frep == NULL))\n return _URC_END_OF_STACK;\n \n+ version = sframe_decoder_get_version (ctx);\n+\n /* Find the FDE which contains the PC, then scan its fre entries. */\n- fdep = sframe_get_funcdesc_with_addr_internal (ctx, pc, &err, &func_idx);\n- if (fdep == NULL || ctx->sfd_fres == NULL)\n+ if (!sframe_get_funcdesc_with_addr_internal (ctx, pc, &fdep, &func_idx)\n+ || ctx->sfd_fres == NULL)\n return _URC_END_OF_STACK;\n \n- fre_type = sframe_get_fre_type (fdep);\n+ /* Glibc's SFrame unwinder currently supports only DEFAULT FDEs. */\n+ if (sframe_get_fde_type (&fdep, version) != SFRAME_FDE_TYPE_DEFAULT)\n+ return _URC_END_OF_STACK;\n \n- fres = ctx->sfd_fres + fdep->sfde_func_start_fre_off;\n- func_start_addr = sframe_decoder_get_secrel_func_start_addr (ctx, func_idx);\n+ fre_type = sframe_get_fre_type (&fdep, version);\n+ fres = ctx->sfd_fres + fdep.func_start_fre_off;\n+ if (version == SFRAME_VERSION_3)\n+ fres += sizeof (sframe_func_desc_attr_v3);\n \n- for (i = 0; i < fdep->sfde_func_num_fres; i++)\n+ if (ctx->sfd_fre_nbytes < 0)\n+ return _URC_END_OF_STACK;\n+ fres_end = ctx->sfd_fres + (size_t) ctx->sfd_fre_nbytes;\n+ if (fres > fres_end)\n+ return _URC_END_OF_STACK;\n+\n+ func_start_addr = sframe_decoder_get_secrel_func_start_addr (ctx, func_idx,\n+\t\t\t\t\t\t\t &fdep);\n+\n+ for (i = 0; i < fdep.func_num_fres; i++)\n {\n size_t addr_size;\n \n+ addr_size = sframe_fre_start_addr_size (fre_type);\n+ if (addr_size == 0)\n+\treturn _URC_END_OF_STACK;\n+\n+ if ((size_t) (fres_end - fres) < addr_size)\n+\treturn _URC_END_OF_STACK;\n+\n /* Partially decode the FRE. */\n sframe_decode_fre_start_address (fres, &frep->fre_start_addr, fre_type);\n \n- addr_size = sframe_fre_start_addr_size (fre_type);\n- if (addr_size == 0)\n+ if ((size_t) (fres_end - fres) < addr_size + sizeof (frep->fre_info))\n \treturn _URC_END_OF_STACK;\n \n frep->fre_info = *(uint8_t *)(fres + addr_size);\n size = sframe_fre_entry_size (frep, addr_size);\n+ if ((size_t) (fres_end - fres) < size)\n+\treturn _URC_END_OF_STACK;\n+ if (i < fdep.func_num_fres - 1\n+\t && (size_t) (fres_end - (fres + size)) < addr_size)\n+\treturn _URC_END_OF_STACK;\n \n start_ip_offset = frep->fre_start_addr;\n- end_ip_offset = sframe_fre_get_end_ip_offset (fdep, i, fres + size);\n+ end_ip_offset = sframe_fre_get_end_ip_offset (&fdep, version, i,\n+\t\t\t\t\t\t fres + size);\n \n /* Stop search if FRE's start_ip is greater than pc. Given\n \tfunc_start_addr <= pc, pc - func_start_addr must be positive. */\n- if (start_ip_offset > (uint32_t) (pc - func_start_addr))\n+ if (func_start_addr > pc\n+\t || start_ip_offset > (uint64_t) (pc - func_start_addr))\n \treturn _URC_END_OF_STACK;\n \n- if (sframe_fre_check_range_p (ctx, func_idx, start_ip_offset,\n+ if (sframe_fre_check_range_p (ctx, &fdep, func_idx, start_ip_offset,\n \t\t\t\t end_ip_offset, pc))\n \t{\n \t /* Decode last FRE bits: offsets size. */\ndiff --git a/sysdeps/generic/sframe-read.h b/sysdeps/generic/sframe-read.h\nindex db9547b5b5..9bda6b1b19 100644\n--- a/sysdeps/generic/sframe-read.h\n+++ b/sysdeps/generic/sframe-read.h\n@@ -31,7 +31,7 @@ typedef struct sframe_decoder_ctx\n \n sframe_header sfd_header;\n \n- sframe_func_desc_entry *sfd_funcdesc;\n+ sframe_func_desc_entry_v2 *sfd_funcdesc;\n /* SFrame FRE table. */\n char *sfd_fres;\n /* Number of bytes needed for SFrame FREs. */\n@@ -67,7 +67,7 @@ __sframe_decode (sframe_decoder_ctx *dctx, const char *cf_buf);\n _URC_END_OF_STACK if failure. */\n \n extern _Unwind_Reason_Code\n-__sframe_find_fre (sframe_decoder_ctx *ctx, int32_t pc,\n+__sframe_find_fre (sframe_decoder_ctx *ctx, int64_t pc,\n \t\t sframe_frame_row_entry *frep);\n \n /* Get the base reg id from the FRE info. */\ndiff --git a/sysdeps/generic/sframe.c b/sysdeps/generic/sframe.c\nindex bcee70cf60..3c5721f513 100644\n--- a/sysdeps/generic/sframe.c\n+++ b/sysdeps/generic/sframe.c\n@@ -117,6 +117,10 @@ __stacktrace_sframe (void **ra_lst, int count, frame *frame)\n \t return 0;\n \t}\n \n+ /* A FRE with undefined RA indicates the outermost frame. */\n+ if (SFRAME_V2_FRE_RA_UNDEFINED_P (frep->fre_info))\n+\treturn i;\n+\n /* Get the CFA offset from the FRE. If offset is unavailable,\n \t sets err. */\n cfa_offset = __sframe_fre_get_cfa_offset (dctx, frep, &err);\ndiff --git a/sysdeps/generic/sframe.h b/sysdeps/generic/sframe.h\nindex c7717af473..2bb720bb43 100644\n--- a/sysdeps/generic/sframe.h\n+++ b/sysdeps/generic/sframe.h\n@@ -72,10 +72,11 @@ extern \"C\"\n /* SFrame format versions. */\n #define SFRAME_VERSION_1\t1\n #define SFRAME_VERSION_2\t2\n+#define SFRAME_VERSION_3 3\n /* SFrame magic number. */\n #define SFRAME_MAGIC\t\t0xdee2\n /* Current version of SFrame format. */\n-#define SFRAME_VERSION\tSFRAME_VERSION_2\n+#define SFRAME_VERSION\tSFRAME_VERSION_3\n \n /* Various flags for SFrame. */\n \n@@ -95,6 +96,10 @@ extern \"C\"\n (SFRAME_F_FDE_SORTED | SFRAME_F_FRAME_POINTER \\\n | SFRAME_F_FDE_FUNC_START_PCREL)\n \n+/* Set of all defined flags in SFrame V3. */\n+#define SFRAME_V3_F_ALL_FLAGS \\\n+ (SFRAME_F_FDE_SORTED | SFRAME_F_FDE_FUNC_START_PCREL)\n+\n #define SFRAME_CFA_FIXED_FP_INVALID 0\n #define SFRAME_CFA_FIXED_RA_INVALID 0\n \n@@ -102,6 +107,7 @@ extern \"C\"\n #define SFRAME_ABI_AARCH64_ENDIAN_BIG 1 /* AARCH64 big endian. */\n #define SFRAME_ABI_AARCH64_ENDIAN_LITTLE 2 /* AARCH64 little endian. */\n #define SFRAME_ABI_AMD64_ENDIAN_LITTLE 3 /* AMD64 little endian. */\n+#define SFRAME_ABI_S390X_ENDIAN_BIG 4 /* s390x big endian. */\n \n /* SFrame FRE types. */\n #define SFRAME_FRE_TYPE_ADDR1\t0\n@@ -131,6 +137,19 @@ extern \"C\"\n matching FRE. */\n #define SFRAME_FDE_TYPE_PCMASK 1\n \n+/* SFrame FDE types. */\n+\n+/* Default FDE type. */\n+#define SFRAME_FDE_TYPE_DEFAULT\t 0\n+/* Flexible Frame FDE type.\n+ The recovery rule for CFA, RA and FP allow more flexibility. Examples of\n+ patterns supported include:\n+ - CFA may be non-SP/FP based.\n+ - CFA, FP may encode dereferencing of register after offset adjustment\n+ - RA may be in a non-default register.\n+ Currently used for SFRAME_ABI_AMD64_ENDIAN_LITTLE. */\n+#define SFRAME_FDE_TYPE_FLEX\t 1\n+\n typedef struct sframe_preamble\n {\n uint16_t sfp_magic;\t/* Magic number (SFRAME_MAGIC). */\n@@ -180,7 +199,7 @@ typedef struct sframe_header\n #define SFRAME_AARCH64_PAUTH_KEY_A 0 /* Key A. */\n #define SFRAME_AARCH64_PAUTH_KEY_B 1 /* Key B. */\n \n-typedef struct sframe_func_desc_entry\n+typedef struct sframe_func_desc_entry_v2\n {\n /* Function start address. Encoded as a signed offset, relative to the\n beginning of the current FDE. */\n@@ -199,7 +218,7 @@ typedef struct sframe_func_desc_entry\n - 2-bits: Unused.\n ------------------------------------------------------------------------\n | Unused | PAC auth A/B key (aarch64) | FDE type | FRE type |\n- | | Unused (amd64) | | |\n+ | | Unused (amd64, s390x) | | |\n ------------------------------------------------------------------------\n 8 6 5 4 0 */\n uint8_t sfde_func_info;\n@@ -207,7 +226,7 @@ typedef struct sframe_func_desc_entry\n SFRAME_FDE_TYPE_PCMASK. */\n uint8_t sfde_func_rep_size;\n uint16_t sfde_func_padding2;\n-} __attribute__ ((packed)) sframe_func_desc_entry;\n+} __attribute__ ((packed)) sframe_func_desc_entry_v2;\n \n /* Macros to compose and decompose function info in FDE. */\n \n@@ -224,6 +243,87 @@ typedef struct sframe_func_desc_entry\n #define SFRAME_V1_FUNC_INFO_UPDATE_PAUTH_KEY(pauth_key, fde_info) \\\n ((((pauth_key) & 0x1) << 5) | ((fde_info) & 0xdf))\n \n+/* SFrame V2 has similar SFrame FDE representation as SFrame V1. */\n+#define SFRAME_V2_FUNC_PC_TYPE(data) (SFRAME_V1_FUNC_FDE_TYPE (data))\n+#define SFRAME_V2_FUNC_FRE_TYPE(data) (SFRAME_V1_FUNC_FRE_TYPE (data))\n+\n+/* SFrame Function Descriptor Entry PC types.\n+\n+ The SFrame format has two possible representations for functions' PC Type.\n+ The choice of which PC type to use is made according to the instruction\n+ patterns in the relevant program stub.\n+\n+ The PC type SFRAME_V3_FDE_PCTYPE_INC is an indication that the PCs in the\n+ FREs should be treated as increments in bytes. This is used for a bulk of\n+ the executable code of a program, which contains instructions with no\n+ specific pattern.\n+\n+ The PC type SFRAME_V3_FDE_PCTYPE_MASK is an indication that the PCs in the\n+ FREs should be treated as masks. This type is useful for the cases when a\n+ small pattern of instructions in a program stub is repeatedly to cover a\n+ specific functionality. Typical usescases are pltN entries, trampolines\n+ etc.\n+\n+ NB: In SFrame version 2 or lower, the names SFRAME_FDE_TYPE_PCINC and\n+ SFRAME_FDE_TYPE_PCMASK were used. */\n+\n+/* Unwinders perform a (PC >= FRE_START_ADDR) to look up a matching FRE. */\n+#define SFRAME_V3_FDE_PCTYPE_INC SFRAME_FDE_TYPE_PCINC\n+/* Unwinders perform a (PC % REP_BLOCK_SIZE >= FRE_START_ADDR) to look up a\n+ matching FRE. */\n+#define SFRAME_V3_FDE_PCTYPE_MASK SFRAME_FDE_TYPE_PCMASK\n+\n+typedef struct sframe_func_desc_idx_v3\n+{\n+ /* Offset to the function start address. Encoded as a signed offset,\n+ relative to the beginning of the current FDE. */\n+ int64_t sfdi_func_start_offset;\n+ /* Size of the function in bytes. */\n+ uint32_t sfdi_func_size;\n+ /* Offset of the first SFrame Frame Row Entry of the function, relative to the\n+ beginning of the SFrame Frame Row Entry sub-section. */\n+ uint32_t sfdi_func_start_fre_off;\n+} __attribute__ ((packed)) sframe_func_desc_idx_v3;\n+\n+typedef struct sframe_func_desc_attr_v3\n+{\n+ /* Number of frame row entries for the function. */\n+ uint16_t sfda_func_num_fres;\n+ /* Additional information for stack tracing from the function:\n+ - 4-bits: Identify the FRE type used for the function.\n+ - 1-bit: Identify the PC type of the function - mask or inc.\n+ - 1-bit: PAC authorization A/B key (aarch64).\n+ - 1-bits: Unused.\n+ - 1-bit: Signal frame.\n+ -------------------------------------------------------------------------------\n+ | Signal | Unused | PAC auth A/B key (aarch64) | FDE | FRE Type |\n+ | frame | | Unused (amd64) | PC Type | |\n+ -------------------------------------------------------------------------------\n+ 8 7 6 5 4 0 */\n+ uint8_t sfda_func_info;\n+ /* Additional information for stack tracing from the function:\n+ - 5-bits: FDE type.\n+ - 3-bits: Unused.\n+ ------------------------------------------------------------\n+ | Unused | FDE Type |\n+ | | |\n+ ------------------------------------------------------------\n+ 8 7 6 5 0 */\n+ uint8_t sfda_func_info2;\n+ /* Size of the block of repeating insns. Used for SFrame FDEs of type\n+ SFRAME_V3_FDE_PCTYPE_MASK. */\n+ uint8_t sfda_func_rep_size;\n+} __attribute__ ((packed)) sframe_func_desc_attr_v3;\n+\n+/* Mask for the ABI/arch specific FDE type (lower 5 bits). */\n+#define SFRAME_V3_FDE_TYPE_MASK 0x1f\n+\n+/* Get the FDE type from the info2 byte. */\n+#define SFRAME_V3_FDE_TYPE(info2) \\\n+ ((info2) & SFRAME_V3_FDE_TYPE_MASK)\n+#define SFRAME_V3_FDE_FRE_TYPE(info) (SFRAME_V2_FUNC_FRE_TYPE (info))\n+#define SFRAME_V3_FDE_PC_TYPE(info) (SFRAME_V2_FUNC_PC_TYPE (info))\n+\n /* Size of stack frame offsets in an SFrame Frame Row Entry. A single\n SFrame FRE has all offsets of the same size. Offset size may vary\n across frame row entries. */\n@@ -231,6 +331,14 @@ typedef struct sframe_func_desc_entry\n #define SFRAME_FRE_OFFSET_2B\t 1\n #define SFRAME_FRE_OFFSET_4B\t 2\n \n+/* In SFrame V3, with the addition of flexible FDE, usage of term \"offsets\"\n+ (for the varlen data trailing the SFrame FRE) is inappropriate. Use the\n+ terminology of \"data word\" instead. A single SFrame FRE has all data words\n+ of the same size. Size of data words may vary across frame row entries. */\n+#define SFRAME_FRE_DATAWORD_1B\t SFRAME_FRE_OFFSET_1B\n+#define SFRAME_FRE_DATAWORD_2B\t SFRAME_FRE_OFFSET_2B\n+#define SFRAME_FRE_DATAWORD_4B\t SFRAME_FRE_OFFSET_4B\n+\n /* An SFrame Frame Row Entry can be SP or FP based. */\n #define SFRAME_BASE_REG_FP\t0\n #define SFRAME_BASE_REG_SP\t1\n@@ -249,15 +357,16 @@ typedef struct sframe_fre_info\n {\n /* Information about\n - 1 bit: base reg for CFA\n- - 4 bits: Number of offsets (N). A value of upto 3 is allowed to track\n- all three of CFA, FP and RA (fixed implicit order).\n- - 2 bits: information about size of the offsets (S) in bytes.\n- Valid values are SFRAME_FRE_OFFSET_1B, SFRAME_FRE_OFFSET_2B,\n- SFRAME_FRE_OFFSET_4B\n+ - 4 bits: Number of data words (N). Typically for default FDE type, a\n+ value of upto 3 suffices to track all three of CFA, FP and RA (fixed\n+ implicit order).\n+ - 2 bits: information about size of the data words (S) in bytes.\n+ Valid values are SFRAME_FRE_DATAWORD_1B, SFRAME_FRE_DATAWORD_2B,\n+ SFRAME_FRE_DATAWORD_4B.\n - 1 bit: Mangled RA state bit (aarch64 only).\n ----------------------------------------------------------------------------------\n- | Mangled-RA (aarch64) | Size of offsets | Number of offsets | base_reg |\n- | Unused (amd64) | | | |\n+ | Mangled-RA (aarch64) | Size of Data Words | Number of Data Words | base_reg |\n+ | Unused (amd64, s390x)| | | |\n ----------------------------------------------------------------------------------\n 8 7 5 1 0\n \n@@ -280,10 +389,12 @@ typedef struct sframe_fre_info\n #define SFRAME_V1_FRE_OFFSET_COUNT(data)\t (((data) >> 1) & 0xf)\n #define SFRAME_V1_FRE_OFFSET_SIZE(data)\t\t (((data) >> 5) & 0x3)\n #define SFRAME_V1_FRE_MANGLED_RA_P(data)\t (((data) >> 7) & 0x1)\n+/* A zero offset count indicates that RA is undefined for this FRE. */\n+#define SFRAME_V2_FRE_RA_UNDEFINED_P(data)\t (SFRAME_V1_FRE_OFFSET_COUNT (data) == 0)\n \n /* SFrame Frame Row Entry definitions.\n \n- Used for both AMD64 and AARCH64.\n+ Used for Default FDEs in AMD64, AARCH64, and s390x.\n \n An SFrame Frame Row Entry is a self-sufficient record which contains\n information on how to generate the stack trace for the specified range of\n@@ -291,7 +402,7 @@ typedef struct sframe_fre_info\n S is the size of the stack frame offset for the FRE, and\n N is the number of stack frame offsets in the FRE\n \n- The interpretation of FRE stack offsets is ABI-specific:\n+ The interpretation of FRE stack offsets for default FDEs is ABI-specific:\n \n AMD64:\n offset1 (interpreted as CFA = BASE_REG + offset1)\n@@ -307,6 +418,25 @@ typedef struct sframe_fre_info\n fi\n Note that in AAPCS64, a frame record, if created, will save both FP and\n LR on stack.\n+\n+ s390x:\n+ offset1 (interpreted as CFA = BASE_REG + offset1)\n+ if RA is being tracked\n+ offset2 (interpreted as RA = CFA + offset2; an offset value of\n+\t SFRAME_FRE_RA_OFFSET_INVALID indicates a dummy padding RA offset\n+\t to represent FP without RA saved on stack)\n+ if FP is being tracked\n+\t offset3 (intrepreted as FP = CFA + offset3)\n+ fi\n+ else\n+ if FP is being tracked\n+\toffset2 (intrepreted as FP = CFA + offset2)\n+ fi\n+ fi\n+ Note that in s390x, if a FP/RA is to be restored from a register, flex FDEs\n+ are used in SFrame V3. In SFrame V2, default FDEs were used: the\n+ least-significant bit of the offset was set to indicate that the encoded\n+ value is a DWARF register number shifted to the left by 1.\n */\n \n /* Used when SFRAME_FRE_TYPE_ADDR1 is specified as FRE type. */\n", "prefixes": [ "1/2" ] }