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GET /api/1.0/patches/2223058/?format=api
{ "id": 2223058, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2223058/?format=api", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.0/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260414-upstream_pinctrl-v6-1-709f2127da33@aspeedtech.com>", "date": "2026-04-14T09:38:59", "name": "[v6,1/3] dt-bindings: pinctrl: Add aspeed,ast2700-soc0-pinctrl", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2acbcb8e6944542d6a4c7397d89bbb9ed067aa54", "submitter": { "id": 80235, "url": "http://patchwork.ozlabs.org/api/1.0/people/80235/?format=api", "name": "Billy Tsai", "email": "billy_tsai@aspeedtech.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260414-upstream_pinctrl-v6-1-709f2127da33@aspeedtech.com/mbox/", "series": [ { "id": 499805, "url": "http://patchwork.ozlabs.org/api/1.0/series/499805/?format=api", "date": "2026-04-14T09:38:58", "name": "pinctrl: aspeed: Add AST2700 SoC0 support", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/499805/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223058/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35136-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35136-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=211.20.114.72", "smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=aspeedtech.com" ], "Received": [ "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvzsc3fXRz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 19:45:24 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 6F8F730C8E51\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 09:39:29 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6C52C3CA490;\n\tTue, 14 Apr 2026 09:39:28 +0000 (UTC)", "from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 27C1C3C9EE8;\n\tTue, 14 Apr 2026 09:39:26 +0000 (UTC)", "from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com\n (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 14 Apr\n 2026 17:39:15 +0800", "from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com\n (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend\n Transport; Tue, 14 Apr 2026 17:39:15 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776159568; cv=none;\n b=BmIlH9TvzpEZpVGuX77fbYM/F7wa62RmzMekla3wJpEjQtrRQYqEEqqIjbmX4WdzM5k/+Yi9S/afJtur4oQlBmpESMrCNg7NQXoIE2k8zKJ1uoNwI1hL5N0x7o94sjC2qKVusxUTQpST6Jk2Kul0Tihu4ODWZDbFA4c457Scq3A=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776159568; c=relaxed/simple;\n\tbh=DClYMjl40cGe7d0VS2REqkqxly8IJkj8+TaEa3b9aOE=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References:\n\t In-Reply-To:To:CC;\n b=n6V0JF+jffYul27quV3nawtUsgK6rWiq6k2P28xr2z03I7Z/rJAqtTvIgjGU+/hmvbi0Mywijb8ag1jtMmsaA9+S/4sf5AX5dU0aVsUpse/TMqV2OgEdxJCo/OEwOTuDvj+4AFoao+qeq4pEaH0ALXmIItIAehUlH9ApqyKO7sQ=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com;\n spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72", "From": "Billy Tsai <billy_tsai@aspeedtech.com>", "Date": "Tue, 14 Apr 2026 17:38:59 +0800", "Subject": "[PATCH v6 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-ID": "<20260414-upstream_pinctrl-v6-1-709f2127da33@aspeedtech.com>", "References": "<20260414-upstream_pinctrl-v6-0-709f2127da33@aspeedtech.com>", "In-Reply-To": "<20260414-upstream_pinctrl-v6-0-709f2127da33@aspeedtech.com>", "To": "Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>, \"Krzysztof\n Kozlowski\" <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, \"Joel\n Stanley\" <joel@jms.id.au>, Andrew Jeffery <andrew@codeconstruct.com.au>,\n\t\"Linus Walleij\" <linusw@kernel.org>, Billy Tsai <billy_tsai@aspeedtech.com>,\n\t\"Bartosz Golaszewski\" <brgl@kernel.org>, Ryan Chen <ryan_chen@aspeedtech.com>", "CC": "Andrew Jeffery <andrew@aj.id.au>, <devicetree@vger.kernel.org>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>,\n\t<linux-kernel@vger.kernel.org>, <openbmc@lists.ozlabs.org>,\n\t<linux-gpio@vger.kernel.org>, <linux-clk@vger.kernel.org>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1776159555; l=4788;\n i=billy_tsai@aspeedtech.com; s=20251118; h=from:subject:message-id;\n bh=DClYMjl40cGe7d0VS2REqkqxly8IJkj8+TaEa3b9aOE=;\n b=BC/GqJTMp/517BpleD1ESm4IaVUQk0/9FJoyu5VkGdiw5EA+DEzxLGVtnVRzlmuNl1b4bIgiP\n TBRpjAO9F8vDP/RgTw4uIgYBTfWiN9KaNxq/AWdlUEQ1sQnLO1055V0", "X-Developer-Key": "i=billy_tsai@aspeedtech.com; a=ed25519;\n pk=/A8qvgZ6CPfnwKgT6/+k+nvXOkN477MshEGJvVdzeeQ=" }, "content": "Add a device tree binding for the pin controller found in the\nASPEED AST2700 SoC0.\n\nThe controller manages various peripheral functions such as eMMC, USB,\nVGA DDC, JTAG, and PCIe root complex signals.\n\nDescribe the AST2700 SoC0 pin controller using standard pin multiplexing\nand configuration properties.\n\nSigned-off-by: Billy Tsai <billy_tsai@aspeedtech.com>\n---\n .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml | 170 +++++++++++++++++++++\n 1 file changed, 170 insertions(+)", "diff": "diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml\nnew file mode 100644\nindex 000000000000..ca008cf9dc7c\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml\n@@ -0,0 +1,170 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: ASPEED AST2700 SoC0 Pin Controller\n+\n+maintainers:\n+ - Billy Tsai <billy_tsai@aspeedtech.com>\n+\n+description:\n+ The AST2700 features a dual-SoC architecture with two interconnected SoCs,\n+ each having its own System Control Unit (SCU) for independent pin control.\n+ This pin controller manages the pin multiplexing for SoC0.\n+\n+ The SoC0 pin controller manages pin functions including eMMC, VGA DDC,\n+ dual USB3/USB2 ports (A and B), JTAG, and PCIe root complex interfaces.\n+\n+properties:\n+ compatible:\n+ const: aspeed,ast2700-soc0-pinctrl\n+ reg:\n+ maxItems: 1\n+\n+patternProperties:\n+ '-state$':\n+ type: object\n+ allOf:\n+ - $ref: pinmux-node.yaml#\n+ - $ref: pincfg-node.yaml#\n+ - if:\n+ required:\n+ - pins\n+ else:\n+ properties:\n+ drive-strength: false\n+ bias-disable: false\n+ bias-pull-up: false\n+ bias-pull-down: false\n+ additionalProperties: false\n+\n+ properties:\n+ function:\n+ enum:\n+ - EMMC\n+ - JTAGDDR\n+ - JTAGM0\n+ - JTAGPCIEA\n+ - JTAGPCIEB\n+ - JTAGPSP\n+ - JTAGSSP\n+ - JTAGTSP\n+ - JTAGUSB3A\n+ - JTAGUSB3B\n+ - PCIERC0PERST\n+ - PCIERC1PERST\n+ - TSPRSTN\n+ - UFSCLKI\n+ - USB2AD0\n+ - USB2AD1\n+ - USB2AH\n+ - USB2AHP\n+ - USB2AHPD0\n+ - USB2AXH\n+ - USB2AXH2B\n+ - USB2AXHD1\n+ - USB2AXHP\n+ - USB2AXHP2B\n+ - USB2AXHPD1\n+ - USB2BD0\n+ - USB2BD1\n+ - USB2BH\n+ - USB2BHP\n+ - USB2BHPD0\n+ - USB2BXH\n+ - USB2BXH2A\n+ - USB2BXHD1\n+ - USB2BXHP\n+ - USB2BXHP2A\n+ - USB2BXHPD1\n+ - USB3AXH\n+ - USB3AXH2B\n+ - USB3AXHD\n+ - USB3AXHP\n+ - USB3AXHP2B\n+ - USB3AXHPD\n+ - USB3BXH\n+ - USB3BXH2A\n+ - USB3BXHD\n+ - USB3BXHP\n+ - USB3BXHP2A\n+ - USB3BXHPD\n+ - VB\n+ - VGADDC\n+\n+ groups:\n+ enum:\n+ - EMMCCDN\n+ - EMMCG1\n+ - EMMCG4\n+ - EMMCG8\n+ - EMMCWPN\n+ - JTAG0\n+ - PCIERC0PERST\n+ - PCIERC1PERST\n+ - TSPRSTN\n+ - UFSCLKI\n+ - USB2A\n+ - USB2AAP\n+ - USB2ABP\n+ - USB2ADAP\n+ - USB2AH\n+ - USB2AHAP\n+ - USB2B\n+ - USB2BAP\n+ - USB2BBP\n+ - USB2BDBP\n+ - USB2BH\n+ - USB2BHBP\n+ - USB3A\n+ - USB3AAP\n+ - USB3ABP\n+ - USB3B\n+ - USB3BAP\n+ - USB3BBP\n+ - VB0\n+ - VB1\n+ - VGADDC\n+ pins:\n+ enum:\n+ - AB13\n+ - AB14\n+ - AC13\n+ - AC14\n+ - AD13\n+ - AD14\n+ - AE13\n+ - AE14\n+ - AE15\n+ - AF13\n+ - AF14\n+ - AF15\n+\n+ drive-strength:\n+ enum: [3, 6, 8, 11, 16, 18, 20, 23, 30, 32, 33, 35, 37, 38, 39, 41]\n+\n+ bias-disable: true\n+ bias-pull-up: true\n+ bias-pull-down: true\n+\n+required:\n+ - compatible\n+ - reg\n+\n+allOf:\n+ - $ref: pinctrl.yaml#\n+\n+additionalProperties: false\n+\n+examples:\n+ - |\n+ pinctrl@400 {\n+ compatible = \"aspeed,ast2700-soc0-pinctrl\";\n+ reg = <0x400 0x318>;\n+ emmc-state {\n+ function = \"EMMC\";\n+ groups = \"EMMCG1\";\n+ };\n+ };\n", "prefixes": [ "v6", "1/3" ] }