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GET /api/1.0/patches/2221251/?format=api
{ "id": 2221251, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2221251/?format=api", "project": { "id": 57, "url": "http://patchwork.ozlabs.org/api/1.0/projects/57/?format=api", "name": "Linux ASPEED SoC development", "link_name": "linux-aspeed", "list_id": "linux-aspeed.lists.ozlabs.org", "list_email": "linux-aspeed@lists.ozlabs.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<e50c40a2dfefe3e400abf0aa0bbdec1ca141b00a.1775679285.git.dawid.glazik@linux.intel.com>", "date": "2026-04-08T20:34:33", "name": "[v3,1/3] ARM: dts: aspeed-g6: move i2c controllers directly into apb node", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3cc0e52ff445911afc5b90af277ba2de16730603", "submitter": { "id": 93095, "url": "http://patchwork.ozlabs.org/api/1.0/people/93095/?format=api", "name": "Dawid Glazik", "email": "dawid.glazik@linux.intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/e50c40a2dfefe3e400abf0aa0bbdec1ca141b00a.1775679285.git.dawid.glazik@linux.intel.com/mbox/", "series": [ { "id": 499224, "url": "http://patchwork.ozlabs.org/api/1.0/series/499224/?format=api", "date": "2026-04-08T20:34:34", "name": "ARM: dts: aspeed-g6: add AST2600 I3C nodes and bindings", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/499224/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221251/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-aspeed+bounces-3874-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=hNG1f07o;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775677319; x=1807213319;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=1+enQnmuX1LnH5Cl4aiWgRetEzO2ZLiVdEHYf6jTViE=;\n b=hNG1f07odqbVkh58XnfavStq3h/5rNh+bSqDUBu9qlSdcIIVOqqKbYTH\n LXEtliceLC2qQ8SBk92DMeUqyrJff62X4pkeEE1DS1m0+hV4HhdyCtL/G\n 7lP1/qAkIHGdPbhU/IwnsEjCCOBzKXckWHkueOi4Y2sD5LzYdbK5plCNh\n WK7BJG+dR3F01EtixPR6QtDbmwSnyRVy35XynCabBOS/IWVN+VP9PJOAO\n s30j38ayq9RevI8NQmCKEVWM524iQcUDRCLZedWWOttfA314hxYhR1LbY\n rbq9DbfhtnRzX1X8JGOpZi87EU/wibZL9N00td+hqFFIQ7UArbpqm6Ag5\n w==;", "X-CSE-ConnectionGUID": [ "mpYlxiCfQo6pPJSVc5qCNQ==", "fF6AKzoqTu+53pqR3F15Mw==" ], "X-CSE-MsgGUID": [ "6WvIlacgTha50Fa19setTg==", "tCjcqbXvQbSX7dUs/GlmFg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11753\"; a=\"88056898\"", "E=Sophos;i=\"6.23,168,1770624000\";\n d=\"scan'208\";a=\"88056898\"", "E=Sophos;i=\"6.23,168,1770624000\";\n d=\"scan'208\";a=\"222053356\"" ], "X-ExtLoop1": "1", "From": "Dawid Glazik <dawid.glazik@linux.intel.com>", "To": "Alexandre Belloni <alexandre.belloni@bootlin.com>,\n\tRob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tJoel Stanley <joel@jms.id.au>,\n\tAndrew Jeffery <andrew@codeconstruct.com.au>,\n\tlinux-aspeed@lists.ozlabs.org", "Cc": "linux-i3c@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tFrank Li <Frank.Li@nxp.com>,\n\tDawid Glazik <dawid.glazik@linux.intel.com>,\n\tMaciej Lawniczak <maciej.lawniczak@intel.com>,\n\tJeremy Kerr <jk@codeconstruct.com.au>", "Subject": "[PATCH v3 1/3] ARM: dts: aspeed-g6: move i2c controllers directly\n into apb node", "Date": "Wed, 8 Apr 2026 22:34:33 +0200", "Message-ID": "\n <e50c40a2dfefe3e400abf0aa0bbdec1ca141b00a.1775679285.git.dawid.glazik@linux.intel.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<cover.1775679285.git.dawid.glazik@linux.intel.com>", "References": "<cover.1775679285.git.dawid.glazik@linux.intel.com>", "X-Mailing-List": "linux-aspeed@lists.ozlabs.org", "List-Id": "<linux-aspeed.lists.ozlabs.org>", "List-Help": "<mailto:linux-aspeed+help@lists.ozlabs.org>", "List-Owner": "<mailto:linux-aspeed+owner@lists.ozlabs.org>", "List-Post": "<mailto:linux-aspeed@lists.ozlabs.org>", "List-Archive": "<https://lore.kernel.org/linux-aspeed/>,\n <https://lists.ozlabs.org/pipermail/linux-aspeed/>", "List-Subscribe": "<mailto:linux-aspeed+subscribe@lists.ozlabs.org>,\n <mailto:linux-aspeed+subscribe-digest@lists.ozlabs.org>,\n <mailto:linux-aspeed+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:linux-aspeed+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Organization": "Intel Technology Poland sp. z o.o. - ul. Slowackiego 173,\n 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316", "Content-Transfer-Encoding": "8bit", "X-Spam-Status": "No, score=-2.3 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "We currently have the apb's mapping of the i2c controller space as a\nlabelled mostly-empty node:\n\n apb {\n i2c: bus@1e78a000 {\n ranges = <...>;\n };\n }\n\n... and then define the contents of the i2c block later:\n\n i2c: {\n i2c0: i2c-bus@80 {\n reg = <0x80 0x80>;\n };\n i2c1: i2c-bus@100 {\n reg = <0x100 0x80>;\n };\n }\n\nKrzysztof mentions[1] that isn't convention though, with the top-level\nsimple-bus being empty and linked via the label. So, drop the label\nusage and move the i2c bus definition into the simple-bus node directly\nunder the apb:\n\n apb {\n bus@1e78a000 {\n ranges = <...>;\n\n i2c0: i2c-bus@80 {\n reg = <0x80 0x80>;\n };\n i2c1: i2c-bus@100 {\n reg = <0x100 0x80>;\n };\n };\n }\n\nThis will allow us to be consistent when we add new definitions for the\ni3c nodes, which would require the latter format.\n\nLink: https://lore.kernel.org/linux-devicetree/c5331cf8-7295-4e6a-ba39-e0751a2c357e@kernel.org/ [1]\nOriginally-by: Jeremy Kerr <jk@codeconstruct.com.au>\nSigned-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>\n---\nv3:\n - wasn't sure about target tree - picked the one pointed in\n\thttps://docs.kernel.org/process/maintainer-soc.html\n - pick up series after two years\n - rebase on top of latest tree and solve conflicts\n - as agreed with Jeremy off-list, he said I can take authorship of this going forward\nv2:\n - new patch: reorganise i2c nodes before adding new-format i3c nodes\n---\n arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 452 ++++++++++++------------\n 1 file changed, 225 insertions(+), 227 deletions(-)", "diff": "diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\nindex 189bc3bbb47c..f5641128614f 100644\n--- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\n+++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\n@@ -835,11 +835,235 @@ uart9: serial@1e790300 {\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n-\t\t\ti2c: bus@1e78a000 {\n+\t\t\tbus@1e78a000 {\n \t\t\t\tcompatible = \"simple-bus\";\n \t\t\t\t#address-cells = <1>;\n \t\t\t\t#size-cells = <1>;\n \t\t\t\tranges = <0 0x1e78a000 0x1000>;\n+\n+\t\t\t\ti2c0: i2c@80 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x80 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c1_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c1: i2c@100 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x100 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c2_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c2: i2c@180 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x180 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c3_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c3: i2c@200 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x200 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c4_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c4: i2c@280 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x280 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c5_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c5: i2c@300 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x300 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c6_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c6: i2c@380 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x380 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c7_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c7: i2c@400 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x400 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c8_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c8: i2c@480 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x480 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c9_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c9: i2c@500 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x500 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c10_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c10: i2c@580 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x580 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c11_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c11: i2c@600 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x600 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c12_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c12: i2c@680 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x680 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c13_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c13: i2c@700 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x700 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c14_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c14: i2c@780 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x780 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c15_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti2c15: i2c@800 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\treg = <0x800 0x80>;\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I2C>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tbus-frequency = <100000>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i2c16_default>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \t\t\t};\n \n \t\t\tfsim0: fsi@1e79b000 {\n@@ -870,229 +1094,3 @@ fsim1: fsi@1e79b100 {\n };\n \n #include \"aspeed-g6-pinctrl.dtsi\"\n-\n-&i2c {\n-\ti2c0: i2c@80 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x80 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c1_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c1: i2c@100 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x100 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c2_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c2: i2c@180 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x180 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c3_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c3: i2c@200 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x200 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c4_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c4: i2c@280 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x280 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c5_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c5: i2c@300 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x300 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c6_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c6: i2c@380 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x380 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c7_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c7: i2c@400 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x400 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c8_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c8: i2c@480 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x480 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c9_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c9: i2c@500 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x500 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c10_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c10: i2c@580 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x580 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c11_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c11: i2c@600 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x600 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c12_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c12: i2c@680 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x680 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c13_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c13: i2c@700 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x700 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c14_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c14: i2c@780 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x780 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c15_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-\n-\ti2c15: i2c@800 {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\treg = <0x800 0x80>;\n-\t\tcompatible = \"aspeed,ast2600-i2c-bus\";\n-\t\tclocks = <&syscon ASPEED_CLK_APB2>;\n-\t\tresets = <&syscon ASPEED_RESET_I2C>;\n-\t\tinterrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tbus-frequency = <100000>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_i2c16_default>;\n-\t\tstatus = \"disabled\";\n-\t};\n-};\n", "prefixes": [ "v3", "1/3" ] }