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GET /api/1.0/patches/2221136/?format=api
{ "id": 2221136, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2221136/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260408041953.1899532-10-brian.cain@oss.qualcomm.com>", "date": "2026-04-08T04:19:34", "name": "[v4,09/28] target/hexagon: Implement stack overflow exception", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9c2c26605a4e061ea4ec45fe699f40d74e543a7d", "submitter": { "id": 89839, "url": "http://patchwork.ozlabs.org/api/1.0/people/89839/?format=api", "name": "Brian Cain", "email": "brian.cain@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260408041953.1899532-10-brian.cain@oss.qualcomm.com/mbox/", "series": [ { "id": 499179, "url": "http://patchwork.ozlabs.org/api/1.0/series/499179/?format=api", "date": "2026-04-08T04:19:31", "name": "Hexagon system emulation - Part 2/3", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/499179/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221136/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=DsdaRayZ;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=DfuGqsMv;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "X-Authority-Analysis": "v=2.4 cv=etfvCIpX c=1 sm=1 tr=0 ts=69d5d783 cx=c_pps\n a=SvEPeNj+VMjHSW//kvnxuw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22\n a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=DTjK4E8Rq4C45BV92HcA:9 a=QEXdDO2ut3YA:10\n a=Kq8ClHjjuc5pcCNDwlU0:22", "X-Proofpoint-ORIG-GUID": "3FJvzSYMLoLv22JD3An0eDcD-5LrXy6v", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDA4MDAzNSBTYWx0ZWRfX7I5bATXZGYfs\n yoEjJYiEBMb678xyLz4NbBOijogvEVAF7jvvbjj4cVRETPWUtf6nG/xDNFdfZLCFxKOXtsmw73j\n UdQ1neFUAi1MpJUzk6r5+0kjLmNzgd9JO9PQ+H5Vnh3lbwBbI2wijmxZImyNG50nNyPXg/mX06R\n ymzvU55+zHBs4FtMjhz/OGtgfPpsPGKC1sukcXbFFTl/tUa3GIlKe8DLI5qfZtJNR7GQK+jn2Em\n pLoUNGCtwvL2VyYJ2CXg45NeBl2yQKnic6xznwBmgIKE5+KQoh2hUUSCRHYWPIYwikMrtjddEIi\n zoX0kiJNDDk2sQVp9i7iXkqLFP3FPjL9HUs9oU+mgoWSN09h57IjHzJTjdpcSxbAfhUYjAVu6OZ\n HUB5bFFaAEKlSa5DqSfaB8SqS+jlXT6M1NDCKVg6J8JlBzGYb6t/mbth98kgLX10D6grOAQYagj\n RXzCbuCHkzxZ1gF++2A==", "X-Proofpoint-GUID": "3FJvzSYMLoLv22JD3An0eDcD-5LrXy6v", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-08_02,2026-04-07_05,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 lowpriorityscore=0 phishscore=0 bulkscore=0\n impostorscore=0 suspectscore=0 spamscore=0 clxscore=1015 malwarescore=0\n adultscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000\n definitions=main-2604080035", "Received-SPF": "pass client-ip=205.220.180.131;\n envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com", "X-Spam_score_int": "-27", "X-Spam_score": "-2.8", "X-Spam_bar": "--", "X-Spam_report": "(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Implement the frame limit check for system emulation mode. When\nallocframe computes a new stack pointer below FRAMELIMIT, raise a\nprecise exception (HEX_CAUSE_STACK_LIMIT). The check is skipped in\nmonitor mode.\n\nReviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>\nSigned-off-by: Brian Cain <brian.cain@oss.qualcomm.com>\n---\n target/hexagon/helper.h | 1 +\n target/hexagon/idef-parser/parser-helpers.h | 2 ++\n target/hexagon/macros.h | 3 --\n target/hexagon/sys_macros.h | 4 +++\n target/hexagon/translate.h | 2 ++\n target/hexagon/genptr.c | 18 +++++++----\n target/hexagon/idef-parser/parser-helpers.c | 9 ++++++\n target/hexagon/op_helper.c | 36 +++++++++++++++++++++\n target/hexagon/idef-parser/idef-parser.y | 3 ++\n 9 files changed, 68 insertions(+), 10 deletions(-)", "diff": "diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h\nindex 9ca87acfe63..ebcd471ec0a 100644\n--- a/target/hexagon/helper.h\n+++ b/target/hexagon/helper.h\n@@ -109,6 +109,7 @@ DEF_HELPER_2(probe_hvx_stores, void, env, int)\n DEF_HELPER_2(probe_pkt_scalar_hvx_stores, void, env, int)\n \n #if !defined(CONFIG_USER_ONLY)\n+DEF_HELPER_3(raise_stack_overflow, void, env, i32, i32)\n DEF_HELPER_2(swi, void, env, i32)\n DEF_HELPER_2(cswi, void, env, i32)\n DEF_HELPER_2(ciad, void, env, i32)\ndiff --git a/target/hexagon/idef-parser/parser-helpers.h b/target/hexagon/idef-parser/parser-helpers.h\nindex 2087d534a93..d3dfcec5690 100644\n--- a/target/hexagon/idef-parser/parser-helpers.h\n+++ b/target/hexagon/idef-parser/parser-helpers.h\n@@ -295,6 +295,8 @@ void gen_cancel(Context *c, YYLTYPE *locp);\n \n void gen_load_cancel(Context *c, YYLTYPE *locp);\n \n+void gen_framecheck(Context *c, YYLTYPE *locp, HexValue *addr, HexValue *ea);\n+\n void gen_load(Context *c, YYLTYPE *locp, HexValue *size,\n HexSignedness signedness, HexValue *ea, HexValue *dst);\n \ndiff --git a/target/hexagon/macros.h b/target/hexagon/macros.h\nindex 26d3f7d8a4b..d3f2105c932 100644\n--- a/target/hexagon/macros.h\n+++ b/target/hexagon/macros.h\n@@ -538,9 +538,6 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)\n \n #ifdef CONFIG_USER_ONLY\n #define fFRAMECHECK(ADDR, EA) do { } while (0) /* Not modelled in linux-user */\n-#else\n-/* System mode not implemented yet */\n-#define fFRAMECHECK(ADDR, EA) g_assert_not_reached();\n #endif\n \n #ifdef QEMU_GENERATE\ndiff --git a/target/hexagon/sys_macros.h b/target/hexagon/sys_macros.h\nindex 364fcde7383..cbc857fa2f5 100644\n--- a/target/hexagon/sys_macros.h\n+++ b/target/hexagon/sys_macros.h\n@@ -95,6 +95,10 @@\n #define fTRAP(TRAPTYPE, IMM) \\\n register_trap_exception(env, TRAPTYPE, IMM, PC)\n \n+#ifdef QEMU_GENERATE\n+#define fFRAMECHECK(ADDR, EA) gen_framecheck(ctx, ADDR, EA)\n+#endif\n+\n #define fVIRTINSN_SPSWAP(IMM, REG)\n #define fVIRTINSN_GETIE(IMM, REG) { REG = 0xdeafbeef; }\n #define fVIRTINSN_SETIE(IMM, REG)\ndiff --git a/target/hexagon/translate.h b/target/hexagon/translate.h\nindex eaf48a865c2..4e090565aac 100644\n--- a/target/hexagon/translate.h\n+++ b/target/hexagon/translate.h\n@@ -340,4 +340,6 @@ FIELD(PROBE_PKT_SCALAR_HVX_STORES, S0_IS_PRED, 3, 1)\n FIELD(PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED, 4, 1)\n FIELD(PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX, 5, 2)\n \n+void gen_framecheck(DisasContext *ctx, TCGv_i32 addr, TCGv_i32 ea);\n+\n #endif\ndiff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c\nindex 63cbb7edbbc..129c13b637d 100644\n--- a/target/hexagon/genptr.c\n+++ b/target/hexagon/genptr.c\n@@ -889,26 +889,30 @@ static void gen_load_frame(DisasContext *ctx, TCGv_i64 frame, TCGv EA)\n tcg_gen_qemu_ld_i64(frame, EA, ctx->mem_idx, MO_LE | MO_UQ);\n }\n \n-#ifndef CONFIG_HEXAGON_IDEF_PARSER\n /* Stack overflow check */\n-static void gen_framecheck(TCGv EA, int framesize)\n+void gen_framecheck(DisasContext *ctx, TCGv_i32 addr, TCGv_i32 ea)\n {\n- /* Not modelled in linux-user mode */\n- /* Placeholder for system mode */\n #ifndef CONFIG_USER_ONLY\n- g_assert_not_reached();\n+ TCGLabel *ok = gen_new_label();\n+ tcg_gen_brcond_i32(TCG_COND_GEU, addr, hex_gpr[HEX_REG_FRAMELIMIT], ok);\n+ gen_helper_raise_stack_overflow(tcg_env,\n+ tcg_constant_i32(ctx->insn->slot), ea);\n+ gen_set_label(ok);\n #endif\n }\n \n+#ifndef CONFIG_HEXAGON_IDEF_PARSER\n static void gen_allocframe(DisasContext *ctx, TCGv r29, int framesize)\n {\n TCGv r30 = get_result_gpr(ctx, HEX_REG_FP);\n+ TCGv_i32 new_r29 = tcg_temp_new_i32();\n TCGv_i64 frame;\n tcg_gen_addi_tl(r30, r29, -8);\n frame = gen_frame_scramble();\n gen_store8(tcg_env, r30, frame, ctx->insn->slot);\n- gen_framecheck(r30, framesize);\n- tcg_gen_subi_tl(r29, r30, framesize);\n+ tcg_gen_subi_tl(new_r29, r30, framesize);\n+ gen_framecheck(ctx, new_r29, hex_gpr[HEX_REG_PC]);\n+ tcg_gen_mov_tl(r29, new_r29);\n }\n \n static void gen_deallocframe(DisasContext *ctx, TCGv_i64 r31_30, TCGv r30)\ndiff --git a/target/hexagon/idef-parser/parser-helpers.c b/target/hexagon/idef-parser/parser-helpers.c\nindex 70bfa64432d..b942d9ea16b 100644\n--- a/target/hexagon/idef-parser/parser-helpers.c\n+++ b/target/hexagon/idef-parser/parser-helpers.c\n@@ -1731,6 +1731,15 @@ void gen_load_cancel(Context *c, YYLTYPE *locp)\n OUT(c, locp, \"}\\n\");\n }\n \n+void gen_framecheck(Context *c, YYLTYPE *locp, HexValue *addr, HexValue *ea)\n+{\n+ HexValue addr_m = rvalue_materialize(c, locp, addr);\n+ HexValue ea_m = rvalue_materialize(c, locp, ea);\n+ addr_m = gen_rvalue_truncate(c, locp, &addr_m);\n+ ea_m = gen_rvalue_truncate(c, locp, &ea_m);\n+ OUT(c, locp, \"gen_framecheck(ctx, \", &addr_m, \", \", &ea_m, \");\\n\");\n+}\n+\n void gen_load(Context *c, YYLTYPE *locp, HexValue *width,\n HexSignedness signedness, HexValue *ea, HexValue *dst)\n {\ndiff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c\nindex d40061de06e..6bc8287e8fe 100644\n--- a/target/hexagon/op_helper.c\n+++ b/target/hexagon/op_helper.c\n@@ -1392,6 +1392,42 @@ void HELPER(vwhist128qm)(CPUHexagonState *env, int32_t uiV)\n }\n \n #ifndef CONFIG_USER_ONLY\n+void HELPER(raise_stack_overflow)(CPUHexagonState *env, uint32_t slot,\n+ uint32_t badva)\n+{\n+ /*\n+ * Per section 7.3.1 of the V67 Programmer's Reference,\n+ * stack limit exception isn't raised in monitor mode.\n+ */\n+ uint32_t ssr = env->t_sreg[HEX_SREG_SSR];\n+ CPUState *cs;\n+\n+ if (GET_SSR_FIELD(SSR_EX, ssr) ||\n+ !GET_SSR_FIELD(SSR_UM, ssr)) {\n+ return;\n+ }\n+\n+ cs = env_cpu(env);\n+ cs->exception_index = HEX_EVENT_PRECISE;\n+ env->cause_code = HEX_CAUSE_STACK_LIMIT;\n+ ASSERT_DIRECT_TO_GUEST_UNSET(env, cs->exception_index);\n+\n+ if (slot == 0) {\n+ env->t_sreg[HEX_SREG_BADVA0] = badva;\n+ SET_SSR_FIELD(env, SSR_V0, 1);\n+ SET_SSR_FIELD(env, SSR_V1, 0);\n+ SET_SSR_FIELD(env, SSR_BVS, 0);\n+ } else if (slot == 1) {\n+ env->t_sreg[HEX_SREG_BADVA1] = badva;\n+ SET_SSR_FIELD(env, SSR_V0, 0);\n+ SET_SSR_FIELD(env, SSR_V1, 1);\n+ SET_SSR_FIELD(env, SSR_BVS, 1);\n+ } else {\n+ g_assert_not_reached();\n+ }\n+ cpu_loop_exit_restore(cs, 0);\n+}\n+\n void HELPER(ciad)(CPUHexagonState *env, uint32_t mask)\n {\n g_assert_not_reached();\ndiff --git a/target/hexagon/idef-parser/idef-parser.y b/target/hexagon/idef-parser/idef-parser.y\nindex c6f17c6afa7..22070d8c3fe 100644\n--- a/target/hexagon/idef-parser/idef-parser.y\n+++ b/target/hexagon/idef-parser/idef-parser.y\n@@ -404,6 +404,9 @@ control_statement : frame_check\n ;\n \n frame_check : FCHK '(' rvalue ',' rvalue ')' ';'\n+ {\n+ gen_framecheck(c, &@1, &$3, &$5);\n+ }\n ;\n \n cancel_statement : LOAD_CANCEL\n", "prefixes": [ "v4", "09/28" ] }